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BLUE

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :

Registers

CONTROLLERVERNUM (CONTROLLERVERNUMREG)

TIMEOUTREG

TIMERCAPTUREREG

CMDREG

STATUSREG

INTERRUPT1ENABLEREG

INTERRUPT1LATENCY (INTERRUPT1LATENCYREG)

MANAESKEY0REG

MANAESKEY1REG

MANAESKEY2REG

MANAESKEY3REG

MANAESCLEARTEXT0REG

MANAESCLEARTEXT1REG

INTERRUPT1REG

MANAESCLEARTEXT2REG

MANAESCLEARTEXT3REG

MANAESCIPHERTEXT0REG

MANAESCIPHERTEXT1REG

MANAESCIPHERTEXT2 (MANAESCIPHERTEXT2REG)

MANAESCIPHERTEXT3REG

MANAESCMDREG

MANAESSTATREG

AESLEPRIVPOINTERREG

AESLEPRIVHASHREG

AESLEPRIVPRANDREG

AESLEPRIVCMDREG

AESLEPRIVSTATREG

DEBUGCMDREG

DEBUGSTATUSREG

SPARE

INTERRUPT2REG

TIMEOUTDEST (TIMEOUTDESTREG)


CONTROLLERVERNUM (CONTROLLERVERNUMREG)

Controller Version Number register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CONTROLLERVERNUM CONTROLLERVERNUM read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SUBVERNUM VERNUM TYP

SUBVERNUM : SUBVERNUM
bits : 0 - 7 (8 bit)

VERNUM : VERNUM
bits : 8 - 15 (8 bit)

TYP : TYP
bits : 16 - 23 (8 bit)


TIMEOUTREG

Timeout register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMEOUTREG TIMEOUTREG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIMEOUT

TIMEOUT : TIMEOUT
bits : 0 - 31 (32 bit)


TIMERCAPTUREREG

TimerCapture register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TIMERCAPTUREREG TIMERCAPTUREREG read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIMERCAPTURE

TIMERCAPTURE : TIMERCAPTURE
bits : 0 - 31 (32 bit)


CMDREG

Cmd register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMDREG CMDREG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TXRXSKIP LOCKAHBWRITEBACKEN LOCKAHBFIRSTINITEN CLEARSEMAREQ

TXRXSKIP : TXRXSKIP
bits : 0 - 0 (1 bit)

LOCKAHBWRITEBACKEN : LOCKAHBWRITEBACKEN
bits : 1 - 1 (1 bit)

LOCKAHBFIRSTINITEN : LOCKAHBFIRSTINITEN
bits : 2 - 2 (1 bit)

CLEARSEMAREQ : CLEARSEMAREQ
bits : 3 - 3 (1 bit)


STATUSREG

Status register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STATUSREG STATUSREG read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AESONFLYBUSY ADDPOINTERROR RXOVERFLOWERROR PREVTRANSMIT SEQDONE TXERROR_0 TXERROR_1 TXERROR_2 TXERROR_3 TXERROR_4 ENCERROR ALLTABLEREADYERROR TXDATAREADYERROR NOACTIVELERROR INITDELAYERROR RCVLENGTHERROR SEMATIMEOUTERROR SEMAWASPREEMPT TXRXSKIP ACTIVE2ERROR CONFIGERROR TXOK DONE RCVTIMEOUT RCVNOMD RCVCMD TIMECAPTURETRIG RCVCRCERR RCVOK

AESONFLYBUSY : AESONFLYBUSY
bits : 0 - 0 (1 bit)

ADDPOINTERROR : ADDPOINTERROR
bits : 4 - 4 (1 bit)

RXOVERFLOWERROR : RXOVERFLOWERROR
bits : 5 - 5 (1 bit)

PREVTRANSMIT : PREVTRANSMIT
bits : 6 - 6 (1 bit)

SEQDONE : SEQDONE
bits : 7 - 7 (1 bit)

TXERROR_0 : TXERROR_0
bits : 8 - 8 (1 bit)

TXERROR_1 : TXERROR_1
bits : 9 - 9 (1 bit)

TXERROR_2 : TXERROR_2
bits : 10 - 10 (1 bit)

TXERROR_3 : TXERROR_3
bits : 11 - 11 (1 bit)

TXERROR_4 : TXERROR_4
bits : 12 - 12 (1 bit)

ENCERROR : ENCERROR
bits : 13 - 13 (1 bit)

ALLTABLEREADYERROR : ALLTABLEREADYERROR
bits : 14 - 14 (1 bit)

TXDATAREADYERROR : TXDATAREADYERROR
bits : 15 - 15 (1 bit)

NOACTIVELERROR : NOACTIVELERROR
bits : 16 - 16 (1 bit)

INITDELAYERROR : INITDELAYERROR
bits : 17 - 17 (1 bit)

RCVLENGTHERROR : RCVLENGTHERROR
bits : 18 - 18 (1 bit)

SEMATIMEOUTERROR : SEMATIMEOUTERROR
bits : 19 - 19 (1 bit)

SEMAWASPREEMPT : SEMAWASPREEMPT
bits : 20 - 20 (1 bit)

TXRXSKIP : TXRXSKIP
bits : 21 - 21 (1 bit)

ACTIVE2ERROR : ACTIVE2ERROR
bits : 22 - 22 (1 bit)

CONFIGERROR : CONFIGERROR
bits : 23 - 23 (1 bit)

TXOK : TXOK
bits : 24 - 24 (1 bit)

DONE : DONE
bits : 25 - 25 (1 bit)

RCVTIMEOUT : RCVTIMEOUT
bits : 26 - 26 (1 bit)

RCVNOMD : RCVNOMD
bits : 27 - 27 (1 bit)

RCVCMD : RCVCMD
bits : 28 - 28 (1 bit)

TIMECAPTURETRIG : TIMECAPTURETRIG
bits : 29 - 29 (1 bit)

RCVCRCERR : RCVCRCERR
bits : 30 - 30 (1 bit)

RCVOK : RCVOK
bits : 31 - 31 (1 bit)


INTERRUPT1ENABLEREG

Interrupt1Enable register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

INTERRUPT1ENABLEREG INTERRUPT1ENABLEREG read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDPOINTERROR RXOVERFLOWERROR SEQDONE TXERROR_0 TXERROR_1 TXERROR_2 TXERROR_3 TXERROR_4 ENCERROR ALLTABLEREADYERROR TXDATAREADYERROR NOACTIVELERROR INITDELAYERROR RCVLENGTHERROR SEMATIMEOUTERROR SEMAWASPREEMPT TXRXSKIP ACTIVE2ERROR CONFIGERROR TXOK DONE RCVTIMEOUT RCVNOMD RCVCMD TIMECAPTURETRIG RCVCRCERR RCVOK

ADDPOINTERROR : ADDPOINTERROR
bits : 4 - 4 (1 bit)

RXOVERFLOWERROR : RXOVERFLOWERROR
bits : 5 - 5 (1 bit)

SEQDONE : SEQDONE
bits : 7 - 7 (1 bit)

TXERROR_0 : TXERROR_0
bits : 8 - 8 (1 bit)

TXERROR_1 : TXERROR_1
bits : 9 - 9 (1 bit)

TXERROR_2 : TXERROR_2
bits : 10 - 10 (1 bit)

TXERROR_3 : TXERROR_3
bits : 11 - 11 (1 bit)

TXERROR_4 : TXERROR_4
bits : 12 - 12 (1 bit)

ENCERROR : ENCERROR
bits : 13 - 13 (1 bit)

ALLTABLEREADYERROR : ALLTABLEREADYERROR
bits : 14 - 14 (1 bit)

TXDATAREADYERROR : TXDATAREADYERROR
bits : 15 - 15 (1 bit)

NOACTIVELERROR : NOACTIVELERROR
bits : 16 - 16 (1 bit)

INITDELAYERROR : INITDELAYERROR
bits : 17 - 17 (1 bit)

RCVLENGTHERROR : RCVLENGTHERROR
bits : 18 - 18 (1 bit)

SEMATIMEOUTERROR : SEMATIMEOUTERROR
bits : 19 - 19 (1 bit)

SEMAWASPREEMPT : SEMAWASPREEMPT
bits : 20 - 20 (1 bit)

TXRXSKIP : TXRXSKIP
bits : 21 - 21 (1 bit)

ACTIVE2ERROR : ACTIVE2ERROR
bits : 22 - 22 (1 bit)

CONFIGERROR : CONFIGERROR
bits : 23 - 23 (1 bit)

TXOK : TXOK
bits : 24 - 24 (1 bit)

DONE : DONE
bits : 25 - 25 (1 bit)

RCVTIMEOUT : RCVTIMEOUT
bits : 26 - 26 (1 bit)

RCVNOMD : RCVNOMD
bits : 27 - 27 (1 bit)

RCVCMD : RCVCMD
bits : 28 - 28 (1 bit)

TIMECAPTURETRIG : TIMECAPTURETRIG
bits : 29 - 29 (1 bit)

RCVCRCERR : RCVCRCERR
bits : 30 - 30 (1 bit)

RCVOK : RCVOK
bits : 31 - 31 (1 bit)


INTERRUPT1LATENCY (INTERRUPT1LATENCYREG)

Interrupt1Latency register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

INTERRUPT1LATENCY INTERRUPT1LATENCY read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INTERRUPT1LATENCY

INTERRUPT1LATENCY : INTERRUPT1LATENCY
bits : 0 - 7 (8 bit)


MANAESKEY0REG

ManAesKey0 register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MANAESKEY0REG MANAESKEY0REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MANAESKEY_31_0

MANAESKEY_31_0 : MANAESKEY_31_0
bits : 0 - 31 (32 bit)


MANAESKEY1REG

ManAesKey1 register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MANAESKEY1REG MANAESKEY1REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MANAESKEY_63_32

MANAESKEY_63_32 : MANAESKEY_63_32
bits : 0 - 31 (32 bit)


MANAESKEY2REG

ManAesKey2 register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MANAESKEY2REG MANAESKEY2REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MANAESKEY_95_64

MANAESKEY_95_64 : MANAESKEY_95_64
bits : 0 - 31 (32 bit)


MANAESKEY3REG

ManAesKey3 register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MANAESKEY3REG MANAESKEY3REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MANAESKEY_127_96

MANAESKEY_127_96 : MANAESKEY_127_96
bits : 0 - 31 (32 bit)


MANAESCLEARTEXT0REG

ManAesClearText0 register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MANAESCLEARTEXT0REG MANAESCLEARTEXT0REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AES_CLEAR_31_0

AES_CLEAR_31_0 : AES_CLEAR_31_0
bits : 0 - 31 (32 bit)


MANAESCLEARTEXT1REG

ManAesClearText1 register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MANAESCLEARTEXT1REG MANAESCLEARTEXT1REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AES_CLEAR_63_32

AES_CLEAR_63_32 : AES_CLEAR_63_32
bits : 0 - 31 (32 bit)


INTERRUPT1REG

Interrupt1 register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTERRUPT1REG INTERRUPT1REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDPOINTERROR RXOVERFLOWERROR SEQDONE TXERROR_0 TXERROR_1 TXERROR_2 TXERROR_3 TXERROR_4 ENCERROR ALLTABLEREADYERROR TXDATAREADYERROR NOACTIVELERROR INITDELAYERROR RCVLENGTHERROR SEMATIMEOUTERROR SEMAWASPREEMPT TXRXSKIP ACTIVE2ERROR CONFIGERROR TXOK DONE RCVTIMEOUT RCVNOMD RCVCMD TIMECAPTURETRIG RCVCRCERR RCVOK

ADDPOINTERROR : ADDPOINTERROR
bits : 4 - 4 (1 bit)

RXOVERFLOWERROR : RXOVERFLOWERROR
bits : 5 - 5 (1 bit)

SEQDONE : SEQDONE
bits : 7 - 7 (1 bit)

TXERROR_0 : TXERROR_0
bits : 8 - 8 (1 bit)

TXERROR_1 : TXERROR_1
bits : 9 - 9 (1 bit)

TXERROR_2 : TXERROR_2
bits : 10 - 10 (1 bit)

TXERROR_3 : TXERROR_3
bits : 11 - 11 (1 bit)

TXERROR_4 : TXERROR_4
bits : 12 - 12 (1 bit)

ENCERROR : ENCERROR
bits : 13 - 13 (1 bit)

ALLTABLEREADYERROR : ALLTABLEREADYERROR
bits : 14 - 14 (1 bit)

TXDATAREADYERROR : TXDATAREADYERROR
bits : 15 - 15 (1 bit)

NOACTIVELERROR : NOACTIVELERROR
bits : 16 - 16 (1 bit)

INITDELAYERROR : INITDELAYERROR
bits : 17 - 17 (1 bit)

RCVLENGTHERROR : RCVLENGTHERROR
bits : 18 - 18 (1 bit)

SEMATIMEOUTERROR : SEMATIMEOUTERROR
bits : 19 - 19 (1 bit)

SEMAWASPREEMPT : SEMAWASPREEMPT
bits : 20 - 20 (1 bit)

TXRXSKIP : TXRXSKIP
bits : 21 - 21 (1 bit)

ACTIVE2ERROR : ACTIVE2ERROR
bits : 22 - 22 (1 bit)

CONFIGERROR : CONFIGERROR
bits : 23 - 23 (1 bit)

TXOK : TXOK
bits : 24 - 24 (1 bit)

DONE : DONE
bits : 25 - 25 (1 bit)

RCVTIMEOUT : RCVTIMEOUT
bits : 26 - 26 (1 bit)

RCVNOMD : RCVNOMD
bits : 27 - 27 (1 bit)

RCVCMD : RCVCMD
bits : 28 - 28 (1 bit)

TIMECAPTURETRIG : TIMECAPTURETRIG
bits : 29 - 29 (1 bit)

RCVCRCERR : RCVCRCERR
bits : 30 - 30 (1 bit)

RCVOK : RCVOK
bits : 31 - 31 (1 bit)


MANAESCLEARTEXT2REG

ManAesClearText2 register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MANAESCLEARTEXT2REG MANAESCLEARTEXT2REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AES_CLEAR_95_64

AES_CLEAR_95_64 : AES_CLEAR_95_64
bits : 0 - 31 (32 bit)


MANAESCLEARTEXT3REG

ManAesClearText3 register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MANAESCLEARTEXT3REG MANAESCLEARTEXT3REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AES_CLEAR_127_96

AES_CLEAR_127_96 : AES_CLEAR_127_96
bits : 0 - 31 (32 bit)


MANAESCIPHERTEXT0REG

ManAESCipherText0 register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

MANAESCIPHERTEXT0REG MANAESCIPHERTEXT0REG read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AES_CIPHER_31_0

AES_CIPHER_31_0 : AES_CIPHER_31_0
bits : 0 - 31 (32 bit)


MANAESCIPHERTEXT1REG

ManAESCipherText1 register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

MANAESCIPHERTEXT1REG MANAESCIPHERTEXT1REG read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AES_CIPHER_63_32

AES_CIPHER_63_32 : AES_CIPHER_63_32
bits : 0 - 31 (32 bit)


MANAESCIPHERTEXT2 (MANAESCIPHERTEXT2REG)

ManAESCipherText2 register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

MANAESCIPHERTEXT2 MANAESCIPHERTEXT2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AES_CIPHER_95_64

AES_CIPHER_95_64 : AES_CIPHER_95_64
bits : 0 - 31 (32 bit)


MANAESCIPHERTEXT3REG

ManAESCipherText3 register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

MANAESCIPHERTEXT3REG MANAESCIPHERTEXT3REG read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AES_CIPHER_127_96

AES_CIPHER_127_96 : AES_CIPHER_127_96
bits : 0 - 31 (32 bit)


MANAESCMDREG

ManAESCmd register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MANAESCMDREG MANAESCMDREG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 START INTENA

START : START
bits : 0 - 0 (1 bit)

INTENA : INTENA
bits : 1 - 1 (1 bit)


MANAESSTATREG

ManAESStat register
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

MANAESSTATREG MANAESSTATREG read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUSY

BUSY : BUSY
bits : 0 - 0 (1 bit)


AESLEPRIVPOINTERREG

AesLePrivPointer register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AESLEPRIVPOINTERREG AESLEPRIVPOINTERREG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 POINTER

POINTER : POINTER
bits : 0 - 23 (24 bit)


AESLEPRIVHASHREG

AesLePrivHash register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AESLEPRIVHASHREG AESLEPRIVHASHREG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HASH

HASH : HASH
bits : 0 - 23 (24 bit)


AESLEPRIVPRANDREG

AesLePrivPrand register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AESLEPRIVPRANDREG AESLEPRIVPRANDREG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRAND

PRAND : PRAND
bits : 0 - 23 (24 bit)


AESLEPRIVCMDREG

AesLePrivCmd register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AESLEPRIVCMDREG AESLEPRIVCMDREG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 START INTENA NBKEYS

START : START
bits : 0 - 0 (1 bit)

INTENA : INTENA
bits : 1 - 1 (1 bit)

NBKEYS : NBKEYS
bits : 2 - 9 (8 bit)


AESLEPRIVSTATREG

AesLePrivStat register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

AESLEPRIVSTATREG AESLEPRIVSTATREG read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUSY KEYFND KEYFNDINDEX

BUSY : BUSY
bits : 0 - 0 (1 bit)

KEYFND : KEYFND
bits : 1 - 1 (1 bit)

KEYFNDINDEX : KEYFNDINDEX
bits : 2 - 9 (8 bit)


DEBUGCMDREG

DebugCmd register
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DEBUGCMDREG DEBUGCMDREG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLEARDEBUGINT SEQDEBUGMODE SEQDEBUGBUSSEL AESDEBUGMODE

CLEARDEBUGINT : CLEARDEBUGINT
bits : 0 - 0 (1 bit)

SEQDEBUGMODE : SEQDEBUGMODE
bits : 1 - 1 (1 bit)

SEQDEBUGBUSSEL : SEQDEBUGBUSSEL
bits : 2 - 5 (4 bit)

AESDEBUGMODE : AESDEBUGMODE
bits : 16 - 19 (4 bit)


DEBUGSTATUSREG

DebugStatus register
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

DEBUGSTATUSREG DEBUGSTATUSREG read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SEQERROR_0 SEQERROR_1 SEQERROR_2 SEQERROR_3 SEQERROR_4 SEQERROR_5 AESDBG_0 AESDBG_1 AESDBG_2 AESDBG_3

SEQERROR_0 : SEQERROR_0
bits : 0 - 0 (1 bit)

SEQERROR_1 : SEQERROR_1
bits : 1 - 1 (1 bit)

SEQERROR_2 : SEQERROR_2
bits : 2 - 2 (1 bit)

SEQERROR_3 : SEQERROR_3
bits : 3 - 3 (1 bit)

SEQERROR_4 : SEQERROR_4
bits : 4 - 4 (1 bit)

SEQERROR_5 : SEQERROR_5
bits : 5 - 5 (1 bit)

AESDBG_0 : AESDBG_0
bits : 16 - 16 (1 bit)

AESDBG_1 : AESDBG_1
bits : 17 - 17 (1 bit)

AESDBG_2 : AESDBG_2
bits : 18 - 18 (1 bit)

AESDBG_3 : AESDBG_3
bits : 19 - 19 (1 bit)


SPARE

SpareReg register
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SPARE SPARE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

INTERRUPT2REG

Interrupt2 register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTERRUPT2REG INTERRUPT2REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AESMANENCINT AESLEPRIVINT

AESMANENCINT : AESMANENCINT
bits : 0 - 0 (1 bit)

AESLEPRIVINT : AESLEPRIVINT
bits : 1 - 1 (1 bit)


TIMEOUTDEST (TIMEOUTDESTREG)

TimeoutDest register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMEOUTDEST TIMEOUTDEST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DESTINATION

DESTINATION : DESTINATION
bits : 0 - 1 (2 bit)



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