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GPIOB

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :

Registers

MODER

IDR

ODR

BSRR

LCKR

AFRL

AFRH

BRR

OTYPER

OSPEEDR

PUPDR


MODER

GPIO port mode register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODER MODER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MODE0 MODE1 MODE2 MODE3 MODE4 MODE5 MODE6 MODE7 MODE8 MODE9 MODE10 MODE11 MODE12 MODE13 MODE14 MODE15

MODE0 : Port B configuration bit 0
bits : 0 - 1 (2 bit)

MODE1 : Port B configuration bit 1
bits : 2 - 3 (2 bit)

MODE2 : Port B configuration bit 2
bits : 4 - 5 (2 bit)

MODE3 : Port B configuration bit 3
bits : 6 - 7 (2 bit)

MODE4 : Port B configuration bit 4
bits : 8 - 9 (2 bit)

MODE5 : Port B configuration bit 5
bits : 10 - 11 (2 bit)

MODE6 : Port B configuration bit 6
bits : 12 - 13 (2 bit)

MODE7 : Port B configuration bit 7
bits : 14 - 15 (2 bit)

MODE8 : Port B configuration bit 8
bits : 16 - 17 (2 bit)

MODE9 : Port B configuration bit 9
bits : 18 - 19 (2 bit)

MODE10 : Port B configuration bit 10
bits : 20 - 21 (2 bit)

MODE11 : Port B configuration bit 11
bits : 22 - 23 (2 bit)

MODE12 : Port B configuration bit 12
bits : 24 - 25 (2 bit)

MODE13 : Port B configuration bit 13
bits : 26 - 27 (2 bit)

MODE14 : Port B configuration bit 14
bits : 28 - 29 (2 bit)

MODE15 : Port B configuration bit 15
bits : 30 - 31 (2 bit)


IDR

GPIO port input data register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IDR IDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID0 ID1 ID2 ID3 ID4 ID5 ID6 ID7 ID8 ID9 ID10 ID11 ID12 ID13 ID14 ID15

ID0 : Port B input data bit 0
bits : 0 - 0 (1 bit)

ID1 : Port B input data bit 1
bits : 1 - 1 (1 bit)

ID2 : Port B input data bit 2
bits : 2 - 2 (1 bit)

ID3 : Port B input data bit 3
bits : 3 - 3 (1 bit)

ID4 : Port B input data bit 4
bits : 4 - 4 (1 bit)

ID5 : Port B input data bit 5
bits : 5 - 5 (1 bit)

ID6 : Port B input data bit 6
bits : 6 - 6 (1 bit)

ID7 : Port B input data bit 7
bits : 7 - 7 (1 bit)

ID8 : Port B input data bit 8
bits : 8 - 8 (1 bit)

ID9 : Port B input data bit 9
bits : 9 - 9 (1 bit)

ID10 : Port B input data bit 10
bits : 10 - 10 (1 bit)

ID11 : Port B input data bit 11
bits : 11 - 11 (1 bit)

ID12 : Port B input data bit 12
bits : 12 - 12 (1 bit)

ID13 : Port B input data bit 13
bits : 13 - 13 (1 bit)

ID14 : Port B input data bit 14
bits : 14 - 14 (1 bit)

ID15 : Port B input data bit 15
bits : 15 - 15 (1 bit)


ODR

GPIO port output data register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODR ODR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OD0 OD1 OD2 OD3 OD4 OD5 OD6 OD7 OD8 OD9 OD10 OD11 OD12 OD13 OD14 OD15

OD0 : Port B output data bit 0
bits : 0 - 0 (1 bit)

OD1 : Port B output data bit 1
bits : 1 - 1 (1 bit)

OD2 : Port B output data bit 2
bits : 2 - 2 (1 bit)

OD3 : Port B output data bit 3
bits : 3 - 3 (1 bit)

OD4 : Port B output data bit 4
bits : 4 - 4 (1 bit)

OD5 : Port B output data bit 5
bits : 5 - 5 (1 bit)

OD6 : Port B output data bit 6
bits : 6 - 6 (1 bit)

OD7 : Port B output data bit 7
bits : 7 - 7 (1 bit)

OD8 : Port B output data bit 8
bits : 8 - 8 (1 bit)

OD9 : Port B output data bit 9
bits : 9 - 9 (1 bit)

OD10 : Port B output data bit 10
bits : 10 - 10 (1 bit)

OD11 : Port B output data bit 11
bits : 11 - 11 (1 bit)

OD12 : Port B output data bit 12
bits : 12 - 12 (1 bit)

OD13 : Port B output data bit 13
bits : 13 - 13 (1 bit)

OD14 : Port B output data bit 14
bits : 14 - 14 (1 bit)

OD15 : Port B output data bit 15
bits : 15 - 15 (1 bit)


BSRR

GPIO port A bit set/reset register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BSRR BSRR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BS0 BS1 BS2 BS3 BS4 BS5 BS6 BS7 BS8 BS9 BS10 BS11 BS12 BS13 BS14 BS15 BR0 BR1 BR2 BR3 BR4 BR5 BR6 BR7 BR8 BR9 BR10 BR11 BR12 BR13 BR14 BR15

BS0 : Port B set bit 0
bits : 0 - 0 (1 bit)

BS1 : Port B set bit 1
bits : 1 - 1 (1 bit)

BS2 : Port B set bit 2
bits : 2 - 2 (1 bit)

BS3 : Port B set bit 3
bits : 3 - 3 (1 bit)

BS4 : Port B set bit 4
bits : 4 - 4 (1 bit)

BS5 : Port B set bit 5
bits : 5 - 5 (1 bit)

BS6 : Port B set bit 6
bits : 6 - 6 (1 bit)

BS7 : Port B set bit 7
bits : 7 - 7 (1 bit)

BS8 : Port B set bit 8
bits : 8 - 8 (1 bit)

BS9 : Port B set bit 9
bits : 9 - 9 (1 bit)

BS10 : Port B set bit 10
bits : 10 - 10 (1 bit)

BS11 : Port B set bit 11
bits : 11 - 11 (1 bit)

BS12 : Port B set bit 12
bits : 12 - 12 (1 bit)

BS13 : Port B set bit 13
bits : 13 - 13 (1 bit)

BS14 : Port B set bit 14
bits : 14 - 14 (1 bit)

BS15 : Port B set bit 15
bits : 15 - 15 (1 bit)

BR0 : Port B set bit 0
bits : 16 - 16 (1 bit)

BR1 : Port B reset bit 1
bits : 17 - 17 (1 bit)

BR2 : Port B reset bit 2
bits : 18 - 18 (1 bit)

BR3 : Port B reset bit 3
bits : 19 - 19 (1 bit)

BR4 : Port B reset bit 4
bits : 20 - 20 (1 bit)

BR5 : Port B reset bit 5
bits : 21 - 21 (1 bit)

BR6 : Port B reset bit 6
bits : 22 - 22 (1 bit)

BR7 : Port B reset bit 7
bits : 23 - 23 (1 bit)

BR8 : Port B reset bit 8
bits : 24 - 24 (1 bit)

BR9 : Port B reset bit 9
bits : 25 - 25 (1 bit)

BR10 : Port B reset bit 10
bits : 26 - 26 (1 bit)

BR11 : Port B reset bit 11
bits : 27 - 27 (1 bit)

BR12 : Port B reset bit 12
bits : 28 - 28 (1 bit)

BR13 : Port B reset bit 13
bits : 29 - 29 (1 bit)

BR14 : Port B reset bit 14
bits : 30 - 30 (1 bit)

BR15 : Port B reset bit 15
bits : 31 - 31 (1 bit)


LCKR

GPIO port configuration lock register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LCKR LCKR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LCK0 LCK1 LCK2 LCK3 LCK4 LCK5 LCK6 LCK7 LCK8 LCK9 LCK10 LCK11 LCK12 LCK13 LCK14 LCK15 LCKK

LCK0 : Port B lock bit 0
bits : 0 - 0 (1 bit)

LCK1 : Port B lock bit 1
bits : 1 - 1 (1 bit)

LCK2 : Port B lock bit 2
bits : 2 - 2 (1 bit)

LCK3 : Port B lock bit 3
bits : 3 - 3 (1 bit)

LCK4 : Port B lock bit 4
bits : 4 - 4 (1 bit)

LCK5 : Port B lock bit 5
bits : 5 - 5 (1 bit)

LCK6 : Port B lock bit 6
bits : 6 - 6 (1 bit)

LCK7 : Port B lock bit 7
bits : 7 - 7 (1 bit)

LCK8 : Port B lock bit 8
bits : 8 - 8 (1 bit)

LCK9 : Port B lock bit 9
bits : 9 - 9 (1 bit)

LCK10 : Port B lock bit 10
bits : 10 - 10 (1 bit)

LCK11 : Port B lock bit 11
bits : 11 - 11 (1 bit)

LCK12 : Port B lock bit 12
bits : 12 - 12 (1 bit)

LCK13 : Port B lock bit 13
bits : 13 - 13 (1 bit)

LCK14 : Port B lock bit 14
bits : 14 - 14 (1 bit)

LCK15 : Port B lock bit 15
bits : 15 - 15 (1 bit)

LCKK : Lock key. This bit can be read any time. It can only be modified using the lock key write sequence.
bits : 16 - 16 (1 bit)


AFRL

GPIO alternate function low register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AFRL AFRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AFSEL0 AFSEL1 AFSEL2 AFSEL3 AFSEL4 AFSEL5 AFSEL6 AFSEL7

AFSEL0 : Alternate function selection for port A bit 0
bits : 0 - 3 (4 bit)

AFSEL1 : Alternate function selection for port A bit 1
bits : 4 - 7 (4 bit)

AFSEL2 : Alternate function selection for port A bit 2
bits : 8 - 11 (4 bit)

AFSEL3 : Alternate function selection for port A bit 3
bits : 12 - 15 (4 bit)

AFSEL4 : Alternate function selection for port A bit 4
bits : 16 - 19 (4 bit)

AFSEL5 : Alternate function selection for port A bit 5
bits : 20 - 23 (4 bit)

AFSEL6 : Alternate function selection for port A bit 6
bits : 24 - 27 (4 bit)

AFSEL7 : Alternate function selection for port A bit 7
bits : 28 - 31 (4 bit)


AFRH

GPIO alternate function high register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AFRH AFRH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AFSEL8 AFSEL9 AFSEL10 AFSEL11 AFSEL12 AFSEL13 AFSEL14 AFSEL15

AFSEL8 : Alternate function selection for port A bit 8
bits : 0 - 3 (4 bit)

AFSEL9 : Alternate function selection for port A bit 9
bits : 4 - 7 (4 bit)

AFSEL10 : Alternate function selection for port A bit 10
bits : 8 - 11 (4 bit)

AFSEL11 : Alternate function selection for port A bit 11
bits : 12 - 15 (4 bit)

AFSEL12 : Alternate function selection for port A bit 12
bits : 16 - 19 (4 bit)

AFSEL13 : Alternate function selection for port A bit 13
bits : 20 - 23 (4 bit)

AFSEL14 : Alternate function selection for port A bit 14
bits : 24 - 27 (4 bit)

AFSEL15 : Alternate function selection for port A bit 15
bits : 28 - 31 (4 bit)


BRR

GPIO alternate function high register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BRR BRR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BR0 BR1 BR2 BR3 BR4 BR5 BR6 BR7 BR8 BR9 BR10 BR11 BR12 BR13 BR14 BR15

BR0 : Port B output data bit 0
bits : 0 - 0 (1 bit)

BR1 : Port B output data bit 1
bits : 1 - 1 (1 bit)

BR2 : Port B output data bit 2
bits : 2 - 2 (1 bit)

BR3 : Port B output data bit 3
bits : 3 - 3 (1 bit)

BR4 : Port B output data bit 4
bits : 4 - 4 (1 bit)

BR5 : Port B output data bit 5
bits : 5 - 5 (1 bit)

BR6 : Port B output data bit 6
bits : 6 - 6 (1 bit)

BR7 : Port B output data bit 7
bits : 7 - 7 (1 bit)

BR8 : Port B output data bit 8
bits : 8 - 8 (1 bit)

BR9 : Port B output data bit 9
bits : 9 - 9 (1 bit)

BR10 : Port B output data bit 10
bits : 10 - 10 (1 bit)

BR11 : Port B output data bit 11
bits : 11 - 11 (1 bit)

BR12 : Port B output data bit 12
bits : 12 - 12 (1 bit)

BR13 : Port B output data bit 13
bits : 13 - 13 (1 bit)

BR14 : Port B output data bit 14
bits : 14 - 14 (1 bit)

BR15 : Port B output data bit 15
bits : 15 - 15 (1 bit)


OTYPER

GPIO port output type register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OTYPER OTYPER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OT0 OT1 OT2 OT3 OT4 OT5 OT6 OT7 OT8 OT9 OT10 OT11 OT12 OT13 OT14 OT15

OT0 : Port B configuration bit 0
bits : 0 - 0 (1 bit)

OT1 : Port B configuration bit 1
bits : 1 - 1 (1 bit)

OT2 : Port B configuration bit 2
bits : 2 - 2 (1 bit)

OT3 : Port B configuration bit 3
bits : 3 - 3 (1 bit)

OT4 : Port B configuration bit 4
bits : 4 - 4 (1 bit)

OT5 : Port B configuration bit 5
bits : 5 - 5 (1 bit)

OT6 : Port B configuration bit 6
bits : 6 - 6 (1 bit)

OT7 : Port B configuration bit 7
bits : 7 - 7 (1 bit)

OT8 : Port B configuration bit 8
bits : 8 - 8 (1 bit)

OT9 : Port B configuration bit 9
bits : 9 - 9 (1 bit)

OT10 : Port B configuration bit 10
bits : 10 - 10 (1 bit)

OT11 : Port B configuration bit 11
bits : 11 - 11 (1 bit)

OT12 : Port B configuration bit 12
bits : 12 - 12 (1 bit)

OT13 : Port B configuration bit 13
bits : 13 - 13 (1 bit)

OT14 : Port B configuration bit 14
bits : 14 - 14 (1 bit)

OT15 : Port B configuration bit 15
bits : 15 - 15 (1 bit)


OSPEEDR

GPIO port output speed register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSPEEDR OSPEEDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OSPEED0 OSPEED1 OSPEED2 OSPEED3 OSPEED4 OSPEED5 OSPEED6 OSPEED7 OSPEED8 OSPEED9 OSPEED10 OSPEED11 OSPEED12 OSPEED13 OSPEED14 OSPEED15

OSPEED0 : Port B configuration bit 0
bits : 0 - 1 (2 bit)

OSPEED1 : Port B configuration bit 1
bits : 2 - 3 (2 bit)

OSPEED2 : Port B configuration bit 2
bits : 4 - 5 (2 bit)

OSPEED3 : Port B configuration bit 3
bits : 6 - 7 (2 bit)

OSPEED4 : Port B configuration bit 4
bits : 8 - 9 (2 bit)

OSPEED5 : Port B configuration bit 5
bits : 10 - 11 (2 bit)

OSPEED6 : Port B configuration bit 6
bits : 12 - 13 (2 bit)

OSPEED7 : Port B configuration bit 7
bits : 14 - 15 (2 bit)

OSPEED8 : Port B configuration bit 8
bits : 16 - 17 (2 bit)

OSPEED9 : Port B configuration bit 9
bits : 18 - 19 (2 bit)

OSPEED10 : Port B configuration bit 10
bits : 20 - 21 (2 bit)

OSPEED11 : Port B configuration bit 11
bits : 22 - 23 (2 bit)

OSPEED12 : Port B configuration bit 12
bits : 24 - 25 (2 bit)

OSPEED13 : Port B configuration bit 13
bits : 26 - 27 (2 bit)

OSPEED14 : Port B configuration bit 14
bits : 28 - 29 (2 bit)

OSPEED15 : Port B configuration bit 15
bits : 30 - 31 (2 bit)


PUPDR

GPIO port pull-up/pull-down register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUPDR PUPDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PUPD0 PUPD1 PUPD2 PUPD3 PUPD4 PUPD5 PUPD6 PUPD7 PUPD8 PUPD9 PUPD10 PUPD11 PUPD12 PUPD13 PUPD14 PUPD15

PUPD0 : Port B configuration bit 0
bits : 0 - 1 (2 bit)

PUPD1 : Port B configuration bit 1
bits : 2 - 3 (2 bit)

PUPD2 : Port B configuration bit 2
bits : 4 - 5 (2 bit)

PUPD3 : Port B configuration bit 3
bits : 6 - 7 (2 bit)

PUPD4 : Port B configuration bit 4
bits : 8 - 9 (2 bit)

PUPD5 : Port B configuration bit 5
bits : 10 - 11 (2 bit)

PUPD6 : Port B configuration bit 6
bits : 12 - 13 (2 bit)

PUPD7 : Port B configuration bit7
bits : 14 - 15 (2 bit)

PUPD8 : Port B configuration bit 8
bits : 16 - 17 (2 bit)

PUPD9 : Port B configuration bit 9
bits : 18 - 19 (2 bit)

PUPD10 : Port B configuration bit 10
bits : 20 - 21 (2 bit)

PUPD11 : Port B configuration bit 11
bits : 22 - 23 (2 bit)

PUPD12 : Port B configuration bit 12
bits : 24 - 25 (2 bit)

PUPD13 : Port B configuration bit 13
bits : 26 - 27 (2 bit)

PUPD14 : Port B configuration bit 14
bits : 28 - 29 (2 bit)

PUPD15 : Port B configuration bit 15
bits : 30 - 31 (2 bit)



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