\n
address_offset : 0x0 Bytes (0x0)
size : 0x24 byte (0x0)
mem_usage : registers
protection :
Configuration for FIM Operation Mode and Interrupt Control
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
LATCH_MODE : Enable latch mode
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
1 : Enable
Enable latch mode enable of FIM
0 : Disable
Disable latch mode enable of FIM
End of enumeration elements list.
OPER_MODE : Indicates the Mode of Operation to be performed.
bits : 1 - 9 (9 bit)
access : read-write
RESERVED1 : reserved1
bits : 9 - 18 (10 bit)
access : read-only
INTR_CLEAR : Writing 1 to this bit clears the interrupt
bits : 10 - 20 (11 bit)
access : write-only
Enumeration:
1 : Enable
Enable to clear interrupt
0 : Disable
Disable to clear interrupt
End of enumeration elements list.
RESERVED2 : reserved2
bits : 11 - 42 (32 bit)
access : read-only
Indicates the Input Scalar Data for Scalar Operations indicates the feedback coefficient for IIR Operations
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
SCALAR_POLE_DATA1 : Pole 0/Scalar Value
bits : 0 - 31 (32 bit)
access : read-write
Feedback coefficient for IIR filter operation
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
POLE_DATA2 : Indicates the feedback coefficient for IIR Operations
bits : 0 - 31 (32 bit)
access : read-write
Configuration for precision of Output Data for FIM Operations
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
SAT_VAL : Indicates the number of MSB's to be saturated for Output Data
bits : 0 - 4 (5 bit)
access : read-write
RESERVED1 : reserved1
bits : 5 - 14 (10 bit)
access : read-only
SHIFT_VAL : Indicates the number of bits to be right-shifted for Output Data
bits : 10 - 25 (16 bit)
access : read-write
RESERVED2 : reserved2
bits : 18 - 49 (32 bit)
access : read-only
Configuration Register for FIM Operations.
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
MAT_LEN : Indicates the number of columns in 1st input for Matrix Multiplication. This is same as number of rows in 2nd input for Matrix Multiplication.
bits : 0 - 5 (6 bit)
access : read-write
INP1_LEN : Indicates the length of 1st input for FIM Operations other than filtering (FIR, IIR) and Interpolation
bits : 6 - 21 (16 bit)
access : read-write
INP2_LEN : Indicates the length of 2nd input for FIM Operations other than filtering (FIR, IIR) and Interpolation.
bits : 16 - 41 (26 bit)
access : read-write
RESERVED1 : reserved1
bits : 26 - 57 (32 bit)
access : read-only
Configuration Register for FIM Operations
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
START_OPER : Start trigger for the FIM operations,this is reset upon write register
bits : 0 - 0 (1 bit)
access : write-only
Enumeration:
1 : Enable
Enable start operation
0 : Disable
Disable start operation
End of enumeration elements list.
RES : reserved5
bits : 1 - 8 (8 bit)
access : read-only
CPLX_FLAG : Complex Flag,not valid in matrix mode
bits : 8 - 17 (10 bit)
access : read-write
Enumeration:
0x0 : Real_Real
input1 and input2 both are real
0x1 : Real_Complex
input1 is real and input2 is complex
0x2 : Complex_Real
input1 is complex and input2 is real
0x3 : Complex_Complex
input1 and input2 both are complex
End of enumeration elements list.
COL_M2 : Indicates the number of columns in 2nd input for Matrix Multiplication
bits : 10 - 25 (16 bit)
access : read-write
ROW_M1 : Indicates the number of rows in 1st input for Matrix Multiplication
bits : 16 - 37 (22 bit)
access : read-write
INTRP_FAC : Indicates the Interpolation Factor
bits : 22 - 49 (28 bit)
access : read-write
RESERVED1 : reserved1
bits : 28 - 59 (32 bit)
access : read-only
This register used for COP input address for 0 register.
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
INP1_ADDR : Indicates the Start Address of 1st Input Data for FIM Operations
bits : 0 - 12 (13 bit)
access : read-write
RESERVED1 : reserved1
bits : 13 - 44 (32 bit)
access : read-only
This register used for COP input address for 1 register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
INP2_ADDR : Indicates the Start Address of 2nd Input Data for FIM Operations
bits : 0 - 12 (13 bit)
access : read-write
RESERVED1 : reserved1
bits : 13 - 44 (32 bit)
access : read-only
Memory Offset Address for Output from FIM Operations
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
OUT_ADDR : Indicates the Start Address of Output Data for FIM Operations
bits : 0 - 12 (13 bit)
access : read-write
RESERVED1 : reserved1
bits : 13 - 44 (32 bit)
access : read-only
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