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IR

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : registers
protection :

Registers

OFF_TIME_DURATION

CONFIG

MEM_ADDR_ACCESS

MEM_READ

ON_TIME_DURATION

FRAME_DONE_THRESHOLD

DET_THRESHOLD


OFF_TIME_DURATION

This register used for IR sleep duration timer value.
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

OFF_TIME_DURATION OFF_TIME_DURATION read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IR_OFF_TIME_DURATION RES

IR_OFF_TIME_DURATION : This field define ir off time
bits : 0 - 16 (17 bit)
access : read-write

RES : reserved5
bits : 17 - 48 (32 bit)
access : read-only


CONFIG

This register used to configure the ir structure for application purpose.
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

CONFIG CONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EN_IR_DET IR_DET_RSTART EN_CLK_IR_CORE RES EN_CONT_IR_DET RES1 SREST_IR_CORE RES2

EN_IR_DET : Enable IR detection logic bit if bit 1 then detection enable if 0 then not enable.
bits : 0 - 0 (1 bit)
access : read-write

IR_DET_RSTART : Enable IR detection re-start logic bit if bit 1 then re-start.
bits : 1 - 2 (2 bit)
access : read-write

EN_CLK_IR_CORE : Enable 32KHz clock to IR Core bit ,if bit 1 then clock gating disable and bit is 0 then clock gating Enable
bits : 2 - 4 (3 bit)
access : read-write

RES : reserved5
bits : 3 - 10 (8 bit)
access : read-only

EN_CONT_IR_DET : This bit is Enable continues IR detection,When enabled there will be no power cycling on External IR Sensor.
bits : 8 - 16 (9 bit)
access : read-write

RES1 : reserved6
bits : 9 - 24 (16 bit)
access : read-only

SREST_IR_CORE : This bit is used soft reset IR core block
bits : 16 - 32 (17 bit)
access : read-write

RES2 : reserved7
bits : 17 - 48 (32 bit)
access : read-only


MEM_ADDR_ACCESS

This register used to access memory address for application purpose.
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

MEM_ADDR_ACCESS MEM_ADDR_ACCESS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IR_MEM_ADDR RES IR_MEM_RD_EN RES1

IR_MEM_ADDR : This field is used to IR read address.
bits : 0 - 6 (7 bit)
access : read-write

RES : reserved5
bits : 7 - 15 (9 bit)
access : read-only

IR_MEM_RD_EN : This field used to IR memory read enable.
bits : 9 - 18 (10 bit)
access : read-write

RES1 : reserved6
bits : 10 - 41 (32 bit)
access : read-only


MEM_READ

This register used to IR Read data from memory.
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0

MEM_READ MEM_READ read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IR_MEM_DATA_OUT RES IR_DATA_MEM_DEPTH RES1

IR_MEM_DATA_OUT : This field is used to IR Read data from memory.
bits : 0 - 15 (16 bit)
access : read-only

RES : reserved5
bits : 16 - 39 (24 bit)
access : read-only

IR_DATA_MEM_DEPTH : This field used to indicated valid number of IR Address in the memory to be read.
bits : 24 - 54 (31 bit)
access : read-only

RES1 : reserved6
bits : 31 - 62 (32 bit)
access : read-only


ON_TIME_DURATION

This register used for IR Detection duration timer value.
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

ON_TIME_DURATION ON_TIME_DURATION read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IR_ON_TIME_DURATION RES

IR_ON_TIME_DURATION : This field define ir on time for ir detection on
bits : 0 - 11 (12 bit)
access : read-write

RES : reserved5
bits : 12 - 43 (32 bit)
access : read-only


FRAME_DONE_THRESHOLD

This register used count with respect to 32KHz clock after not more toggle are expected to a given pattern.
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

FRAME_DONE_THRESHOLD FRAME_DONE_THRESHOLD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IR_FRAME_DONE_THRESHOLD RES

IR_FRAME_DONE_THRESHOLD : count with respect to 32KHz clock after not more toggle are expected to a given pattern
bits : 0 - 14 (15 bit)
access : read-write

RES : reserved5
bits : 15 - 46 (32 bit)
access : read-only


DET_THRESHOLD

This register used Minimum Number of edges to detected during on-time failing which IR detection is re-stated.
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

DET_THRESHOLD DET_THRESHOLD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IR_DET_THRESHOLD RES

IR_DET_THRESHOLD : Minimum Number of edges to detected during on-time failing which IR detection is re-stated.
bits : 0 - 6 (7 bit)
access : read-write

RES : reserved5
bits : 7 - 38 (32 bit)
access : read-only



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