\n
address_offset : 0x0 Bytes (0x0)
size : 0x48 byte (0x0)
mem_usage : registers
protection :
Miscellaneous Clock Configuration Register1
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
RESERVED1 : It is recommended to retain the contents by using read/modify write to this register.
bits : 0 - 15 (16 bit)
access : read-write
MCUHP_CCI_CLK_SYNC_EN : Specifies the clock dependency w.r.t processor clock used for MCUHP CCI
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : 0
Independent clock source
1 : 1
Undivided version of Processor Clock
End of enumeration elements list.
RESERVED2 : It is recommended to retain the contents by using read/modify write to this register.
bits : 17 - 48 (32 bit)
access : read-write
Miscellaneous Clock Configuration Register1
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
RESERVED1 : It is recommended to retain the contents by using read/modify write to this register.
bits : 0 - 22 (23 bit)
access : read-write
MCUHP_I2S_MASTER_SLAVE_MODE : Writing 1 to this configures I2S controller to Master Mode.Writing 0 to this configures I2S controller to Slave Mode.
bits : 23 - 46 (24 bit)
access : read-write
RESERVED2 : It is recommended to retain the contents by using read/modify write to this register.
bits : 24 - 55 (32 bit)
access : read-write
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