Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection :
Enables power for UULP-PERIPHERALS domains
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
RESERVED1 : It is recommended to write these bits to 0.
bits : 0 - 0 (1 bit)
access : read-write
PWRCTRL_BBFFS : It is enable power control to BBFFS.
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : Disable
Writing 0 to this has no effect.
1 : Enable
Writing 1 to this enables power to the BBFFS.
End of enumeration elements list.
PWRCTRL_FSM : It is enable power control to FSM.
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : Disable
Writing 0 to this has no effect.
1 : Enable
Writing 1 to this enables power to the FSM.
End of enumeration elements list.
PWRCTRL_RTC : It is enable power control to RTC.
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : Disable
Writing 0 to this has no effect.
1 : Enable
Writing 1 to this enables power to the RTC.
End of enumeration elements list.
PWRCTRL_WDT : It is enable power control to WDT.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : Disable
Writing 0 to this has no effect.
1 : Enable
Writing 1 to this enables power to the WDT.
End of enumeration elements list.
PWRCTRL_PS : It is enable power control to PS.
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
0 : Disable
Writing 0 to this has no effect.
1 : Enable
Writing 1 to this enables power to the PS.
End of enumeration elements list.
PWRCTRL_TS : Writing 1 to this enables power to the TS.
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
0 : Disable
Writing 0 to this has no effect.
1 : Enable
Writing 1 to this enables power to the PS.
End of enumeration elements list.
PWRCTRL_STORAGE_DOMAIN1 : Writing 1 to this enables power to the STORAGE-DOMAIN1.
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : Disable
Writing 0 to this has no effect.
1 : Enable
Writing 1 to this enables power to the STORAGE-DOMAIN1.
End of enumeration elements list.
PWRCTRL_STORAGE_DOMAIN2 : Writing 1 to this enables power to the STORAGE-DOMAIN2.
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : Disable
Writing 0 to this has no effect.
1 : Enable
Writing 1 to this enables power to the STORAGE-DOMAIN2.
End of enumeration elements list.
PWRCTRL_STORAGE_DOMAIN3 : Writing 1 to this enables power to the STORAGE-DOMAIN3.
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : Disable
Writing 0 to this has no effect.
1 : Enable
Writing 1 to this enables power to the STORAGE-DOMAIN3.
End of enumeration elements list.
PWRCTRL_CLOCK_CALIB : Writing 1 to this enables power to the CLOCK-CALIB.
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : Disable
Writing 0 to this has no effect.
1 : Enable
Writing 1 to this enables power to the CLOCK-CALIB.
End of enumeration elements list.
RESERVED2 : It is recommended to write these bits to 0.
bits : 11 - 42 (32 bit)
access : read-write
SHIP Mode Entry/Exit Configuration Register.
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
ENTER_SHELF_MODE : Writing 0xAAAA to this provides immediate trigger to SHIP mode.
bits : 0 - 15 (16 bit)
access : write-only
SHUTDOWN_WAKEUP_CFG : Enables the Wakeup trigger from SHIP mode based on rising edge of the below combinations.
bits : 16 - 33 (18 bit)
access : read-write
Enumeration:
00 : 00
UULP Vbat GPIO 2.
1 : 01
UULP Vbat GPIO 3.
2 : 10
UULP Vbat GPIO2 AND UULP Vbat GPIO3
3 : 11
UULP Vbat GPIO 2 OR UULP Vbat GPIO3.
End of enumeration elements list.
SHIP_MODE_ENTRY_CFG : Configures the Trigger for entering SHIP mode.Writing 1 to this enable entry to SHIP mode on Falling edge on the UULP Vbat GPIO configuration as mentioned in SHUTDOWN_WAKEUP_CFG.
bits : 18 - 36 (19 bit)
access : read-write
RESET_TIME_FROM_SHIP_MODE : Configures the Reset time in number of clocks @32KHz RC Clock during exit from SHIP mode.
bits : 19 - 40 (22 bit)
access : read-write
RESERVED1 : It is recommended to write these bits to 0.
bits : 22 - 53 (32 bit)
access : read-write
Disables power for UULP-PERIPHERALS domains
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
RESERVED1 : It is recommended to write these bits to 0.
bits : 0 - 0 (1 bit)
access : read-write
PWRCTRL_BBFFS : It is disable power control to BBFFS.
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : Disable
Writing 0 to this has no effect.
1 : Enable
Writing 1 to this disables power to the BBFFS.
End of enumeration elements list.
PWRCTRL_FSM : It is disable power control to FSM.
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : Disable
Writing 0 to this has no effect.
1 : Enable
Writing 1 to this disables power to the FSM.
End of enumeration elements list.
PWRCTRL_RTC : It is disable power control to RTC.
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : Disable
Writing 0 to this has no effect.
1 : Enable
Writing 1 to this disables power to the RTC.
End of enumeration elements list.
PWRCTRL_WDT : It is disable power control to WDT.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : Disable
Writing 0 to this has no effect.
1 : Enable
Writing 1 to this disables power to the WDT.
End of enumeration elements list.
PWRCTRL_PS : It is disable power control to PS.
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
0 : Disable
Writing 0 to this has no effect.
1 : Enable
Writing 1 to this disables power to the PS.
End of enumeration elements list.
PWRCTRL_TS : It is disable power control to TS.
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
0 : Disable
Writing 0 to this has no effect.
1 : Enable
Writing 1 to this disables power to the PS.
End of enumeration elements list.
PWRCTRL_STORAGE_DOMAIN1 : It is disable power control to STORAGE-DOMAIN1.
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : Disable
Writing 0 to this has no effect.
1 : Enable
Writing 1 to this disables power to the STORAGE-DOMAIN1.
End of enumeration elements list.
PWRCTRL_STORAGE_DOMAIN2 : It is disable power control to the STORAGE-DOMAIN2.
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : Disable
Writing 0 to this has no effect.
1 : Enable
Writing 1 to this enables power to the STORAGE-DOMAIN2.
End of enumeration elements list.
PWRCTRL_STORAGE_DOMAIN3 : It is disable power control to the STORAGE-DOMAIN3.
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : Disable
Writing 0 to this has no effect.
1 : Enable
Writing 1 to this enables power to the STORAGE-DOMAIN3.
End of enumeration elements list.
PWRCTRL_CLOCK_CALIB : It is disable power control to the CLOCK-CALIB.
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : Disable
Writing 0 to this has no effect.
1 : Enable
Writing 1 to this enables power to the CLOCK-CALIB.
End of enumeration elements list.
RESERVED2 : It is recommended to write these bits to 0.
bits : 11 - 42 (32 bit)
access : read-write
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