\n
address_offset : 0x0 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection :
Configuration
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSA : CS A Enable
bits : 0 - 0 (1 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
CSB : CS B Enable
bits : 1 - 2 (2 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
CSC : CS C Enable
bits : 2 - 4 (3 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
CSD : CS D Enable
bits : 3 - 6 (4 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
PEVEN : Even Parity
bits : 4 - 8 (5 bit)
Enumeration:
0 : Even
Even Parity
1 : Odd
Odd Parity
End of enumeration elements list.
PSTICK : Sticky Parity
bits : 5 - 10 (6 bit)
Enumeration:
0 : Non-stick
No Sticky Parity
1 : Stick
Sticky Parity
End of enumeration elements list.
X9 : 9-Bit Bus
bits : 6 - 12 (7 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
CEH : CS Cycle Deselect
bits : 7 - 14 (8 bit)
Enumeration:
0 : NA
No Action
1 : Insert
Deselect Inserted Between Transactions
End of enumeration elements list.
Masked External Interrupt
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PAR : Masked Parity Interrupt
bits : 0 - 0 (1 bit)
Enumeration:
0 : None
No Interrupt
1 : Interrupt
Interrupted
End of enumeration elements list.
EINT : Masked External Interrupt
bits : 1 - 2 (2 bit)
Enumeration:
0 : None
No Interrupt
1 : Interrupt
Interrupted
End of enumeration elements list.
Interrupt Clear
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
alternate_register : MIS
reset_Mask : 0x0
PAR : Parity Interrupt Clear
bits : 0 - 0 (1 bit)
Enumeration:
0 : NA
No Action
1 : Clear
Clear Interrupt
End of enumeration elements list.
EINT : External Interrupt Clear
bits : 1 - 2 (2 bit)
Enumeration:
0 : NA
No Action
1 : Clear
Clear Interrupt
End of enumeration elements list.
Error Configuration
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIMEOUT : Bus Timeout Enable
bits : 0 - 0 (1 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
Reserved0 : Reserved Storage
bits : 1 - 3 (3 bit)
Enumeration:
0 : Zero
A Zero
1 : One
A One
2 : Two
A Two
3 : Three
A Three
End of enumeration elements list.
Minimum Addresses
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Maximum Addresses
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Minimum Addresses
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Maximum Addresses
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Minimum Addresses
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Maximum Addresses
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Minimum Addresses
address_offset : 0x38 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Maximum Addresses
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Bus Configuration
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CRE : Config Register Enable Value
bits : 0 - 0 (1 bit)
Enumeration:
0 : Low
Low Level
1 : High
High Level
End of enumeration elements list.
LAT : Fixed Latency Length
bits : 1 - 4 (4 bit)
Enumeration:
: LatCnt
Latency Cycles
End of enumeration elements list.
FIXED : Fixed Latency Enable
bits : 4 - 8 (5 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
Interrupt Enable
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAR : Parity Interrupt Enable
bits : 0 - 0 (1 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
EINT : External Interrupt Enable
bits : 1 - 2 (2 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
Raw Interrupt Status
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PAR : Raw Parity Interrupt
bits : 0 - 0 (1 bit)
Enumeration:
0 : None
No Interrupt
1 : Interrupt
Interrupted
End of enumeration elements list.
EINT : Raw External Interrupt
bits : 1 - 2 (2 bit)
Enumeration:
0 : None
No Interrupt
1 : Interrupt
Interrupted
End of enumeration elements list.
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.