Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x2C byte (0x0)
mem_usage : registers
protection :
Control 0
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DSS : Data Size Select
bits : 0 - 3 (4 bit)
Enumeration:
: Reserve
Reserved Value: Do Not Use.
3 : Four
Four Bit Width
4 : Five
Five Bit Width
5 : Six
Six Bit Width
6 : Seven
Seven Bit Width
7 : Eight
Eigth Bit Width
8 : Nine
Nine Bit Width
9 : Ten
Ten Bit Width
10 : Eleven
Eleven Bit Width
11 : Twelve
Twelve Bit Width
12 : Thirteen
Thirteen Bit Width
13 : Fourteen
Fourteen Bit Width
14 : Fifteen
Fifteen Bit Width
15 : Sixteen
Sixteen Bit Width
End of enumeration elements list.
FRF : Frame Format
bits : 4 - 9 (6 bit)
Enumeration:
0 : SPI
Serial Peripheral Interface
1 : SSP
TI Synchronous Serial Port
2 : uWire
Microwire
3 : Reserve
Reserved: Do not use.
End of enumeration elements list.
CPOL : Clock Polarity
bits : 6 - 12 (7 bit)
Enumeration:
0 : Low
Low Between Frames
1 : High
High Between Frames
End of enumeration elements list.
CPHA : Clock Phase
bits : 7 - 14 (8 bit)
Enumeration:
0 : Low
Capture on First Clock Edge
1 : High
Capture on Second Clock Edge
End of enumeration elements list.
SCR : Serial Clock Rate Divisor
bits : 8 - 23 (16 bit)
Prescale
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Interrupt Enable
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RORIE : Receive Overrun Interrupt Enable
bits : 0 - 0 (1 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
RTIE : RX Read Timeout Interrupt Enable
bits : 1 - 2 (2 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
RXIE : RX FIFO Half-Full Interrupt Enable
bits : 2 - 4 (3 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
TXIE : TX FIFO Half-Full Interrupt Enable
bits : 3 - 6 (4 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
ABIE : Cycle Aborted Interrupt Enable
bits : 4 - 8 (5 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
Raw Interrupt Status
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RORIS : Raw RX Overrun Interrupt Status
bits : 0 - 0 (1 bit)
Enumeration:
0 : None
No Interrupt
1 : Interrupt
Interrupted
End of enumeration elements list.
RTRIS : Raw RX Timeout Interrupt Status
bits : 1 - 2 (2 bit)
Enumeration:
0 : None
No Interrupt
1 : Interrupt
Interrupted
End of enumeration elements list.
RXRIS : Raw RX FIFO Half Interrupt Status
bits : 2 - 4 (3 bit)
Enumeration:
0 : None
No Interrupt
1 : Interrupt
Interrupted
End of enumeration elements list.
TXRIS : Raw TX FIFO Half Interrupt Status
bits : 3 - 6 (4 bit)
Enumeration:
0 : None
No Interrupt
1 : Interrupt
Interrupted
End of enumeration elements list.
ABRIS : Raw Cycle Aborted Interrupt Status
bits : 4 - 8 (5 bit)
Enumeration:
0 : None
No Interrupt
1 : Interrupt
Interrupted
End of enumeration elements list.
Masked Interrupt Status
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ROMIS : Masked RX Overrun Interrupt Status
bits : 0 - 0 (1 bit)
Enumeration:
0 : None
No Interrupt
1 : Interrupt
Interrupted
End of enumeration elements list.
RTMIS : Masked RX Timeout Interrupt Status
bits : 1 - 2 (2 bit)
Enumeration:
0 : None
No Interrupt
1 : Interrupt
Interrupted
End of enumeration elements list.
RXMIS : Masked RX FIFO Half Interrupt Status
bits : 2 - 4 (3 bit)
Enumeration:
0 : None
No Interrupt
1 : Interrupt
Interrupted
End of enumeration elements list.
TXMIS : Masked TX FIFO Half Interrupt Status
bits : 3 - 6 (4 bit)
Enumeration:
0 : None
No Interrupt
1 : Interrupt
Interrupted
End of enumeration elements list.
ABIE : Masked Cycle Aborted Interrupt Status
bits : 4 - 8 (5 bit)
Enumeration:
0 : None
No Interrupt
1 : Interrupt
Interrupted
End of enumeration elements list.
Interrupt Clear
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
RORIC : RX Overrun Interrupt Clear
bits : 0 - 0 (1 bit)
Enumeration:
0 : NA
No Action
1 : Clear
Interrupt Clear
End of enumeration elements list.
RTRIC : Masked RX Timeout Interrupt Status
bits : 1 - 2 (2 bit)
Enumeration:
0 : NA
No Action
1 : Clear
Interrupt Clear
End of enumeration elements list.
ABRIC : Masked Cycle Aborted Interrupt Status
bits : 4 - 8 (5 bit)
Enumeration:
0 : NA
No Action
1 : Clear
Interrupt Clear
End of enumeration elements list.
FIFO Count
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
TX : TX FIFO Count
bits : 0 - 3 (4 bit)
Enumeration:
: TX
Count
End of enumeration elements list.
RX : RX FIFO Count
bits : 8 - 19 (12 bit)
Enumeration:
: RX
Count
End of enumeration elements list.
FIFO Clear
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TX : TX FIFO Clear
bits : 0 - 0 (1 bit)
Enumeration:
0 : NA
No Action
1 : Clear
FIFO Clear
End of enumeration elements list.
RX : RX FIFO Clear
bits : 1 - 2 (2 bit)
Enumeration:
0 : NA
No Action
1 : Clear
FIFO Clear
End of enumeration elements list.
Control 1
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LBM : Loopback Mode
bits : 0 - 0 (1 bit)
Enumeration:
0 : Normal
No Loopback
1 : Loopback
Loopback Mode
End of enumeration elements list.
SSE : Enable SSP
bits : 1 - 2 (2 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
MS : MAster/Slave Select
bits : 2 - 4 (3 bit)
Enumeration:
0 : Master
Master Mode
1 : Slave
Slave Mode
End of enumeration elements list.
SOD : Slave Output Disable
bits : 3 - 6 (4 bit)
Enumeration:
0 : Enable
Enabled
1 : Disable
Disabled
End of enumeration elements list.
FSS_SEL : Slave Select Enable
bits : 4 - 11 (8 bit)
Enumeration:
: All
Enabled
End of enumeration elements list.
SCKON : SCLK Always On
bits : 8 - 16 (9 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
TX/RX FIFO Data
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Status
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
TFE : TX FIFO Empty
bits : 0 - 0 (1 bit)
Enumeration:
0 : Data
Data in FIFO
1 : Empty
FIFO Empty
End of enumeration elements list.
TNF : TX FIFO Not Full
bits : 1 - 2 (2 bit)
Enumeration:
0 : Full
FIFO Full
1 : NotFull
FIFO Not Full
End of enumeration elements list.
RNE : RX FIFO Not Empty
bits : 2 - 4 (3 bit)
Enumeration:
0 : Empty
RX FIFO Empty
1 : NotEmpty
RX FIFO Not Empty
End of enumeration elements list.
RFF : RX FIFO Full
bits : 3 - 6 (4 bit)
Enumeration:
0 : NotFull
RX FIFO Not Full
1 : Full
RX FIFO Full
End of enumeration elements list.
BSY : Busy
bits : 4 - 8 (5 bit)
Enumeration:
0 : NotBusy
TX/RX Not Busy
1 : Busy
TX/RX Busy
End of enumeration elements list.
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