\n
address_offset : 0x0 Bytes (0x0)
size : 0x44 byte (0x0)
mem_usage : registers
protection :
Boot Control
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MAP : Memory Map
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
0 : Normal
Std Memory
1 : Boot
Boot Memory
End of enumeration elements list.
BRST : Reset BOOTED
bits : 1 - 2 (2 bit)
access : write-only
Enumeration:
0 : NA
No Action
1 : Reset
Reset BOOTED
End of enumeration elements list.
BSET : Set BOOTED
bits : 2 - 4 (3 bit)
access : write-only
Enumeration:
0 : NA
No Action
1 : Set
Set BOOTED
End of enumeration elements list.
BOOTED : Set BOOTED
bits : 3 - 6 (4 bit)
access : read-only
Enumeration:
0 : NoBoot
No Boot Code Load
1 : Booted
Boot Code Loaded
End of enumeration elements list.
Clock Enables
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SYS : System Clock Enable
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
ROM : ROM Clock Enable
bits : 1 - 2 (2 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
RAM : RAM Clock Enable
bits : 2 - 4 (3 bit)
access : read-only
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
TIM16A : Timer 16A Clock Enable
bits : 4 - 8 (5 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
TIM16B : Timer 16B Clock Enable
bits : 5 - 10 (6 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
TIM32A : Timer 32A Clock Enable
bits : 6 - 12 (7 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
TIM32B : Timer 32B Clock Enable
bits : 7 - 14 (8 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
SSP : SSP Clock Enable
bits : 8 - 16 (9 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
UART : UART Clock Enable
bits : 9 - 18 (10 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
WDT : WDT Clock Enable
bits : 10 - 20 (11 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
IOCON : IOCON Clock Enable
bits : 12 - 24 (13 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
CLKOUT : CLKOUT Clock Enable
bits : 13 - 26 (14 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
GPIO0 : GPIO0 Clock Enable
bits : 14 - 28 (15 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
GPIO1 : GPIO1 Clock Enable
bits : 15 - 30 (16 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
GPIO2 : GPIO2 Clock Enable
bits : 16 - 32 (17 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
GPIO3 : GPIO3 Clock Enable
bits : 17 - 34 (18 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
GPIO4 : GPIO4 Clock Enable
bits : 18 - 36 (19 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
GPIO5 : GPIO5 Clock Enable
bits : 19 - 38 (20 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
GPIO6 : GPIO6 Clock Enable
bits : 20 - 40 (21 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
GPIO7 : GPIO7 Clock Enable
bits : 21 - 42 (22 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
System Clock Divider
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Clock Output Divider
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
System Tick Calibration Divisor
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CAL : Calibration
bits : 0 - 23 (24 bit)
SKEW : Skew Exact
bits : 24 - 48 (25 bit)
Enumeration:
0 : Exact
Exact Divide
1 : Inexact
Inexact Divide
End of enumeration elements list.
Battery Backup Control
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BBRE : Battery Backup Reset Enable
bits : 0 - 0 (1 bit)
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
Peripheral Reset
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
SSP_RST : Reset SSP
bits : 0 - 0 (1 bit)
Enumeration:
0 : NA
No Action
1 : Reset
Reset Peripheral
End of enumeration elements list.
UART_RST : Reset UART
bits : 1 - 2 (2 bit)
Enumeration:
0 : NA
No Action
1 : Reset
Reset Peripheral
End of enumeration elements list.
TIM16A_RST : Reset TIM16A
bits : 2 - 4 (3 bit)
Enumeration:
0 : NA
No Action
1 : Reset
Reset Peripheral
End of enumeration elements list.
TIM16B_RST : Reset TIM16B
bits : 3 - 6 (4 bit)
Enumeration:
0 : NA
No Action
1 : Reset
Reset Peripheral
End of enumeration elements list.
TIM32A_RST : Reset TIM32A
bits : 4 - 8 (5 bit)
Enumeration:
0 : NA
No Action
1 : Reset
Reset Peripheral
End of enumeration elements list.
TIM32B_RST : Reset TIM32B
bits : 5 - 10 (6 bit)
Enumeration:
0 : NA
No Action
1 : Reset
Reset Peripheral
End of enumeration elements list.
Product Device ID
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PARTNO : Part Number
bits : 0 - 15 (16 bit)
JEDEC : JEDEC Number
bits : 16 - 42 (27 bit)
VER : Version
bits : 28 - 59 (32 bit)
Enumeration:
: Version
Version of Part
End of enumeration elements list.
Last Reset Source
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
POR : HARDRESET Reset
bits : 0 - 0 (1 bit)
Enumeration:
0 : None
Not Reset
1 : Reset
Reset By
End of enumeration elements list.
SOFTRST : SOFTRESET Reset
bits : 1 - 2 (2 bit)
Enumeration:
0 : None
Not Reset
1 : Reset
Reset By
End of enumeration elements list.
WDT : WDT Reset
bits : 2 - 4 (3 bit)
Enumeration:
0 : None
Not Reset
1 : Reset
Reset By
End of enumeration elements list.
SYSRST : System Software Reset
bits : 4 - 8 (5 bit)
Enumeration:
0 : None
Not Reset
1 : Reset
Reset By
End of enumeration elements list.
BATTRST : Battery Backup Reset
bits : 5 - 10 (6 bit)
Enumeration:
0 : None
Not Reset
1 : Reset
Reset By
End of enumeration elements list.
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