\n

EFLASH

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x50 byte (0x0)
mem_usage : registers
protection :

Registers

CSET

ADDR

DATA

FEED

IEN

ISR

ICR

STATUS

KEY1

KEY2

KEY3

KEY4

BTADDR

CCLR

U1ADDR

U2ADDR

CTRL

CFG


CSET

Flash Control Set Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CSET CSET write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OPSTART PROGEN PAGEEN MASSEN RDEN NVREN BOOTKEYEN USR1KEYEN USR2KEYEN

OPSTART : OPSTART
bits : 0 - 0 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

PROGEN : PROGEN
bits : 1 - 1 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

PAGEEN : PAGEEN
bits : 2 - 2 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

MASSEN : MASSEN
bits : 3 - 3 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

RDEN : RDEN
bits : 4 - 4 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

NVREN : NVREN
bits : 5 - 5 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

BOOTKEYEN : BOOTKEYEN
bits : 8 - 8 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

USR1KEYEN : USR1KEYEN
bits : 9 - 9 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

USR2KEYEN : USR2KEYEN
bits : 10 - 10 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.


ADDR

Flash Address Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADDR ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

DATA

Flash Data Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FEED

Flash feed Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

FEED FEED write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

IEN

Flash Interrupt Enable Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IEN IEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPINTEN PROTINTEN ERRINTEN RCHOFFINTEN DRDERRINTEN

COMPINTEN : Complete Operation Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PROTINTEN : Protect Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ERRINTEN : Error Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RCHOFFINTEN : RCH OFF Interrupt Enable
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DRDERRINTEN : READ DATA ERROR Interrupt Enable
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ISR

Flash Interrupt Status Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ISR ISR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPLETE PROTECT ERROR RCHOFF DRDERR

COMPLETE : Complete Operation Status
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

PROTECT : Protect Interrupt Status
bits : 1 - 1 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

ERROR : Error Interrupt Status
bits : 2 - 2 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

RCHOFF : RCH OFF Interrupt Status
bits : 3 - 3 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

DRDERR : READ DATA ERROR Interrupt Status
bits : 4 - 4 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.


ICR

Flash Interrupt Clear Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ICR ICR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPCLR PROTCLR ERRORCLR RCHOFFCLR DRDERRCLR

COMPCLR : Complete Operation Clear
bits : 0 - 0 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

PROTCLR : Protect Interrupt Clear
bits : 1 - 1 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

ERRORCLR : Error Interrupt Clear
bits : 2 - 2 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

RCHOFFCLR : RCH OFF Interrupt Clear
bits : 3 - 3 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

DRDERRCLR : READ DATA ERROR Interrupt Clear
bits : 4 - 4 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.


STATUS

Flash Status Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STATUS STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BOOTPAREN USR1PAREN USR2PAREN BOOTCRCEN USR1CRCEN USR2CRCEN BOOTKEYOK USR1KEYOK USR2KEYOK BOOTCRCOK USR1CRCOK USR2CRCOK

BOOTPAREN : BOOT partition Status
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

USR1PAREN : USR1 partition Status
bits : 1 - 1 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

USR2PAREN : USR1 partition Status
bits : 2 - 2 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

BOOTCRCEN : BOOT CRC ENABLE Status
bits : 8 - 8 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

USR1CRCEN : USR1 CRC ENABLE Status
bits : 9 - 9 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

USR2CRCEN : USR1 CRC ENABLE Status
bits : 10 - 10 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

BOOTKEYOK : BOOT key matching Status
bits : 16 - 16 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

USR1KEYOK : USR1 key matching Status
bits : 17 - 17 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

USR2KEYOK : USR2 key matching Status
bits : 18 - 18 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

BOOTCRCOK : BOOT partition CRC check Status
bits : 24 - 24 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

USR1CRCOK : USR1 partition CRC check Status
bits : 25 - 25 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

USR2CRCOK : USR2 partition CRC check Status
bits : 26 - 26 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.


KEY1

Flash Key1 Match Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

KEY1 KEY1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

KEY2

Flash Key2 Match Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

KEY2 KEY2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

KEY3

Flash Key3 Match Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

KEY3 KEY3 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

KEY4

Flash Key4 Match Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

KEY4 KEY4 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

BTADDR

BOOT Partition address information Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BTADDR BTADDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STADDR EDADDR

STADDR : Complete Operation Clear
bits : 0 - 15 (16 bit)
access : read-only

Enumeration:

End of enumeration elements list.

EDADDR : Protect Interrupt Clear
bits : 16 - 31 (16 bit)
access : read-only

Enumeration:

End of enumeration elements list.


CCLR

Flash Control Clear Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CCLR CCLR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PROGEN PAGEEN MASSEN RDEN NVREN BOOTKEYEN USR1KEYEN USR2KEYEN

PROGEN : PROGEN
bits : 1 - 1 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

PAGEEN : PAGEEN
bits : 2 - 2 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

MASSEN : MASSEN
bits : 3 - 3 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

RDEN : RDEN
bits : 4 - 4 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

NVREN : NVREN
bits : 5 - 5 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

BOOTKEYEN : BOOTKEYEN
bits : 8 - 8 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

USR1KEYEN : USR1KEYEN
bits : 9 - 9 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

USR2KEYEN : USR2KEYEN
bits : 10 - 10 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.


U1ADDR

User1 Partition address information Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

U1ADDR U1ADDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STADDR EDADDR

STADDR : Complete Operation Clear
bits : 0 - 15 (16 bit)
access : read-only

Enumeration:

End of enumeration elements list.

EDADDR : Protect Interrupt Clear
bits : 16 - 31 (16 bit)
access : read-only

Enumeration:

End of enumeration elements list.


U2ADDR

User2 Partition address information Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

U2ADDR U2ADDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STADDR EDADDR

STADDR : Complete Operation Clear
bits : 0 - 15 (16 bit)
access : read-only

Enumeration:

End of enumeration elements list.

EDADDR : Protect Interrupt Clear
bits : 16 - 31 (16 bit)
access : read-only

Enumeration:

End of enumeration elements list.


CTRL

Flash Control Status Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CTRL CTRL read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PROGS PAGES MASSS RDS NVRS BOOTKEYS USR1KEYS USR2KEYS

PROGS : PROGS
bits : 1 - 1 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

PAGES : PAGES
bits : 2 - 2 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

MASSS : MASSS
bits : 3 - 3 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

RDS : RDS
bits : 4 - 4 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

NVRS : NVRS
bits : 5 - 5 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

BOOTKEYS : BOOTKEYS
bits : 8 - 8 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

USR1KEYS : USR1KEYS
bits : 9 - 9 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.

USR2KEYS : USR2KEYS
bits : 10 - 10 (1 bit)
access : write-only

Enumeration:

End of enumeration elements list.


CFG

Flash Configure Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 READCFG PREFETCHEN NODATAPRF

READCFG : READCFG
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PREFETCHEN : PREFETCHEN
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

NODATAPRF : NODATAPRF
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.



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