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ADC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x240 byte (0x0)
mem_usage : registers
protection :

Registers

ADCCTL1

ADCINTFLG

ADCTRIM

ADCINTFLGCLR

ADCINTOVF

ADCCMPCTL

ADCCMPINTR

ADCCMP0_LO

ADCCMP0_HI

ADCCMP1_LO

ADCCMP1_HI

ADCCMP2_LO

ADCCMP2_HI

ADCCMP3_LO

ADCCMP3_HI

ADCINTOVFCLR

INTSEL1N2

ADCRESULT0

ADCRESULT1

ADCRESULT2

ADCRESULT3

ADCRESULT4

ADCRESULT5

ADCRESULT6

ADCRESULT7

ADCRESULT8

ADCRESULT9

ADCRESULT10

ADCRESULT11

ADCRESULT12

ADCRESULT13

ADCRESULT14

ADCRESULT15

INTSEL3N4

INTSEL5N6

INTSEL7N8

INTSEL9N10

ADCCTL2

SOCPRICTL

ADCSAMPLEMODE

ADCINTSOCSEL1

ADCINTSOCSEL2

ADCSOCFLG1

ADCSOCFRC1

ADCSOCOVF1

ADCSOCOVFCLR1

ADCCTL3

ADCSOC0CTL

ADCSOC1CTL

ADCSOC2CTL

ADCSOC3CTL

ADCSOC4CTL

ADCSOC5CTL

ADCSOC6CTL

ADCSOC7CTL

ADCSOC8CTL

ADCSOC9CTL

ADCSOC10CTL

ADCSOC11CTL

ADCSOC12CTL

ADCSOC13CTL

ADCSOC14CTL

ADCSOC15CTL


ADCCTL1

ADC Control 1
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCCTL1 ADCCTL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 vbg_oe i25ut_oe INTPULSEPOS ADCREFSEL ADCCOREPD AADCREFPD ADCSHPD ADCPD ADCBSYCHN ADCBSY ADCENABLE RESET vreflo_tie_gnd INA6_SEL INA7_SEL INB5_SEL INB6_SEL INB7_SEL

vbg_oe : vbg Enable Control Bit
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

i25ut_oe : i25ut_oe Enable Control Bit
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INTPULSEPOS : Enable Control Bit
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCREFSEL : RSTEN
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCCOREPD : Enable Control Bit
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

AADCREFPD : RSTEN
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCSHPD : Enable Control Bit
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCPD : RSTEN
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCBSYCHN : Enable Control Bit
bits : 8 - 12 (5 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCBSY : RSTEN
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCENABLE : Enable Control Bit
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RESET : RSTEN
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

vreflo_tie_gnd : vreflo_tie_gnd
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INA6_SEL : INA6_SEL
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INA7_SEL : INA7_SEL
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INB5_SEL : INB5_SEL
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INB6_SEL : INB6_SEL
bits : 30 - 30 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INB7_SEL : INB7_SEL
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ADCINTFLG

ADC Interrupt Flag
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADCINTFLG ADCINTFLG read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCINT1 ADCINT2 ADCINT3 ADCINT4 ADCINT5 ADCINT6 ADCINT7 ADCINT8 ADCINT9

ADCINT1 : ADC INT FLAG 1
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

ADCINT2 : ADC INT FLAG 2
bits : 1 - 1 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

ADCINT3 : ADC INT FLAG 3
bits : 2 - 2 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

ADCINT4 : ADC INT FLAG 4
bits : 3 - 3 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

ADCINT5 : ADC INT FLAG 5
bits : 4 - 4 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

ADCINT6 : ADC INT FLAG 6
bits : 5 - 5 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

ADCINT7 : ADC INT FLAG 7
bits : 6 - 6 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

ADCINT8 : ADC INT FLAG 8
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

ADCINT9 : ADC INT FLAG 9
bits : 8 - 8 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.


ADCTRIM

ADCTRIM Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCTRIM ADCTRIM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 reftrim offtrim itrim meas_i ntrim tc tadj trim_opt2 mode2 vol_sel

reftrim : reftrim
bits : 0 - 7 (8 bit)
access : read-write

Enumeration:

End of enumeration elements list.

offtrim : offtrim
bits : 8 - 15 (8 bit)
access : read-write

Enumeration:

End of enumeration elements list.

itrim : itrim
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

End of enumeration elements list.

meas_i : meas_i
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ntrim : ntrim
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

tc : tc
bits : 24 - 26 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

tadj : tadj
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

trim_opt2 : trim_opt2
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

mode2 : mode2
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

vol_sel : vol_sel
bits : 30 - 30 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ADCINTFLGCLR

ADC Interrupt Flag Clear
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCINTFLGCLR ADCINTFLGCLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCINT1 ADCINT2 ADCINT3 ADCINT4 ADCINT5 ADCINT6 ADCINT7 ADCINT8 ADCINT9

ADCINT1 : ADC INT FLAG 1 Clear
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCINT2 : ADC INT FLAG 2 Clear
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCINT3 : ADC INT FLAG 3 Clear
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCINT4 : ADC INT FLAG 4 Clear
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCINT5 : ADC INT FLAG 5 Clear
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCINT6 : ADC INT FLAG 6 Clear
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCINT7 : ADC INT FLAG 7 Clear
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCINT8 : ADC INT FLAG 8 Clear
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCINT9 : ADC INT FLAG 9 Clear
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ADCINTOVF

ADC Interrupt Overflow
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADCINTOVF ADCINTOVF read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCINT1 ADCINT2 ADCINT3 ADCINT4 ADCINT5 ADCINT6 ADCINT7 ADCINT8 ADCINT9

ADCINT1 : ADC INT FLAG 1
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

ADCINT2 : ADC INT FLAG 2
bits : 1 - 1 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

ADCINT3 : ADC INT FLAG 3
bits : 2 - 2 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

ADCINT4 : ADC INT FLAG 4
bits : 3 - 3 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

ADCINT5 : ADC INT FLAG 5
bits : 4 - 4 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

ADCINT6 : ADC INT FLAG 6
bits : 5 - 5 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

ADCINT7 : ADC INT FLAG 7
bits : 6 - 6 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

ADCINT8 : ADC INT FLAG 8
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

ADCINT9 : ADC INT FLAG 9
bits : 8 - 8 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.


ADCCMPCTL

ADC Compare Control Register
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCCMPCTL ADCCMPCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 cmp0_sel cmp1_sel cmp2_sel cmp3_sel

cmp0_sel : Enable Control Bit
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

End of enumeration elements list.

cmp1_sel : Enable Control Bit
bits : 4 - 7 (4 bit)
access : read-write

Enumeration:

End of enumeration elements list.

cmp2_sel : Enable Control Bit
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

End of enumeration elements list.

cmp3_sel : Enable Control Bit
bits : 12 - 15 (4 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ADCCMPINTR

ADC Compare INterrupt Register
address_offset : 0x184 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCCMPINTR ADCCMPINTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 cmp0_lo cmp0_hi cmp1_lo cmp1_hi cmp2_lo cmp2_hi cmp3_lo cmp3_hi cmp0_loen cmp0_hien cmp1_loen cmp1_hien cmp2_loen cmp2_hien cmp3_loen cmp3_hien

cmp0_lo : Enable Control Bit
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

cmp0_hi : Enable Control Bit
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

cmp1_lo : Enable Control Bit
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

cmp1_hi : Enable Control Bit
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

cmp2_lo : Enable Control Bit
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

cmp2_hi : Enable Control Bit
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

cmp3_lo : Enable Control Bit
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

cmp3_hi : Enable Control Bit
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

cmp0_loen : Enable Control Bit
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

cmp0_hien : Enable Control Bit
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

cmp1_loen : Enable Control Bit
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

cmp1_hien : Enable Control Bit
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

cmp2_loen : Enable Control Bit
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

cmp2_hien : Enable Control Bit
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

cmp3_loen : Enable Control Bit
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

cmp3_hien : Enable Control Bit
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ADCCMP0_LO

ADC Comparator 0 Low Comparison Value
address_offset : 0x188 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCCMP0_LO ADCCMP0_LO read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 cmp0_lo

cmp0_lo : Enable Control Bit
bits : 0 - 11 (12 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ADCCMP0_HI

ADC Comparator 0 High Comparison Value
address_offset : 0x18C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCCMP0_HI ADCCMP0_HI read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 cmp0_hi

cmp0_hi : Enable Control Bit
bits : 0 - 11 (12 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ADCCMP1_LO

ADC Comparator 1 Low Comparison Value
address_offset : 0x190 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCCMP1_LO ADCCMP1_LO read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 cmp1_lo

cmp1_lo : Enable Control Bit
bits : 0 - 11 (12 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ADCCMP1_HI

ADC Comparator 1 High Comparison Value
address_offset : 0x194 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCCMP1_HI ADCCMP1_HI read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 cmp1_hi

cmp1_hi : Enable Control Bit
bits : 0 - 11 (12 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ADCCMP2_LO

ADC Comparator 2 Low Comparison Value
address_offset : 0x198 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCCMP2_LO ADCCMP2_LO read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 cmp2_lo

cmp2_lo : Enable Control Bit
bits : 0 - 11 (12 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ADCCMP2_HI

ADC Comparator 2 High Comparison Value
address_offset : 0x19C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCCMP2_HI ADCCMP2_HI read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 cmp2_hi

cmp2_hi : Enable Control Bit
bits : 0 - 11 (12 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ADCCMP3_LO

ADC Comparator 3 Low Comparison Value
address_offset : 0x1A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCCMP3_LO ADCCMP3_LO read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 cmp3_lo

cmp3_lo : Enable Control Bit
bits : 0 - 11 (12 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ADCCMP3_HI

ADC Comparator 3 High Comparison Value
address_offset : 0x1A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCCMP3_HI ADCCMP3_HI read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 cmp3_hi

cmp3_hi : Enable Control Bit
bits : 0 - 11 (12 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ADCINTOVFCLR

ADC Interrupt Overflow Clear
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCINTOVFCLR ADCINTOVFCLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCINT1 ADCINT2 ADCINT3 ADCINT4 ADCINT5 ADCINT6 ADCINT7 ADCINT8 ADCINT9

ADCINT1 : ADC INT FLAG 1 Clear
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCINT2 : ADC INT FLAG 2 Clear
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCINT3 : ADC INT FLAG 3 Clear
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCINT4 : ADC INT FLAG 4 Clear
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCINT5 : ADC INT FLAG 5 Clear
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCINT6 : ADC INT FLAG 6 Clear
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCINT7 : ADC INT FLAG 7 Clear
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCINT8 : ADC INT FLAG 8 Clear
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADCINT9 : ADC INT FLAG 9 Clear
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


INTSEL1N2

ADC Interrupt 1 and 2 Selection
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTSEL1N2 INTSEL1N2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT1SEL INT1E INT1CONT INT2SEL INT2E INT2CONT

INT1SEL : Enable Control Bit
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT1E : RSTEN
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT1CONT : Enable Control Bit
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT2SEL : Enable Control Bit
bits : 8 - 12 (5 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT2E : RSTEN
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT2CONT : Enable Control Bit
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ADCRESULT0

Conversion Result Buffer 0
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADCRESULT0 ADCRESULT0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESULT

RESULT : Enable Control Bit
bits : 0 - 11 (12 bit)
access : read-only

Enumeration:

End of enumeration elements list.


ADCRESULT1


address_offset : 0x204 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT1 ADCRESULT1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT2


address_offset : 0x208 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT2 ADCRESULT2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT3


address_offset : 0x20C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT3 ADCRESULT3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT4


address_offset : 0x210 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT4 ADCRESULT4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT5


address_offset : 0x214 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT5 ADCRESULT5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT6


address_offset : 0x218 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT6 ADCRESULT6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT7


address_offset : 0x21C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT7 ADCRESULT7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT8


address_offset : 0x220 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT8 ADCRESULT8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT9


address_offset : 0x224 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT9 ADCRESULT9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT10


address_offset : 0x228 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT10 ADCRESULT10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT11


address_offset : 0x22C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT11 ADCRESULT11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT12


address_offset : 0x230 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT12 ADCRESULT12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT13


address_offset : 0x234 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT13 ADCRESULT13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT14


address_offset : 0x238 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT14 ADCRESULT14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT15


address_offset : 0x23C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT15 ADCRESULT15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

INTSEL3N4

ADC Interrupt 3 and 4 Selection
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTSEL3N4 INTSEL3N4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT3SEL INT3E INT3CONT INT4SEL INT4E INT4CONT

INT3SEL : Enable Control Bit
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT3E : RSTEN
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT3CONT : Enable Control Bit
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT4SEL : Enable Control Bit
bits : 8 - 12 (5 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT4E : RSTEN
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT4CONT : Enable Control Bit
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


INTSEL5N6

ADC Interrupt 5 and 6 Selection
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTSEL5N6 INTSEL5N6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT5SEL INT5E INT5CONT INT6SEL INT6E INT6CONT

INT5SEL : Enable Control Bit
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT5E : RSTEN
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT5CONT : Enable Control Bit
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT6SEL : Enable Control Bit
bits : 8 - 12 (5 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT6E : RSTEN
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT6CONT : Enable Control Bit
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


INTSEL7N8

ADC Interrupt 7 and 8 Selection
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTSEL7N8 INTSEL7N8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT7SEL INT7E INT7CONT INT8SEL INT8E INT8CONT

INT7SEL : Enable Control Bit
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT7E : RSTEN
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT7CONT : Enable Control Bit
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT8SEL : Enable Control Bit
bits : 8 - 12 (5 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT8E : RSTEN
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT8CONT : Enable Control Bit
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


INTSEL9N10

ADC Interrupt 9 and 10 Selection
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTSEL9N10 INTSEL9N10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT9SEL INT9E INT9CONT INT10SEL INT10E INT10CONT

INT9SEL : Enable Control Bit
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT9E : RSTEN
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT9CONT : Enable Control Bit
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT10SEL : Enable Control Bit
bits : 8 - 12 (5 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT10E : RSTEN
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INT10CONT : Enable Control Bit
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ADCCTL2

ADC Control 2
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCCTL2 ADCCTL2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 clkdiv clockalwayson start_width smp_conv_delay dlyprediv

clkdiv : Enable Control Bit
bits : 2 - 5 (4 bit)
access : read-write

Enumeration:

End of enumeration elements list.

clockalwayson : RSTEN
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

start_width : Enable Control Bit
bits : 8 - 10 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

smp_conv_delay : RSTEN
bits : 11 - 13 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

dlyprediv : Enable Control Bit
bits : 16 - 25 (10 bit)
access : read-write

Enumeration:

End of enumeration elements list.


SOCPRICTL

ADC SOC Priority Control
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SOCPRICTL SOCPRICTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SOCPRIORITY RRPOINTER

SOCPRIORITY : Enable Control Bit
bits : 0 - 4 (5 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RRPOINTER : RSTEN
bits : 5 - 10 (6 bit)
access : read-only

Enumeration:

End of enumeration elements list.


ADCSAMPLEMODE

ADC Sampling Mode
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCSAMPLEMODE ADCSAMPLEMODE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIMULEN0 SIMULEN2 SIMULEN4 SIMULEN6 SIMULEN8 SIMULEN1O SIMULEN12 SIMULEN14

SIMULEN0 : Enable Control Bit
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SIMULEN2 : RSTEN
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SIMULEN4 : Enable Control Bit
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SIMULEN6 : Enable Control Bit
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SIMULEN8 : RSTEN
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SIMULEN1O : Enable Control Bit
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SIMULEN12 : RSTEN
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SIMULEN14 : Enable Control Bit
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ADCINTSOCSEL1

ADC Interrupt SOC Selection 1
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCINTSOCSEL1 ADCINTSOCSEL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCINTSOCSEL2

ADC Interrupt SOC Selection 2
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCINTSOCSEL2 ADCINTSOCSEL2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOCFLG1

ADC SOC Flag 1
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADCSOCFLG1 ADCSOCFLG1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOCFRC1

ADC SOC Flag Force 1
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCSOCFRC1 ADCSOCFRC1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOCOVF1

ADC SOC Overflow 1
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADCSOCOVF1 ADCSOCOVF1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOCOVFCLR1

ADC SOC Overflow Clear 1
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCSOCOVFCLR1 ADCSOCOVFCLR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCCTL3

ADC Control 3
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCCTL3 ADCCTL3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 convstdlysel convstinvsel converteocsel sampledlysel chseldlysel alias shift

convstdlysel : Enable Control Bit
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

convstinvsel : RSTEN
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

converteocsel : Enable Control Bit
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

sampledlysel : Enable Control Bit
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

chseldlysel : RSTEN
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

alias : Enable Control Bit
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

shift : RSTEN
bits : 24 - 28 (5 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ADCSOC0CTL

ADC SOC0 Control
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCSOC0CTL ADCSOC0CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACQPS CHSEL TRIGSEL INDLY

ACQPS : Enable Control Bit
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CHSEL : RSTEN
bits : 6 - 9 (4 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TRIGSEL : Enable Control Bit
bits : 11 - 15 (5 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INDLY : RSTEN
bits : 16 - 23 (8 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ADCSOC1CTL


address_offset : 0x84 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC1CTL ADCSOC1CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC2CTL


address_offset : 0x88 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC2CTL ADCSOC2CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC3CTL


address_offset : 0x8C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC3CTL ADCSOC3CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC4CTL

ADC SOC4 Control
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCSOC4CTL ADCSOC4CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACQPS CHSEL TRIGSEL

ACQPS : Enable Control Bit
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CHSEL : RSTEN
bits : 6 - 9 (4 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TRIGSEL : Enable Control Bit
bits : 11 - 15 (5 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ADCSOC5CTL


address_offset : 0x94 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC5CTL ADCSOC5CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC6CTL


address_offset : 0x98 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC6CTL ADCSOC6CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC7CTL


address_offset : 0x9C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC7CTL ADCSOC7CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC8CTL


address_offset : 0xA0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC8CTL ADCSOC8CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC9CTL


address_offset : 0xA4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC9CTL ADCSOC9CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC10CTL


address_offset : 0xA8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC10CTL ADCSOC10CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC11CTL


address_offset : 0xAC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC11CTL ADCSOC11CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC12CTL


address_offset : 0xB0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC12CTL ADCSOC12CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC13CTL


address_offset : 0xB4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC13CTL ADCSOC13CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC14CTL


address_offset : 0xB8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC14CTL ADCSOC14CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC15CTL


address_offset : 0xBC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC15CTL ADCSOC15CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0


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