\n
address_offset : 0x0 Bytes (0x0)
size : 0x30 byte (0x0)
mem_usage : registers
protection :
ERU Input Select Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
in0_sela : A0 Event Source Select
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
in0_selb : B0 Event Source Select
bits : 4 - 6 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
in1_sela : A1 Event Source Select
bits : 8 - 10 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
in1_selb : B1 Event Source Select
bits : 12 - 14 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
in2_sela : A2 Event Source Select
bits : 16 - 18 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
in2_selb : B2 Event Source Select
bits : 20 - 22 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
in3_sela : A3 Event Source Select
bits : 24 - 26 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
in3_selb : B3 Event Source Select
bits : 28 - 30 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
ERU Input Control Register 0
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PE : ETL0 Output Trigger Pulse Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
LD : ETL0 Reconstruction of the Status Flag Level Detection
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
RE : ETL0 Rising Edge Test Enable
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
FE : ETL0 Falling Edge Test Enable
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OCS : ETL0 Output Trigger Pulse Output Channel Choice
bits : 4 - 6 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
FL : ETL0 status flag
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
ERSOSEL : ERS0 input source Selecet
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
APOL : The polarity of the input A choice
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
BPOL : The polarity of the input B choice
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
ERU Output Control Register 0
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ISS : Internal trigger source choice
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
GEEN : Door control events enable
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
PDR : Model test results flag
bits : 3 - 3 (1 bit)
access : read-only
Enumeration:
End of enumeration elements list.
GP : Model test results of gating options
bits : 4 - 5 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
IPEN0 : ETL0 Model test enable
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
IPEN1 : ETL1 Model test enable
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
IPEN2 : ETL2 Model test enable
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
IPEN3 : ETL3 Model test enable
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
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