\n

PWM

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xB8 byte (0x0)
mem_usage : registers
protection :

Registers

TBCTL

TBCTR

TBPRD

CMPCTL

CMPA

CMPB

AQCTLA

AQCTLB

AQSFRC

AQCSFRC

DBCTL

TBSTS

DBRED

DBFED

TZSEL

TZCTL

TZEINT

TZFLG

TZCLR

TZFRC

ETSEL

ETPS

ETFLG

ETCLR

ETFRC

TBPRDM

CMPAM

TBPHS


TBCTL

Time Reference Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TBCTL TBCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CTRMODE PHSEN PRDLD SYNCOSEL SWFSYNC HSPCLKDIV CLKDIV PHSDIR FREE_SOFT

CTRMODE : Time Reference Status Register
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PHSEN : Time Reference Phase Register
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PRDLD : Time Reference Counter Register
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SYNCOSEL : B1 Event Source Select
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SWFSYNC : A2 Event Source Select
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

HSPCLKDIV : B2 Event Source Select
bits : 7 - 9 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CLKDIV : A3 Event Source Select
bits : 10 - 12 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PHSDIR : B3 Event Source Select
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

FREE_SOFT : B3 Event Source Select
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.


TBCTR

Time Reference Counter Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TBCTR TBCTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TBPRD

Time Reference Period Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TBPRD TBPRD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

CMPCTL

Comparison function control register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPCTL CMPCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOADAMODE LOADBMODE SHDWAMODE SHDWBMODE SHDWAFULL SHDWBFULL

LOADAMODE : A0 Event Source Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

LOADBMODE : B0 Event Source Select
bits : 2 - 3 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SHDWAMODE : A1 Event Source Select
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SHDWBMODE : B1 Event Source Select
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SHDWAFULL : A2 Event Source Select
bits : 8 - 8 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

SHDWBFULL : B2 Event Source Select
bits : 9 - 9 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.


CMPA

Comparison function Register A
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPA CMPA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

CMPB

Comparison function Register B
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPB CMPB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AQCTLA

Action Qualify output channel A control register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AQCTLA AQCTLA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ZRO PRU CAU CAD CBU CBD

ZRO : A0 Event Source Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PRU : B0 Event Source Select
bits : 2 - 3 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAU : A1 Event Source Select
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAD : B1 Event Source Select
bits : 6 - 7 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CBU : A2 Event Source Select
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CBD : B2 Event Source Select
bits : 10 - 11 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.


AQCTLB

Action Qualify Output Channel A Control Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AQCTLB AQCTLB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ZRO PRU CAU CAD CBU CBD

ZRO : A0 Event Source Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PRU : B0 Event Source Select
bits : 2 - 3 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAU : A1 Event Source Select
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CAD : B1 Event Source Select
bits : 6 - 7 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CBU : A2 Event Source Select
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CBD : B2 Event Source Select
bits : 10 - 11 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.


AQSFRC

Action Qualify Software Force Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AQSFRC AQSFRC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACTSFA OTSFA ACTSFB OTSFB BLDCSF

ACTSFA : A0 Event Source Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OTSFA : B0 Event Source Select
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ACTSFB : A1 Event Source Select
bits : 3 - 4 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OTSFB : B1 Event Source Select
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BLDCSF : A2 Event Source Select
bits : 6 - 7 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.


AQCSFRC

Action Qualify Software Continuous Force Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AQCSFRC AQCSFRC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CSFA CSFB

CSFA : A0 Event Source Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CSFB : B0 Event Source Select
bits : 2 - 3 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.


DBCTL

Dead Zone Control Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBCTL DBCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUT_MODE POLSEL IN_MODE HALFCYCLE

OUT_MODE : A0 Event Source Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

POLSEL : B0 Event Source Select
bits : 2 - 3 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

IN_MODE : A0 Event Source Select
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

HALFCYCLE : B0 Event Source Select
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


TBSTS

Time Reference Status Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TBSTS TBSTS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CTRDIR SYNCI CTRMAX

CTRDIR : A0 Event Source Select
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SYNCI : B0 Event Source Select
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CTRMAX : A1 Event Source Select
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


DBRED

Rising Edge Dead Zorn Delay Setting Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBRED DBRED read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

DBFED

Falling Edge Dead Zorn Delay Setting Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBFED DBFED read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TZSEL

Trip zone select
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TZSEL TZSEL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CBC0 CBC1 CBC2 CBC3 CBC4 CBC5 OSHT0 OSHT1 OSHT2 OSHT3 OSHT4 OSHT5

CBC0 : A0 Event Source Select
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CBC1 : B0 Event Source Select
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CBC2 : A0 Event Source Select
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CBC3 : B0 Event Source Select
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CBC4 : A0 Event Source Select
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CBC5 : B0 Event Source Select
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OSHT0 : A0 Event Source Select
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OSHT1 : B0 Event Source Select
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OSHT2 : A0 Event Source Select
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OSHT3 : B0 Event Source Select
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OSHT4 : A0 Event Source Select
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OSHT5 : B0 Event Source Select
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


TZCTL

Trip zone control
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TZCTL TZCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TZA TZB SYNC_OUTEN

TZA : A0 Event Source Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TZB : B0 Event Source Select
bits : 2 - 3 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SYNC_OUTEN : A0 Event Source Select
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


TZEINT

Trip zone interrupt enable
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TZEINT TZEINT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CBC OST

CBC : A0 Event Source Select
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OST : B0 Event Source Select
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


TZFLG

Trip zone interrupt flags
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TZFLG TZFLG read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT CBC OST

INT : A0 Event Source Select
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

CBC : A0 Event Source Select
bits : 1 - 1 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

OST : B0 Event Source Select
bits : 2 - 2 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.


TZCLR

Trip zone clear
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TZCLR TZCLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT CBC OST

INT : A0 Event Source Select
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CBC : A0 Event Source Select
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OST : B0 Event Source Select
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


TZFRC

Trip zone force interrupt
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TZFRC TZFRC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CBC OST

CBC : A0 Event Source Select
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OST : B0 Event Source Select
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ETSEL

Event trigger selection
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ETSEL ETSEL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INTESEL INTEN SOCASEL SOCAEN SOCBSEL SOCBEN

INTESEL : A0 Event Source Select
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INTEN : B0 Event Source Select
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SOCASEL : A0 Event Source Select
bits : 8 - 10 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SOCAEN : B0 Event Source Select
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SOCBSEL : A0 Event Source Select
bits : 12 - 14 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SOCBEN : B0 Event Source Select
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ETPS

Event trigger pre-scaler
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ETPS ETPS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INTPRD INTCNT SOCAPRD SOCACNT SOCBPRD SOCBCNT

INTPRD : A0 Event Source Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INTCNT : B0 Event Source Select
bits : 2 - 3 (2 bit)
access : read-only

Enumeration:

End of enumeration elements list.

SOCAPRD : A0 Event Source Select
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SOCACNT : B0 Event Source Select
bits : 10 - 11 (2 bit)
access : read-only

Enumeration:

End of enumeration elements list.

SOCBPRD : A0 Event Source Select
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SOCBCNT : B0 Event Source Select
bits : 14 - 15 (2 bit)
access : read-only

Enumeration:

End of enumeration elements list.


ETFLG

Event trigger flags
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ETFLG ETFLG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT SOCA SOCB CTRDIR

INT : A0 Event Source Select
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

SOCA : B0 Event Source Select
bits : 2 - 2 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

SOCB : A0 Event Source Select
bits : 3 - 3 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

CTRDIR : B0 Event Source Select
bits : 31 - 31 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.


ETCLR

Event trigger clear
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ETCLR ETCLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT SOCA SOCB

INT : A0 Event Source Select
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SOCA : B0 Event Source Select
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SOCB : A0 Event Source Select
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


ETFRC

Event trigger force
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ETFRC ETFRC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT SOCA SOCB

INT : A0 Event Source Select
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SOCA : B0 Event Source Select
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SOCB : A0 Event Source Select
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.


TBPRDM

Time Base Period register Mirror
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TBPRDM TBPRDM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

CMPAM

Compare Register A Mirror
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPAM CMPAM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TBPHS

Time Reference Phase Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TBPHS TBPHS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0


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