Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :
Time Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CEN : Counter enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
UDIS : Update disable
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
URS : Update request source
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OPM : One pulse mode
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
DIR : counter Direction
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CMS : Center-aligned mode selection
bits : 5 - 6 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
ARPE : Auto-reload preload enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CKD : Clock division
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
TIME status register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UIF : Update interrupt flag
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC1IF : Capture/Compare 1 interrupt flag
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC2IF : Capture/Compare 2 interrupt flag
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC3IF : Capture/Compare 3 interrupt flag
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC4IF : Capture/Compare 4 interrupt flag
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
COMIF : COM interrupt flag
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
TIF : Trigger interrupt flag
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
BIF : Break interrupt flag
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC1OF : Capture/Compare 1 overcapture flag
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC2OF : Capture/Compare 2 overcapture flag
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC3OF : Capture/Compare 3 overcapture flag
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC4OF : Capture/Compare 4 overcapture flag
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
Time event generate Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UG : Update generation
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC1G : Capture/Compare 1 generation
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC2G : Capture/Compare 2 generation
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC3G : Capture/Compare 3 generation
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC4G : Capture/Compare 4 generation
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
COMG : Capture/Compare control update generation
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
TG : Trigger generation
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
BG : Break generation
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
Output compare mode TIME Catch/compare mode register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CC1S : Output compare mode CC1S
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OC1FE : Output compare mode OC1FE
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OC1PE : Output compare mode OC1PE
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OC1M : Output compare mode OC1M
bits : 4 - 6 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OC1CE : Output compare mode OC1CE
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC2S : Output compare mode CC2S
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OC2FE : Output compare mode OC2FE
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OC2PE : Output compare mode OC2PE
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OC2M : Output compare mode OC2M
bits : 12 - 14 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OC2CE : Output compare mode OC2CE
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
Input capture mode TIME Catch/compare mode register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : TIM_CCMR1
reset_Mask : 0x0
CC1S : input capture mode CC1S
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
IC1PSC : input capture mode IC1PSC
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
IC1F : input capture mode IC1F
bits : 4 - 7 (4 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC2S : input capture mode CC2S
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
IC2PSC : input capture mode IC2PSC
bits : 10 - 11 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
IC2F : input capture mode IC2F
bits : 12 - 15 (4 bit)
access : read-write
Enumeration:
End of enumeration elements list.
Output compare mode TIME Catch/compare mode register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CC3S : Output compare mode CC3S
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OC3FE : Output compare mode OC3FE
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OC3PE : Output compare mode OC3PE
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OC3M : Output compare mode OC3M
bits : 4 - 6 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OC3CE : Output compare mode OC3CE
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC4S : Output compare mode CC4S
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OC4FE : Output compare mode OC4FE
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OC4PE : Output compare mode OC4PE
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OC4M : Output compare mode OC4M
bits : 12 - 14 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OC4CE : Output compare mode OC4CE
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
Input capture mode TIME Catch/compare mode register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : TIM_CCMR2
reset_Mask : 0x0
CC3S : input capture mode CC3S
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
IC3PSC : input capture mode IC3PSC
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
IC3F : input capture mode IC3F
bits : 4 - 7 (4 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC4S : input capture mode CC4S
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
IC4PSC : input capture mode IC4PSC
bits : 10 - 11 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
IC4F : input capture mode IC4F
bits : 12 - 15 (4 bit)
access : read-write
Enumeration:
End of enumeration elements list.
Time catch/compare enable Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CC1E : CC1E
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC1P : CC1P
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC1NE : CC1NE
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC1NP : CC1NP
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC2E : CC2E
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC2P : CC2P
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC2NE : CC2NE
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC2NP : CC2NP
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC3E : CC3E
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC3P : CC3P
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC3NE : CC3NE
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC3NP : CC3NP
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC4E : CC4E
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC4P : CC4P
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
TIMe_CNT register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
TIM1_PSC register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM1_ARR register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM1_RCR register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM1_CCR1 register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM1_CCR2 register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM1_CCR3 register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Time control2 Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCPC : catch/compare preloaded control
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CCUS : catch/compare control update selection
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
MMS : Master mode selection
bits : 4 - 5 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
TI1S : TI1 selection
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OIS1 : Output Idle state 1
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OIS1N : Output Idle state 1
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OIS2 : Output Idle state 2
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OIS2N : Output Idle state 2
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OIS3 : Output Idle state 3
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OIS3N : Output Idle state 3
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OIS4 : Output Idle state 4
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
TIM1_CCR4 register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM1_BDTR Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DTG : Dead-time generator setup
bits : 0 - 7 (8 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OSSI : OSSI
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
OSSR : OSSR
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
BKE : Break enable
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
BKP : Break polarity
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
AOE : Automatic output enable
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
MOE : Main output enable
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
TIM1_DTG1
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM1_ISR
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Debug_mode : Debug_mode
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
Ch1_sel : Ch1_sel
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
Ch2_sel : Ch2_sel
bits : 4 - 5 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
Ch3_sel : Ch3_sel
bits : 6 - 7 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
Ch4_sel : Ch4_sel
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
Brk_sel : Brk_sel
bits : 10 - 11 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
Trc_sel : Trc_sel
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
Time slave mode control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SMS : Slave mode selection
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
TS : Trigger selection
bits : 4 - 6 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
ETF : External trigger filter
bits : 8 - 10 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
ETPS : External trigger prescaler
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
ECE : External clock enable
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
ETP : External trigger polarity
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
Time int enable Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UIE : UIE
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC1IE : CC1IE
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC2IE : CC2IE
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC3IE : CC3IE
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CC4IE : CC4IE
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
COMIE : COMIE
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
TIE : TIE
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
BIE : BIE
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
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