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PPU

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :

Registers

CTRL

RAM_PROT

HPS01_PROT

HPS23_PROT

PPS01_PROT

PPS23_PROT

RAM_TRAP

HPS01_TRAP

HPS23_TRAP

PPS01_TRAP

PPS23_TRAP


CTRL

CTRL Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ppu_ram_intr_en ppu_hps01_intr_en ppu_hps23_intr_en ppu_pps01_intr_en ppu_pps23_intr_en

ppu_ram_intr_en : ppu ram intrrupt enable
bits : 4 - 4 (1 bit)
access : read-write

ppu_hps01_intr_en : ppu hps01 intrrupt enable
bits : 8 - 8 (1 bit)
access : read-write

ppu_hps23_intr_en : ppu hps23 intrrupt enable
bits : 9 - 9 (1 bit)
access : read-write

ppu_pps01_intr_en : ppu pps01 intrrupt enable
bits : 12 - 12 (1 bit)
access : read-write

ppu_pps23_intr_en : ppu pps23 intrrupt enable
bits : 13 - 13 (1 bit)
access : read-write


RAM_PROT

RAM_PROT Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RAM_PROT RAM_PROT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

HPS01_PROT

HPS01_PROT Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HPS01_PROT HPS01_PROT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PA_en PB_en PC_en

PA_en : PA enable
bits : 0 - 0 (1 bit)
access : read-write

PB_en : PB enable
bits : 1 - 1 (1 bit)
access : read-write

PC_en : PC enable
bits : 3 - 3 (1 bit)
access : read-write


HPS23_PROT

HPS23_PROT Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HPS23_PROT HPS23_PROT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 coproc_en

coproc_en : coproc_en
bits : 0 - 0 (1 bit)
access : read-write


PPS01_PROT

PPS01_PROT Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPS01_PROT PPS01_PROT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 syscfg_en chipctrl_en eru_en dma_en eflash_en WDT_en uart0_en uart1_en uart2_en i2c_en ssp_en

syscfg_en : syscfg enable
bits : 0 - 0 (1 bit)
access : read-write

chipctrl_en : chipctrl enable
bits : 1 - 1 (1 bit)
access : read-write

eru_en : eru enable
bits : 3 - 3 (1 bit)
access : read-write

dma_en : dma enable
bits : 6 - 6 (1 bit)
access : read-write

eflash_en : eflash enable
bits : 8 - 8 (1 bit)
access : read-write

WDT_en : WDT enable
bits : 12 - 12 (1 bit)
access : read-write

uart0_en : uart0 enable
bits : 16 - 16 (1 bit)
access : read-write

uart1_en : uart1 enable
bits : 17 - 17 (1 bit)
access : read-write

uart2_en : uart2 enable
bits : 18 - 18 (1 bit)
access : read-write

i2c_en : i2c enable
bits : 23 - 23 (1 bit)
access : read-write

ssp_en : ssp enable
bits : 24 - 24 (1 bit)
access : read-write


PPS23_PROT

PPS23_PROT Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPS23_PROT PPS23_PROT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 pwmtop0_en pwmtop1_en adc_en acmp_opa_en Timertop0_en Timertop1_en Timertop6_en

pwmtop0_en : pwmtop0 enable
bits : 4 - 4 (1 bit)
access : read-write

pwmtop1_en : pwmtop1 enable
bits : 5 - 5 (1 bit)
access : read-write

adc_en : adc enable
bits : 8 - 8 (1 bit)
access : read-write

acmp_opa_en : acmp opa enable
bits : 10 - 10 (1 bit)
access : read-write

Timertop0_en : Timertop0 enable
bits : 12 - 12 (1 bit)
access : read-write

Timertop1_en : Timertop1 enable
bits : 13 - 13 (1 bit)
access : read-write

Timertop6_en : Timertop6 enable
bits : 15 - 15 (1 bit)
access : read-write


RAM_TRAP

RAM_TRAP Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RAM_TRAP RAM_TRAP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

HPS01_TRAP

HPS01_TRAP Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HPS01_TRAP HPS01_TRAP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PA_en PB_en PC_en

PA_en : PA enable
bits : 0 - 0 (1 bit)
access : read-write

PB_en : PB enable
bits : 1 - 1 (1 bit)
access : read-write

PC_en : PC enable
bits : 2 - 2 (1 bit)
access : read-write


HPS23_TRAP

HPS23_TRAP Register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HPS23_TRAP HPS23_TRAP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 coproc_en

coproc_en : coproc_en
bits : 0 - 0 (1 bit)
access : read-write


PPS01_TRAP

PPS01_TRAP Register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPS01_TRAP PPS01_TRAP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 syscfg_en chipctrl_en eru_en dma_en eflash_en WDT_en uart0_en uart1_en uart2_en i2c_en ssp_en

syscfg_en : syscfg able
bits : 0 - 0 (1 bit)
access : read-write

chipctrl_en : chipctrl able
bits : 1 - 1 (1 bit)
access : read-write

eru_en : eru able
bits : 3 - 3 (1 bit)
access : read-write

dma_en : dma able
bits : 6 - 6 (1 bit)
access : read-write

eflash_en : eflash able
bits : 8 - 8 (1 bit)
access : read-write

WDT_en : WDT able
bits : 12 - 12 (1 bit)
access : read-write

uart0_en : uart0 able
bits : 16 - 16 (1 bit)
access : read-write

uart1_en : uart1 able
bits : 17 - 17 (1 bit)
access : read-write

uart2_en : uart2 able
bits : 18 - 18 (1 bit)
access : read-write

i2c_en : i2c able
bits : 23 - 23 (1 bit)
access : read-write

ssp_en : ssp able
bits : 24 - 24 (1 bit)
access : read-write


PPS23_TRAP

PPS23_PROT Register
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPS23_TRAP PPS23_TRAP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 pwmtop0_en pwmtop1_en adc_en acmp_opa_en Timertop0_en Timertop1_en Timertop6_en

pwmtop0_en : pwmtop0 able
bits : 4 - 4 (1 bit)
access : read-write

pwmtop1_en : pwmtop1 able
bits : 5 - 5 (1 bit)
access : read-write

adc_en : adc able
bits : 8 - 8 (1 bit)
access : read-write

acmp_opa_en : acmp opa able
bits : 10 - 10 (1 bit)
access : read-write

Timertop0_en : Timertop0 able
bits : 12 - 12 (1 bit)
access : read-write

Timertop1_en : Timertop1 able
bits : 13 - 13 (1 bit)
access : read-write

Timertop6_en : Timertop6 able
bits : 15 - 15 (1 bit)
access : read-write



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