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ADC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :

Registers

ADCCTL1

ADCINTFLG

ADCTRIM

ADCINTFLGCLR

ADCINTOVF

ADCCMPCTL

ADCCMPINTR

ADCCMP0_LO

ADCCMP0_HI

ADCCMP1_LO

ADCCMP1_HI

ADCCMP2_LO

ADCCMP2_HI

ADCCMP3_LO

ADCCMP3_HI

ADCINTOVFCLR

INTSEL1N2

ADCRESULT0

ADCRESULT1

ADCRESULT2

ADCRESULT3

ADCRESULT4

ADCRESULT5

ADCRESULT6

ADCRESULT7

ADCRESULT8

ADCRESULT9

ADCRESULT10

ADCRESULT11

ADCRESULT12

ADCRESULT13

ADCRESULT14

ADCRESULT15

INTSEL3N4

INTSEL5N6

INTSEL7N8

INTSEL9N10

ADCCTL2

SOCPRICTL

ADCSAMPLEMODE

ADCINTSOCSEL1

ADCINTSOCSEL2

ADCSOCFLG1

ADCSOCFRC1

ADCSOCOVF1

ADCSOCOVFCLR1

ADCCTL3

ADCSOC0CTL

ADCSOC1CTL

ADCSOC2CTL

ADCSOC3CTL

ADCSOC4CTL

ADCSOC5CTL

ADCSOC6CTL

ADCSOC7CTL

ADCSOC8CTL

ADCSOC9CTL

ADCSOC10CTL

ADCSOC11CTL

ADCSOC12CTL

ADCSOC13CTL

ADCSOC14CTL

ADCSOC15CTL


ADCCTL1

ADC Control 1 Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCCTL1 ADCCTL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 vbg_oe i25ut_oe INTPULSEPOS ADCREFSEL ADCCOREPD AADCREFPD ADCSHPD ADCPD ADCBSYCHN ADCBSY ADCENABLE RESET vreflo_tie_gnd INA6_SEL INA7_SEL INB5_SEL INB6_SEL INB7_SEL

vbg_oe : vbg Enable Control Bit
bits : 0 - 0 (1 bit)
access : read-write

i25ut_oe : i25ut_oe Enable Control Bit
bits : 1 - 1 (1 bit)
access : read-write

INTPULSEPOS : INT Pulse Generation control
bits : 2 - 2 (1 bit)
access : read-write

ADCREFSEL : Internal/external reference select
bits : 3 - 3 (1 bit)
access : read-write

ADCCOREPD : ADC core power down
bits : 4 - 4 (1 bit)
access : read-write

AADCREFPD : Reference buffers circuit power down
bits : 5 - 5 (1 bit)
access : read-write

ADCSHPD : ADC sample ciruit power down
bits : 6 - 6 (1 bit)
access : read-write

ADCPD : ADC power down
bits : 7 - 7 (1 bit)
access : read-write

ADCBSYCHN : Set when ADC SOC for current channel is generated
bits : 8 - 12 (5 bit)
access : read-write

ADCBSY : ADC Busy
bits : 13 - 13 (1 bit)
access : read-write

ADCENABLE : ADC Enable
bits : 14 - 14 (1 bit)
access : read-write

RESET : ADC module software reset
bits : 15 - 15 (1 bit)
access : read-write

vreflo_tie_gnd : vreflo_tie_gnd
bits : 16 - 16 (1 bit)
access : read-write

INA6_SEL : Analog channel A6 input selection
bits : 22 - 22 (1 bit)
access : read-write

INA7_SEL : Analog channel A7 input selection
bits : 23 - 23 (1 bit)
access : read-write

INB5_SEL : Analog channel B5 input selection
bits : 29 - 29 (1 bit)
access : read-write

INB6_SEL : Analog channel B6 input selection
bits : 30 - 30 (1 bit)
access : read-write

INB7_SEL : Analog channel B7 input selection
bits : 31 - 31 (1 bit)
access : read-write


ADCINTFLG

ADC Interrupt Flag Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADCINTFLG ADCINTFLG read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCINT1 ADCINT2 ADCINT3 ADCINT4 ADCINT5 ADCINT6 ADCINT7 ADCINT8 ADCINT9

ADCINT1 : ADC Interrupt Flag 1
bits : 0 - 0 (1 bit)
access : read-only

ADCINT2 : ADC Interrupt Flag 2
bits : 1 - 1 (1 bit)
access : read-only

ADCINT3 : ADC Interrupt Flag 3
bits : 2 - 2 (1 bit)
access : read-only

ADCINT4 : ADC Interrupt Flag 4
bits : 3 - 3 (1 bit)
access : read-only

ADCINT5 : ADC Interrupt Flag 5
bits : 4 - 4 (1 bit)
access : read-only

ADCINT6 : ADC Interrupt Flag 6
bits : 5 - 5 (1 bit)
access : read-only

ADCINT7 : ADC Interrupt Flag 7
bits : 6 - 6 (1 bit)
access : read-only

ADCINT8 : ADC Interrupt Flag 8
bits : 7 - 7 (1 bit)
access : read-only

ADCINT9 : ADC Interrupt Flag 9
bits : 8 - 8 (1 bit)
access : read-only


ADCTRIM

ADCTRIM Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCTRIM ADCTRIM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 reftrim offtrim itrim meas_i ntrim tc tadj trim_opt2 mode2 vol_sel

reftrim : reference trim
bits : 0 - 7 (8 bit)
access : read-write

offtrim : offest trim
bits : 8 - 15 (8 bit)
access : read-write

itrim : i trim
bits : 16 - 19 (4 bit)
access : read-write

meas_i : meas_i
bits : 22 - 22 (1 bit)
access : read-write

ntrim : no trim
bits : 23 - 23 (1 bit)
access : read-write

tc : Temperature compensation setting
bits : 24 - 26 (3 bit)
access : read-write

tadj : Temperature compensated enable control
bits : 27 - 27 (1 bit)
access : read-write

trim_opt2 : trim option
bits : 28 - 28 (1 bit)
access : read-write

mode2 : mode2
bits : 29 - 29 (1 bit)
access : read-write

vol_sel : voltage select
bits : 30 - 30 (1 bit)
access : read-write


ADCINTFLGCLR

ADC Interrupt Flag Clear Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCINTFLGCLR ADCINTFLGCLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCINT1 ADCINT2 ADCINT3 ADCINT4 ADCINT5 ADCINT6 ADCINT7 ADCINT8 ADCINT9

ADCINT1 : ADC Interrupt Flag Clear 1
bits : 0 - 0 (1 bit)
access : read-write

ADCINT2 : ADC Interrupt Flag Clear 2
bits : 1 - 1 (1 bit)
access : read-write

ADCINT3 : ADC Interrupt Flag Clear 3
bits : 2 - 2 (1 bit)
access : read-write

ADCINT4 : ADC Interrupt Flag Clear 4
bits : 3 - 3 (1 bit)
access : read-write

ADCINT5 : ADC Interrupt Flag Clear 5
bits : 4 - 4 (1 bit)
access : read-write

ADCINT6 : ADC Interrupt Flag Clear 6
bits : 5 - 5 (1 bit)
access : read-write

ADCINT7 : ADC Interrupt Flag Clear 7
bits : 6 - 6 (1 bit)
access : read-write

ADCINT8 : ADC Interrupt Flag Clear 8
bits : 7 - 7 (1 bit)
access : read-write

ADCINT9 : ADC Interrupt Flag Clear 9
bits : 8 - 8 (1 bit)
access : read-write


ADCINTOVF

ADC Interrupt Overflow Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADCINTOVF ADCINTOVF read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCOVINT1 ADCOVINT2 ADCOVINT3 ADCOVINT4 ADCOVINT5 ADCOVINT6 ADCOVINT7 ADCOVINT8 ADCOVINT9

ADCOVINT1 : ADC Interrupt Overflow Flag 1
bits : 0 - 0 (1 bit)
access : read-only

ADCOVINT2 : ADC Interrupt Overflow Flag 2
bits : 1 - 1 (1 bit)
access : read-only

ADCOVINT3 : ADC Interrupt Overflow Flag 3
bits : 2 - 2 (1 bit)
access : read-only

ADCOVINT4 : ADC Interrupt Overflow Flag 4
bits : 3 - 3 (1 bit)
access : read-only

ADCOVINT5 : ADC Interrupt Overflow Flag 5
bits : 4 - 4 (1 bit)
access : read-only

ADCOVINT6 : ADC Interrupt Overflow Flag 6
bits : 5 - 5 (1 bit)
access : read-only

ADCOVINT7 : ADC Interrupt Overflow Flag 7
bits : 6 - 6 (1 bit)
access : read-only

ADCOVINT8 : ADC Interrupt Overflow Flag 8
bits : 7 - 7 (1 bit)
access : read-only

ADCOVINT9 : ADC Interrupt Overflow Flag 9
bits : 8 - 8 (1 bit)
access : read-only


ADCCMPCTL

ADC Compare Control Register
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCCMPCTL ADCCMPCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMP0SEL CMP1SEL CMP2SEL CMP3SEL

CMP0SEL : Compare 0 SOC Channel Select
bits : 0 - 3 (4 bit)
access : read-write

CMP1SEL : Compare 1 SOC Channel Select
bits : 4 - 7 (4 bit)
access : read-write

CMP2SEL : Compare 2 SOC Channel Select
bits : 8 - 11 (4 bit)
access : read-write

CMP3SEL : Compare 3 SOC Channel Select
bits : 12 - 15 (4 bit)
access : read-write


ADCCMPINTR

ADC Compare INterrupt Register
address_offset : 0x184 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCCMPINTR ADCCMPINTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMP0LO CMP0HI CMP1LO CMP1HI CMP2LO CMP2HI CMP3LO CMP3HI CMP0LO_EN CMP0HI_EN CMP1LO_EN CMP1HI_EN CMP2LO_EN CMP2HI_EN CMP3LO_EN CMP3HI_EN

CMP0LO : Compare 0 Low Interrupt Status
bits : 0 - 0 (1 bit)
access : read-write

CMP0HI : Compare 0 High Interrupt Status
bits : 1 - 1 (1 bit)
access : read-write

CMP1LO : Compare 1 Low Interrupt Status
bits : 2 - 2 (1 bit)
access : read-write

CMP1HI : Compare 1 High Interrupt Status
bits : 3 - 3 (1 bit)
access : read-write

CMP2LO : Compare 2 Low Interrupt Status
bits : 4 - 4 (1 bit)
access : read-write

CMP2HI : Compare 2 High Interrupt Status
bits : 5 - 5 (1 bit)
access : read-write

CMP3LO : Compare 3 Low Interrupt Status
bits : 6 - 6 (1 bit)
access : read-write

CMP3HI : Compare 3 High Interrupt Status
bits : 7 - 7 (1 bit)
access : read-write

CMP0LO_EN : Compare 0 Low Interrupt Enable
bits : 16 - 16 (1 bit)
access : read-write

CMP0HI_EN : Compare 0 High Interrupt Enable
bits : 17 - 17 (1 bit)
access : read-write

CMP1LO_EN : Compare 1 Low Interrupt Enable
bits : 18 - 18 (1 bit)
access : read-write

CMP1HI_EN : Compare 1 High Interrupt Enable
bits : 19 - 19 (1 bit)
access : read-write

CMP2LO_EN : Compare 2 Low Interrupt Enable
bits : 20 - 20 (1 bit)
access : read-write

CMP2HI_EN : Compare 2 High Interrupt Enable
bits : 21 - 21 (1 bit)
access : read-write

CMP3LO_EN : Compare 3 Low Interrupt Enable
bits : 22 - 22 (1 bit)
access : read-write

CMP3HI_EN : Compare 3 High Interrupt Enable
bits : 23 - 23 (1 bit)
access : read-write


ADCCMP0_LO

ADC Comparator 0 Low Comparison Value
address_offset : 0x188 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCCMP0_LO ADCCMP0_LO read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCCMP0_HI

ADC Comparator 0 High Comparison Value
address_offset : 0x18C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCCMP0_HI ADCCMP0_HI read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCCMP1_LO

ADC Comparator 1 Low Comparison Value
address_offset : 0x190 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCCMP1_LO ADCCMP1_LO read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCCMP1_HI

ADC Comparator 1 High Comparison Value
address_offset : 0x194 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCCMP1_HI ADCCMP1_HI read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCCMP2_LO

ADC Comparator 2 Low Comparison Value
address_offset : 0x198 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCCMP2_LO ADCCMP2_LO read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCCMP2_HI

ADC Comparator 2 High Comparison Value
address_offset : 0x19C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCCMP2_HI ADCCMP2_HI read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCCMP3_LO

ADC Comparator 3 Low Comparison Value
address_offset : 0x1A0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCCMP3_LO ADCCMP3_LO read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCCMP3_HI

ADC Comparator 3 High Comparison Value
address_offset : 0x1A4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCCMP3_HI ADCCMP3_HI read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCINTOVFCLR

ADC Interrupt Overflow Clear Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCINTOVFCLR ADCINTOVFCLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCOVINT1 ADCOVINT2 ADCOVINT3 ADCOVINT4 ADCOVINT5 ADCOVINT6 ADCOVINT7 ADCOVINT8 ADCOVINT9

ADCOVINT1 : ADC Interrupt Overflow Flag Clear 1
bits : 0 - 0 (1 bit)
access : read-write

ADCOVINT2 : ADC Interrupt Overflow Flag Clear 2
bits : 1 - 1 (1 bit)
access : read-write

ADCOVINT3 : ADC Interrupt Overflow Flag Clear 3
bits : 2 - 2 (1 bit)
access : read-write

ADCOVINT4 : ADC Interrupt Overflow Flag Clear 4
bits : 3 - 3 (1 bit)
access : read-write

ADCOVINT5 : ADC Interrupt Overflow Flag Clear 5
bits : 4 - 4 (1 bit)
access : read-write

ADCOVINT6 : ADC Interrupt Overflow Flag Clear 6
bits : 5 - 5 (1 bit)
access : read-write

ADCOVINT7 : ADC Interrupt Overflow Flag Clear 7
bits : 6 - 6 (1 bit)
access : read-write

ADCOVINT8 : ADC Interrupt Overflow Flag Clear 8
bits : 7 - 7 (1 bit)
access : read-write

ADCOVINT9 : ADC Interrupt Overflow Flag Clear 9
bits : 8 - 8 (1 bit)
access : read-write


INTSEL1N2

ADC Interrupt 1 and 2 Selection Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTSEL1N2 INTSEL1N2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT1SEL INT1E INT1CONT INT2SEL INT2E INT2CONT

INT1SEL : ADCINT1 EOC Source Select
bits : 0 - 4 (5 bit)
access : read-write

INT1E : ADCINT1 Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write

INT1CONT : ADCINT1 Continuous Mode Enable
bits : 6 - 6 (1 bit)
access : read-write

INT2SEL : ADCINT2 EOC Source Select
bits : 8 - 12 (5 bit)
access : read-write

INT2E : ADCINT2 Interrupt Enable
bits : 13 - 13 (1 bit)
access : read-write

INT2CONT : ADCINT2 Continuous Mode Enable
bits : 14 - 14 (1 bit)
access : read-write


ADCRESULT0

Conversion Result Buffer 0
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADCRESULT0 ADCRESULT0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT1


address_offset : 0x204 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT1 ADCRESULT1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT2


address_offset : 0x208 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT2 ADCRESULT2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT3


address_offset : 0x20C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT3 ADCRESULT3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT4


address_offset : 0x210 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT4 ADCRESULT4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT5


address_offset : 0x214 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT5 ADCRESULT5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT6


address_offset : 0x218 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT6 ADCRESULT6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT7


address_offset : 0x21C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT7 ADCRESULT7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT8


address_offset : 0x220 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT8 ADCRESULT8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT9


address_offset : 0x224 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT9 ADCRESULT9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT10


address_offset : 0x228 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT10 ADCRESULT10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT11


address_offset : 0x22C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT11 ADCRESULT11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT12


address_offset : 0x230 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT12 ADCRESULT12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT13


address_offset : 0x234 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT13 ADCRESULT13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT14


address_offset : 0x238 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT14 ADCRESULT14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCRESULT15


address_offset : 0x23C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCRESULT15 ADCRESULT15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

INTSEL3N4

ADC Interrupt 3 and 4 Selection Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTSEL3N4 INTSEL3N4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT3SEL INT3E INT3CONT INT4SEL INT4E INT4CONT

INT3SEL : ADCINT3 EOC Source Select
bits : 0 - 4 (5 bit)
access : read-write

INT3E : ADCINT3 Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write

INT3CONT : ADCINT3 Continuous Mode Enable
bits : 6 - 6 (1 bit)
access : read-write

INT4SEL : ADCINT4 EOC Source Select
bits : 8 - 12 (5 bit)
access : read-write

INT4E : ADCINT4 Interrupt Enable
bits : 13 - 13 (1 bit)
access : read-write

INT4CONT : ADCINT4 Continuous Mode Enable
bits : 14 - 14 (1 bit)
access : read-write


INTSEL5N6

ADC Interrupt 5 and 6 Selection Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTSEL5N6 INTSEL5N6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT5SEL INT5E INT5CONT INT6SEL INT6E INT6CONT

INT5SEL : ADCINT5 EOC Source Select
bits : 0 - 4 (5 bit)
access : read-write

INT5E : ADCINT5 Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write

INT5CONT : ADCINT5 Continuous Mode Enable
bits : 6 - 6 (1 bit)
access : read-write

INT6SEL : ADCINT6 EOC Source Select
bits : 8 - 12 (5 bit)
access : read-write

INT6E : ADCINT6 Interrupt Enable
bits : 13 - 13 (1 bit)
access : read-write

INT6CONT : ADCINT6 Continuous Mode Enable
bits : 14 - 14 (1 bit)
access : read-write


INTSEL7N8

ADC Interrupt 7 and 8 Selection
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTSEL7N8 INTSEL7N8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT7SEL INT7E INT7CONT INT8SEL INT8E INT8CONT

INT7SEL : ADCINT7 EOC Source Select
bits : 0 - 4 (5 bit)
access : read-write

INT7E : ADCINT7 Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write

INT7CONT : ADCINT7 Continuous Mode Enable
bits : 6 - 6 (1 bit)
access : read-write

INT8SEL : ADCINT8 EOC Source Select
bits : 8 - 12 (5 bit)
access : read-write

INT8E : ADCINT8 Interrupt Enable
bits : 13 - 13 (1 bit)
access : read-write

INT8CONT : ADCINT8 Continuous Mode Enable
bits : 14 - 14 (1 bit)
access : read-write


INTSEL9N10

ADC Interrupt 9 and 10 Selection
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTSEL9N10 INTSEL9N10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT9SEL INT9E INT9CONT

INT9SEL : ADCINT9 EOC Source Select
bits : 0 - 4 (5 bit)
access : read-write

INT9E : ADCINT9 Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write

INT9CONT : ADCINT9 Continuous Mode Enable
bits : 6 - 6 (1 bit)
access : read-write


ADCCTL2

ADC Control 2 Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCCTL2 ADCCTL2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NONOVERLAP clkdiv clockalwayson start_width smp_conv_delay dlyprediv

NONOVERLAP : No Overlap
bits : 1 - 1 (1 bit)
access : read-write

clkdiv : ADC Clock Division
bits : 2 - 5 (4 bit)
access : read-write

clockalwayson : ADC Clock Always on Enable
bits : 6 - 6 (1 bit)
access : read-write

start_width : ADC Start Pulse Width Select
bits : 8 - 10 (3 bit)
access : read-write

smp_conv_delay : ADC Converte Delay Time after Sample
bits : 11 - 13 (3 bit)
access : read-write

dlyprediv : ADC Trig Delay Clock Prescale
bits : 16 - 25 (10 bit)
access : read-write


SOCPRICTL

ADC SOC Priority Control
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SOCPRICTL SOCPRICTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SOCPRIORITY RRPOINTER

SOCPRIORITY : SOC Priority.
bits : 0 - 4 (5 bit)
access : read-write

RRPOINTER : Round Robin Pointer
bits : 5 - 10 (6 bit)
access : read-only


ADCSAMPLEMODE

ADC Sampling Mode Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCSAMPLEMODE ADCSAMPLEMODE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIMULEN0 SIMULEN2 SIMULEN4 SIMULEN6 SIMULEN8 SIMULEN1O SIMULEN12 SIMULEN14

SIMULEN0 : Simultaneous sampling enable for SOC0/SOC1
bits : 0 - 0 (1 bit)
access : read-write

SIMULEN2 : Simultaneous sampling enable for SOC2/SOC3
bits : 1 - 1 (1 bit)
access : read-write

SIMULEN4 : Simultaneous sampling enable for SOC4/SOC5
bits : 2 - 2 (1 bit)
access : read-write

SIMULEN6 : Simultaneous sampling enable for SOC6/SOC7
bits : 3 - 3 (1 bit)
access : read-write

SIMULEN8 : Simultaneous sampling enable for SOC8/SOC9
bits : 4 - 4 (1 bit)
access : read-write

SIMULEN1O : Simultaneous sampling enable for SOC10/SOC11
bits : 5 - 5 (1 bit)
access : read-write

SIMULEN12 : Simultaneous sampling enable for SOC12/SOC13
bits : 6 - 6 (1 bit)
access : read-write

SIMULEN14 : Simultaneous sampling enable for SOC14/SOC15
bits : 7 - 7 (1 bit)
access : read-write


ADCINTSOCSEL1

ADC Interrupt SOC Selection 1 Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCINTSOCSEL1 ADCINTSOCSEL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SOC0 SOC1 SOC2 SOC3 SOC4 SOC5 SOC6 SOC7

SOC0 : SOC0 ADC Interrupt Trigger Select
bits : 0 - 1 (2 bit)
access : read-write

SOC1 : SOC1 ADC Interrupt Trigger Select
bits : 2 - 3 (2 bit)
access : read-write

SOC2 : SOC2 ADC Interrupt Trigger Select
bits : 4 - 5 (2 bit)
access : read-write

SOC3 : SOC3 ADC Interrupt Trigger Select
bits : 6 - 7 (2 bit)
access : read-write

SOC4 : SOC4 ADC Interrupt Trigger Select
bits : 8 - 9 (2 bit)
access : read-write

SOC5 : SOC5 ADC Interrupt Trigger Select
bits : 10 - 11 (2 bit)
access : read-write

SOC6 : SOC6 ADC Interrupt Trigger Select
bits : 12 - 13 (2 bit)
access : read-write

SOC7 : SOC7 ADC Interrupt Trigger Select
bits : 14 - 15 (2 bit)
access : read-write


ADCINTSOCSEL2

ADC Interrupt SOC Selection 2 Register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCINTSOCSEL2 ADCINTSOCSEL2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SOC8 SOC9 SOC10 SOC11 SOC12 SOC13 SOC14 SOC15

SOC8 : SOC8 ADC Interrupt Trigger Select
bits : 0 - 1 (2 bit)
access : read-write

SOC9 : SOC9 ADC Interrupt Trigger Select
bits : 2 - 3 (2 bit)
access : read-write

SOC10 : SOC10 ADC Interrupt Trigger Select
bits : 4 - 5 (2 bit)
access : read-write

SOC11 : SOC11 ADC Interrupt Trigger Select
bits : 6 - 7 (2 bit)
access : read-write

SOC12 : SOC12 ADC Interrupt Trigger Select
bits : 8 - 9 (2 bit)
access : read-write

SOC13 : SOC13 ADC Interrupt Trigger Select
bits : 10 - 11 (2 bit)
access : read-write

SOC14 : SOC14 ADC Interrupt Trigger Select
bits : 12 - 13 (2 bit)
access : read-write

SOC15 : SOC15 ADC Interrupt Trigger Select
bits : 14 - 15 (2 bit)
access : read-write


ADCSOCFLG1

ADC SOC Flag 1 Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADCSOCFLG1 ADCSOCFLG1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SOC0 SOC1 SOC2 SOC3 SOC4 SOC5 SOC6 SOC7 SOC8 SOC9 SOC10 SOC11 SOC12 SOC13 SOC14 SOC15

SOC0 : SOC0 Start of Conversion Flag
bits : 0 - 0 (1 bit)
access : read-write

SOC1 : SOC1 Start of Conversion Flag
bits : 1 - 1 (1 bit)
access : read-write

SOC2 : SOC2 Start of Conversion Flag
bits : 2 - 2 (1 bit)
access : read-write

SOC3 : SOC3 Start of Conversion Flag
bits : 3 - 3 (1 bit)
access : read-write

SOC4 : SOC4 Start of Conversion Flag
bits : 4 - 4 (1 bit)
access : read-write

SOC5 : SOC5 Start of Conversion Flag
bits : 5 - 5 (1 bit)
access : read-write

SOC6 : SOC6 Start of Conversion Flag
bits : 6 - 6 (1 bit)
access : read-write

SOC7 : SOC7 Start of Conversion Flag
bits : 7 - 7 (1 bit)
access : read-write

SOC8 : SOC8 Start of Conversion Flag
bits : 8 - 8 (1 bit)
access : read-write

SOC9 : SOC9 Start of Conversion Flag
bits : 9 - 9 (1 bit)
access : read-write

SOC10 : SOC10 Start of Conversion Flag
bits : 10 - 10 (1 bit)
access : read-write

SOC11 : SOC11 Start of Conversion Flag
bits : 11 - 11 (1 bit)
access : read-write

SOC12 : SOC12 Start of Conversion Flag
bits : 12 - 12 (1 bit)
access : read-write

SOC13 : SOC13 Start of Conversion Flag
bits : 13 - 13 (1 bit)
access : read-write

SOC14 : SOC14 Start of Conversion Flag
bits : 14 - 14 (1 bit)
access : read-write

SOC15 : SOC15 Start of Conversion Flag
bits : 15 - 15 (1 bit)
access : read-write


ADCSOCFRC1

ADC SOC Flag Force 1 Register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCSOCFRC1 ADCSOCFRC1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SOC0 SOC1 SOC2 SOC3 SOC4 SOC5 SOC6 SOC7 SOC8 SOC9 SOC10 SOC11 SOC12 SOC13 SOC14 SOC15

SOC0 : SOC0 Force Start of Conversion Flag
bits : 0 - 0 (1 bit)
access : read-write

SOC1 : SOC1 Force Start of Conversion Flag
bits : 1 - 1 (1 bit)
access : read-write

SOC2 : SOC2 Force Start of Conversion Flag
bits : 2 - 2 (1 bit)
access : read-write

SOC3 : SOC3 Force Start of Conversion Flag
bits : 3 - 3 (1 bit)
access : read-write

SOC4 : SOC4 Force Start of Conversion Flag
bits : 4 - 4 (1 bit)
access : read-write

SOC5 : SOC5 Force Start of Conversion Flag
bits : 5 - 5 (1 bit)
access : read-write

SOC6 : SOC6 Force Start of Conversion Flag
bits : 6 - 6 (1 bit)
access : read-write

SOC7 : SOC7 Force Start of Conversion Flag
bits : 7 - 7 (1 bit)
access : read-write

SOC8 : SOC8 Force Start of Conversion Flag
bits : 8 - 8 (1 bit)
access : read-write

SOC9 : SOC9 Force Start of Conversion Flag
bits : 9 - 9 (1 bit)
access : read-write

SOC10 : SOC10 Force Start of Conversion Flag
bits : 10 - 10 (1 bit)
access : read-write

SOC11 : SOC11 Force Start of Conversion Flag
bits : 11 - 11 (1 bit)
access : read-write

SOC12 : SOC12 Force Start of Conversion Flag
bits : 12 - 12 (1 bit)
access : read-write

SOC13 : SOC13 Force Start of Conversion Flag
bits : 13 - 13 (1 bit)
access : read-write

SOC14 : SOC14 Force Start of Conversion Flag
bits : 14 - 14 (1 bit)
access : read-write

SOC15 : SOC15 Force Start of Conversion Flag
bits : 15 - 15 (1 bit)
access : read-write


ADCSOCOVF1

ADC SOC Overflow 1 Register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADCSOCOVF1 ADCSOCOVF1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SOC0 SOC1 SOC2 SOC3 SOC4 SOC5 SOC6 SOC7 SOC8 SOC9 SOC10 SOC11 SOC12 SOC13 SOC14 SOC15

SOC0 : SOC0 Start of Conversion Overflow Flag
bits : 0 - 0 (1 bit)
access : read-write

SOC1 : SOC1 Start of Conversion Overflow Flag
bits : 1 - 1 (1 bit)
access : read-write

SOC2 : SOC2 Start of Conversion Overflow Flag
bits : 2 - 2 (1 bit)
access : read-write

SOC3 : SOC3 Start of Conversion Overflow Flag
bits : 3 - 3 (1 bit)
access : read-write

SOC4 : SOC4 Start of Conversion Overflow Flag
bits : 4 - 4 (1 bit)
access : read-write

SOC5 : SOC5 Start of Conversion Overflow Flag
bits : 5 - 5 (1 bit)
access : read-write

SOC6 : SOC6 Start of Conversion Overflow Flag
bits : 6 - 6 (1 bit)
access : read-write

SOC7 : SOC7 Start of Conversion Overflow Flag
bits : 7 - 7 (1 bit)
access : read-write

SOC8 : SOC8 Start of Conversion Overflow Flag
bits : 8 - 8 (1 bit)
access : read-write

SOC9 : SOC9 Start of Conversion Overflow Flag
bits : 9 - 9 (1 bit)
access : read-write

SOC10 : SOC10 Start of Conversion Overflow Flag
bits : 10 - 10 (1 bit)
access : read-write

SOC11 : SOC11 Start of Conversion Overflow Flag
bits : 11 - 11 (1 bit)
access : read-write

SOC12 : SOC12 Start of Conversion Overflow Flag
bits : 12 - 12 (1 bit)
access : read-write

SOC13 : SOC13 Start of Conversion Overflow Flag
bits : 13 - 13 (1 bit)
access : read-write

SOC14 : SOC14 Start of Conversion Overflow Flag
bits : 14 - 14 (1 bit)
access : read-write

SOC15 : SOC15 Start of Conversion Overflow Flag
bits : 15 - 15 (1 bit)
access : read-write


ADCSOCOVFCLR1

ADC SOC Overflow Clear 1 Register
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCSOCOVFCLR1 ADCSOCOVFCLR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SOC0 SOC1 SOC2 SOC3 SOC4 SOC5 SOC6 SOC7 SOC8 SOC9 SOC10 SOC11 SOC12 SOC13 SOC14 SOC15

SOC0 : SOC0 Clear Start of Conversion Overflow Flag
bits : 0 - 0 (1 bit)
access : read-write

SOC1 : SOC1 Clear Start of Conversion Overflow Flag
bits : 1 - 1 (1 bit)
access : read-write

SOC2 : SOC2 Clear Start of Conversion Overflow Flag
bits : 2 - 2 (1 bit)
access : read-write

SOC3 : SOC3 Clear Start of Conversion Overflow Flag
bits : 3 - 3 (1 bit)
access : read-write

SOC4 : SOC4 Clear Start of Conversion Overflow Flag
bits : 4 - 4 (1 bit)
access : read-write

SOC5 : SOC5 Clear Start of Conversion Overflow Flag
bits : 5 - 5 (1 bit)
access : read-write

SOC6 : SOC6 Clear Start of Conversion Overflow Flag
bits : 6 - 6 (1 bit)
access : read-write

SOC7 : SOC7 Clear Start of Conversion Overflow Flag
bits : 7 - 7 (1 bit)
access : read-write

SOC8 : SOC8 Clear Start of Conversion Overflow Flag
bits : 8 - 8 (1 bit)
access : read-write

SOC9 : SOC9 Clear Start of Conversion Overflow Flag
bits : 9 - 9 (1 bit)
access : read-write

SOC10 : SOC10 Clear Start of Conversion Overflow Flag
bits : 10 - 10 (1 bit)
access : read-write

SOC11 : SOC11 Clear Start of Conversion Overflow Flag
bits : 11 - 11 (1 bit)
access : read-write

SOC12 : SOC12 Clear Start of Conversion Overflow Flag
bits : 12 - 12 (1 bit)
access : read-write

SOC13 : SOC13 Clear Start of Conversion Overflow Flag
bits : 13 - 13 (1 bit)
access : read-write

SOC14 : SOC14 Clear Start of Conversion Overflow Flag
bits : 14 - 14 (1 bit)
access : read-write

SOC15 : SOC15 Clear Start of Conversion Overflow Flag
bits : 15 - 15 (1 bit)
access : read-write


ADCCTL3

ADC Control 3 Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCCTL3 ADCCTL3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 convstdlysel convstinvsel converteocsel sampledlysel chseldlysel alias shift

convstdlysel : ADC Convert Start Signal Delay Select
bits : 0 - 0 (1 bit)
access : read-write

convstinvsel : ADC Convert Start Signal Invert Select
bits : 1 - 1 (1 bit)
access : read-write

converteocsel : ADC Convert Start Signal Mode Select
bits : 2 - 2 (1 bit)
access : read-write

sampledlysel : Sample Signal Delay Select
bits : 4 - 4 (1 bit)
access : read-write

chseldlysel : CHSEL Signal Delay Select
bits : 5 - 5 (1 bit)
access : read-write

alias : ADC Result Alias
bits : 14 - 15 (2 bit)
access : read-write

shift : ADC Result Left Shift
bits : 24 - 28 (5 bit)
access : read-write


ADCSOC0CTL

ADC SOCx Control Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCSOC0CTL ADCSOC0CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACQPS CHSEL TRIGSEL INDLY

ACQPS : SOCx Acquisition Prescale
bits : 0 - 5 (6 bit)
access : read-write

CHSEL : SOCx Channel Select
bits : 6 - 9 (4 bit)
access : read-write

TRIGSEL : SOCx Trigger Source Select
bits : 11 - 15 (5 bit)
access : read-write

INDLY : SOCx Trigger Delay Select
bits : 16 - 23 (8 bit)
access : read-write


ADCSOC1CTL


address_offset : 0x84 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC1CTL ADCSOC1CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC2CTL


address_offset : 0x88 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC2CTL ADCSOC2CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC3CTL


address_offset : 0x8C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC3CTL ADCSOC3CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC4CTL


address_offset : 0x90 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC4CTL ADCSOC4CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC5CTL


address_offset : 0x94 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC5CTL ADCSOC5CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC6CTL


address_offset : 0x98 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC6CTL ADCSOC6CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC7CTL


address_offset : 0x9C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC7CTL ADCSOC7CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC8CTL


address_offset : 0xA0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC8CTL ADCSOC8CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC9CTL


address_offset : 0xA4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC9CTL ADCSOC9CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC10CTL


address_offset : 0xA8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC10CTL ADCSOC10CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC11CTL


address_offset : 0xAC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC11CTL ADCSOC11CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC12CTL


address_offset : 0xB0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC12CTL ADCSOC12CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC13CTL


address_offset : 0xB4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC13CTL ADCSOC13CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC14CTL


address_offset : 0xB8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC14CTL ADCSOC14CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCSOC15CTL


address_offset : 0xBC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0

ADCSOC15CTL ADCSOC15CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0


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