\n
address_offset : 0x0 Bytes (0x0)
size : 0xB0 byte (0x0)
mem_usage : registers
protection :
MULT_CTRL Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
reset_mult : reset_mult
bits : 0 - 0 (1 bit)
access : write-only
Enumeration:
End of enumeration elements list.
reset_result : reset_result
bits : 1 - 1 (1 bit)
access : write-only
Enumeration:
End of enumeration elements list.
overflow : overflow
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
carry : carry
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
ov_intr_en : ov_intr_en
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
cr_intr_en : cr_intr_en
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
shift_imm : shift_imm
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
shift_en : shift_en
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
shift_sel : shift_sel
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
mult_only : mult_only
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
mult_signed : mult_signed
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
MULTA_ADD Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MULTB_ADD Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MULTA_SUB Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MULTB_SUB
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MULT_RESULLO Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MULT_RESULHI Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIV_CTRL Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
div_reset : div_reset
bits : 0 - 0 (1 bit)
access : write-only
Enumeration:
End of enumeration elements list.
divider_32bit : divider_32bit
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
div_by_0 : div_by_0
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
DIV_ALO
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIV_AHI
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIV_B
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SHIFT_NUM Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIV_QUOTLO
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIV_QUOTHI
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIV_REM
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CRC_CTRL
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RESET : RESET
bits : 0 - 0 (1 bit)
access : write-only
Enumeration:
End of enumeration elements list.
RESET_CRC : RESET_CRC
bits : 1 - 1 (1 bit)
access : write-only
Enumeration:
End of enumeration elements list.
CRC_BYTE : CRC_BYTE
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CRC_LM : CRC_LM
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CRC_GPS : CRC_GPS
bits : 24 - 25 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
CRC_DATA
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CRC_RESULT
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MULTA Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MULTB
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
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