\n
address_offset : 0x0 Bytes (0x0)
size : 0x4000 byte (0x0)
mem_usage : registers
protection :
Port selection register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IO0_SEL : Selects connection for IO pad 0 route.
bits : 0 - 3 (4 bit)
access : read-write
Enumeration:
0 : GPIO
SW controlled GPIO.
1 : GPIO_DSI
SW controlled 'out', DSI controlled 'oe_n'.
2 : DSI_DSI
DSI controlled 'out' and 'oe_n'.
3 : DSI_GPIO
DSI controlled 'out', SW controlled 'oe_n'.
4 : CSD_SENSE
CSD sense connection (analog mode)
5 : CSD_SHIELD
CSD shield connection (analog mode)
6 : AMUXA
AMUXBUS A connection.
7 : AMUXB
AMUXBUS B connection. This mode is also used for CSD GPIO charging. When CSD GPIO charging is enabled in CSD_CONTROL, 'oe_n' is connected to '!csd_charge' signal (and IO pad is also still connected to AMUXBUS B).
8 : ACT_0
Chip specific Active source 0 connection.
9 : ACT_1
Chip specific Active source 1 connection.
10 : ACT_2
Chip specific Active source 2 connection.
11 : ACT_3
Chip specific Active source 3 connection.
12 : LCD_COM
LCD common connection. This mode provides DeepSleep functionality (provided that the LCD block is enabled and properly configured).
13 : LCD_SEG
LCD segment connection. This mode provides DeepSleep functionality (provided that the LCD block is enabled and properly configured).
14 : DS_2
Chip specific DeepSleep source 2 connection.
15 : DS_3
Chip specific DeepSleep source 3 connection.
End of enumeration elements list.
IO1_SEL : Selects connection for IO pad 1 route.
bits : 4 - 11 (8 bit)
access : read-write
IO2_SEL : Selects connection for IO pad 2 route.
bits : 8 - 19 (12 bit)
access : read-write
IO3_SEL : Selects connection for IO pad 3 route.
bits : 12 - 27 (16 bit)
access : read-write
IO4_SEL : Selects connection for IO pad 4 route.
bits : 16 - 35 (20 bit)
access : read-write
IO5_SEL : Selects connection for IO pad 5 route.
bits : 20 - 43 (24 bit)
access : read-write
IO6_SEL : Selects connection for IO pad 6 route.
bits : 24 - 51 (28 bit)
access : read-write
IO7_SEL : Selects connection for IO pad 7 route.
bits : 28 - 59 (32 bit)
access : read-write
Pump control
address_offset : 0x2000 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLOCK_SEL : Clock select: '0': External clock. '1': Internal clock (deprecated).
bits : 0 - 0 (1 bit)
access : read-write
ENABLED : Pump enabled: '0': Disabled. '1': Enabled.
bits : 31 - 62 (32 bit)
access : read-write
AMUX splitter cell control
address_offset : 0x2100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWITCH_AA_SL : T-switch control for Left AMUXBUSA switch: '0': switch open. '1': switch closed.
bits : 0 - 0 (1 bit)
access : read-write
SWITCH_AA_SR : T-switch control for Right AMUXBUSA switch: '0': switch open. '1': switch closed.
bits : 1 - 2 (2 bit)
access : read-write
SWITCH_AA_S0 : T-switch control for AMUXBUSA vssa/ground switch: '0': switch open. '1': switch closed.
bits : 2 - 4 (3 bit)
access : read-write
SWITCH_BB_SL : T-switch control for Left AMUXBUSB switch.
bits : 4 - 8 (5 bit)
access : read-write
SWITCH_BB_SR : T-switch control for Right AMUXBUSB switch.
bits : 5 - 10 (6 bit)
access : read-write
SWITCH_BB_S0 : T-switch control for AMUXBUSB vssa/ground switch.
bits : 6 - 12 (7 bit)
access : read-write
AMUX splitter cell control
address_offset : 0x2104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWITCH_AA_SL : T-switch control for Left AMUXBUSA switch: '0': switch open. '1': switch closed.
bits : 0 - 0 (1 bit)
access : read-write
SWITCH_AA_SR : T-switch control for Right AMUXBUSA switch: '0': switch open. '1': switch closed.
bits : 1 - 2 (2 bit)
access : read-write
SWITCH_AA_S0 : T-switch control for AMUXBUSA vssa/ground switch: '0': switch open. '1': switch closed.
bits : 2 - 4 (3 bit)
access : read-write
SWITCH_BB_SL : T-switch control for Left AMUXBUSB switch.
bits : 4 - 8 (5 bit)
access : read-write
SWITCH_BB_SR : T-switch control for Right AMUXBUSB switch.
bits : 5 - 10 (6 bit)
access : read-write
SWITCH_BB_S0 : T-switch control for AMUXBUSB vssa/ground switch.
bits : 6 - 12 (7 bit)
access : read-write
AMUX splitter cell control
address_offset : 0x2108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWITCH_AA_SL : T-switch control for Left AMUXBUSA switch: '0': switch open. '1': switch closed.
bits : 0 - 0 (1 bit)
access : read-write
SWITCH_AA_SR : T-switch control for Right AMUXBUSA switch: '0': switch open. '1': switch closed.
bits : 1 - 2 (2 bit)
access : read-write
SWITCH_AA_S0 : T-switch control for AMUXBUSA vssa/ground switch: '0': switch open. '1': switch closed.
bits : 2 - 4 (3 bit)
access : read-write
SWITCH_BB_SL : T-switch control for Left AMUXBUSB switch.
bits : 4 - 8 (5 bit)
access : read-write
SWITCH_BB_SR : T-switch control for Right AMUXBUSB switch.
bits : 5 - 10 (6 bit)
access : read-write
SWITCH_BB_S0 : T-switch control for AMUXBUSB vssa/ground switch.
bits : 6 - 12 (7 bit)
access : read-write
AMUX splitter cell control
address_offset : 0x210C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWITCH_AA_SL : T-switch control for Left AMUXBUSA switch: '0': switch open. '1': switch closed.
bits : 0 - 0 (1 bit)
access : read-write
SWITCH_AA_SR : T-switch control for Right AMUXBUSA switch: '0': switch open. '1': switch closed.
bits : 1 - 2 (2 bit)
access : read-write
SWITCH_AA_S0 : T-switch control for AMUXBUSA vssa/ground switch: '0': switch open. '1': switch closed.
bits : 2 - 4 (3 bit)
access : read-write
SWITCH_BB_SL : T-switch control for Left AMUXBUSB switch.
bits : 4 - 8 (5 bit)
access : read-write
SWITCH_BB_SR : T-switch control for Right AMUXBUSB switch.
bits : 5 - 10 (6 bit)
access : read-write
SWITCH_BB_S0 : T-switch control for AMUXBUSB vssa/ground switch.
bits : 6 - 12 (7 bit)
access : read-write
AMUX splitter cell control
address_offset : 0x2110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWITCH_AA_SL : T-switch control for Left AMUXBUSA switch: '0': switch open. '1': switch closed.
bits : 0 - 0 (1 bit)
access : read-write
SWITCH_AA_SR : T-switch control for Right AMUXBUSA switch: '0': switch open. '1': switch closed.
bits : 1 - 2 (2 bit)
access : read-write
SWITCH_AA_S0 : T-switch control for AMUXBUSA vssa/ground switch: '0': switch open. '1': switch closed.
bits : 2 - 4 (3 bit)
access : read-write
SWITCH_BB_SL : T-switch control for Left AMUXBUSB switch.
bits : 4 - 8 (5 bit)
access : read-write
SWITCH_BB_SR : T-switch control for Right AMUXBUSB switch.
bits : 5 - 10 (6 bit)
access : read-write
SWITCH_BB_S0 : T-switch control for AMUXBUSB vssa/ground switch.
bits : 6 - 12 (7 bit)
access : read-write
AMUX splitter cell control
address_offset : 0x2114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWITCH_AA_SL : T-switch control for Left AMUXBUSA switch: '0': switch open. '1': switch closed.
bits : 0 - 0 (1 bit)
access : read-write
SWITCH_AA_SR : T-switch control for Right AMUXBUSA switch: '0': switch open. '1': switch closed.
bits : 1 - 2 (2 bit)
access : read-write
SWITCH_AA_S0 : T-switch control for AMUXBUSA vssa/ground switch: '0': switch open. '1': switch closed.
bits : 2 - 4 (3 bit)
access : read-write
SWITCH_BB_SL : T-switch control for Left AMUXBUSB switch.
bits : 4 - 8 (5 bit)
access : read-write
SWITCH_BB_SR : T-switch control for Right AMUXBUSB switch.
bits : 5 - 10 (6 bit)
access : read-write
SWITCH_BB_S0 : T-switch control for AMUXBUSB vssa/ground switch.
bits : 6 - 12 (7 bit)
access : read-write
AMUX splitter cell control
address_offset : 0x2118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWITCH_AA_SL : T-switch control for Left AMUXBUSA switch: '0': switch open. '1': switch closed.
bits : 0 - 0 (1 bit)
access : read-write
SWITCH_AA_SR : T-switch control for Right AMUXBUSA switch: '0': switch open. '1': switch closed.
bits : 1 - 2 (2 bit)
access : read-write
SWITCH_AA_S0 : T-switch control for AMUXBUSA vssa/ground switch: '0': switch open. '1': switch closed.
bits : 2 - 4 (3 bit)
access : read-write
SWITCH_BB_SL : T-switch control for Left AMUXBUSB switch.
bits : 4 - 8 (5 bit)
access : read-write
SWITCH_BB_SR : T-switch control for Right AMUXBUSB switch.
bits : 5 - 10 (6 bit)
access : read-write
SWITCH_BB_S0 : T-switch control for AMUXBUSB vssa/ground switch.
bits : 6 - 12 (7 bit)
access : read-write
AMUX splitter cell control
address_offset : 0x211C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWITCH_AA_SL : T-switch control for Left AMUXBUSA switch: '0': switch open. '1': switch closed.
bits : 0 - 0 (1 bit)
access : read-write
SWITCH_AA_SR : T-switch control for Right AMUXBUSA switch: '0': switch open. '1': switch closed.
bits : 1 - 2 (2 bit)
access : read-write
SWITCH_AA_S0 : T-switch control for AMUXBUSA vssa/ground switch: '0': switch open. '1': switch closed.
bits : 2 - 4 (3 bit)
access : read-write
SWITCH_BB_SL : T-switch control for Left AMUXBUSB switch.
bits : 4 - 8 (5 bit)
access : read-write
SWITCH_BB_SR : T-switch control for Right AMUXBUSB switch.
bits : 5 - 10 (6 bit)
access : read-write
SWITCH_BB_S0 : T-switch control for AMUXBUSB vssa/ground switch.
bits : 6 - 12 (7 bit)
access : read-write
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