\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :
No Description
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IPVERSION : IP VERSION
bits : 0 - 31 (32 bit)
access : read-only
No Description
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
S1CDIR : Count Direction Determined By S1
bits : 0 - 0 (1 bit)
access : read-write
CNTDIR : Non-Quadrature Mode Counter Direction Co
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : UP
Up counter mode.
1 : DOWN
Down counter mode.
End of enumeration elements list.
EDGE : Edge Select
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : POS
Positive edges on the PCNTn_S0IN inputs are counted in OVSSINGLE mode. Does not invert PCNTn_S1IN input in OVSSINGLE and EXTCLKSINGLE modes
1 : NEG
Negative edges on the PCNTn_S0IN inputs are counted in OVSSINGLE mode. Inverts the PCNTn_S1IN input in OVSSINGLE and EXTCLKSINGLE modes
End of enumeration elements list.
CNTEV : Controls When the Counter Counts
bits : 4 - 5 (2 bit)
access : read-write
Enumeration:
0 : BOTH
Counts up on up-count and down on down-count events.
1 : UP
Only counts up on up-count events.
2 : DOWN
Only counts down on down-count events.
End of enumeration elements list.
AUXCNTEV : Controls When the Aux Counter Counts
bits : 6 - 7 (2 bit)
access : read-write
Enumeration:
0 : BOTH
Counts up on both up-count and down-count events.
1 : UP
Counts up on up-count events.
2 : DOWN
Counts up on down-count events.
End of enumeration elements list.
No Description
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
CORERST : PCNT Clock Domain Reset
bits : 0 - 0 (1 bit)
access : write-only
CNTRST : CNT Reset
bits : 1 - 1 (1 bit)
access : write-only
AUXCNTRST : AUXCNT Reset
bits : 2 - 2 (1 bit)
access : write-only
LCNTIM : Load CNT Immediately
bits : 4 - 4 (1 bit)
access : write-only
STARTCNT : Start Main Counter
bits : 8 - 8 (1 bit)
access : write-only
STARTAUXCNT : Start Aux Counter
bits : 9 - 9 (1 bit)
access : write-only
STOPCNT : Stop Main Counter
bits : 10 - 10 (1 bit)
access : write-only
STOPAUXCNT : Stop Aux Counter
bits : 11 - 11 (1 bit)
access : write-only
No Description
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DIR : Current Counter Direction
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
0 : UP
Up counter mode (clockwise in EXTCLKQUAD mode with the EDGE bit in PCNTn_CTRL set to 0).
1 : DOWN
Down counter mode.
End of enumeration elements list.
TOPBV : TOP Buffer Valid
bits : 1 - 1 (1 bit)
access : read-only
PCNTLOCKSTATUS : Lock Status
bits : 2 - 2 (1 bit)
access : read-only
Enumeration:
0 : UNLOCKED
PCNT registers are unlocked
1 : LOCKED
PCNT registers are locked
End of enumeration elements list.
CNTRUNNING : Main Counter running status
bits : 3 - 3 (1 bit)
access : read-only
AUXCNTRUNNING : Aux Counter running status
bits : 4 - 4 (1 bit)
access : read-only
No Description
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UF : Underflow Interrupt Read Flag
bits : 0 - 0 (1 bit)
access : read-write
OF : Overflow Interrupt Read Flag
bits : 1 - 1 (1 bit)
access : read-write
DIRCNG : Direction Change Detect Interrupt Flag
bits : 2 - 2 (1 bit)
access : read-write
AUXOF : Auxiliary Overflow Interrupt Read Flag
bits : 3 - 3 (1 bit)
access : read-write
OQSTERR : Oversampling Quad State Err Int Flag
bits : 4 - 4 (1 bit)
access : read-write
No Description
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UF : Underflow Interrupt Read Flag
bits : 0 - 0 (1 bit)
access : read-write
OF : Overflow Interrupt Read Flag
bits : 1 - 1 (1 bit)
access : read-write
DIRCNG : Direction Change Detect Interrupt Flag
bits : 2 - 2 (1 bit)
access : read-write
AUXOF : Auxiliary Overflow Interrupt Read Flag
bits : 3 - 3 (1 bit)
access : read-write
OQSTERR : Oversampling Quad State Err Int Flag
bits : 4 - 4 (1 bit)
access : read-write
No Description
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CNT : Counter Value
bits : 0 - 15 (16 bit)
access : read-only
No Description
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AUXCNT : Auxiliary Counter Value
bits : 0 - 15 (16 bit)
access : read-only
No Description
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TOP : Counter Top Value
bits : 0 - 15 (16 bit)
access : read-write
No Description
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TOPB : Counter Top Buffer Register
bits : 0 - 15 (16 bit)
access : read-write
No Description
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILTLEN : Configure Filter Length for Inputs S0IN
bits : 0 - 7 (8 bit)
access : read-write
FLUTTERRM : Flutter Remove
bits : 12 - 12 (1 bit)
access : read-write
No Description
address_offset : 0x38 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CTRL : CTRL Register Busy
bits : 0 - 0 (1 bit)
access : read-only
CMD : CMD Register Busy
bits : 1 - 1 (1 bit)
access : read-only
TOP : TOP Register Busy
bits : 2 - 2 (1 bit)
access : read-only
TOPB : TOPB Register Busy
bits : 3 - 3 (1 bit)
access : read-only
OVSCTRL : OVSCTRL Register Busy
bits : 4 - 4 (1 bit)
access : read-only
No Description
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PCNTLOCKKEY : Configuration Lock Key
bits : 0 - 15 (16 bit)
access : write-only
Enumeration:
42976 : UNLOCK
Write to unock PCNT lockable registers
End of enumeration elements list.
No Description
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : PCNT Module Enable
bits : 0 - 0 (1 bit)
access : read-write
DISABLING : Disablement busy status
bits : 1 - 1 (1 bit)
access : read-only
No Description
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWRST : Software reset command
bits : 0 - 0 (1 bit)
access : write-only
RESETTING : Software reset busy status
bits : 1 - 1 (1 bit)
access : read-only
No Description
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MODE : Mode Select
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0 : OVSSINGLE
Single input EM23GRPACLK oversampling mode (available in EM0-EM3).
1 : EXTCLKSINGLE
Externally clocked single input counter mode (available in EM0-EM3).
2 : EXTCLKQUAD
Externally clocked quadrature decoder mode (available in EM0-EM3).
3 : OVSQUAD1X
EM23GRPACLK oversampling quadrature decoder 1X mode (available in EM0-EM3).
4 : OVSQUAD2X
EM23GRPACLK oversampling quadrature decoder 2X mode (available in EM0-EM3).
5 : OVSQUAD4X
EM23GRPACLK oversampling quadrature decoder 4X mode (available in EM0-EM3).
End of enumeration elements list.
DEBUGHALT : Debug Mode Halt Enable
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
PCNT is running in debug mode.
1 : ENABLE
PCNT is frozen in debug mode.
End of enumeration elements list.
FILTEN : Enable Digital Pulse Width Filter
bits : 5 - 5 (1 bit)
access : read-write
HYST : Enable Hysteresis
bits : 6 - 6 (1 bit)
access : read-write
S0PRSEN : S0IN PRS Enable
bits : 8 - 8 (1 bit)
access : read-write
S1PRSEN : S1IN PRS Enable
bits : 9 - 9 (1 bit)
access : read-write
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.