\n
address_offset : 0x0 Bytes (0x0)
size : 0x98 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PWR_MODE_RX :
bits : 0 - 0 (1 bit)
access : read-write
PWR_MODE_TX :
bits : 1 - 2 (2 bit)
access : read-write
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KDCOHFIC_1M :
bits : 0 - 7 (8 bit)
access : read-write
KDCOLF_IN_1M :
bits : 8 - 23 (16 bit)
access : read-write
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KMOD_ALPHA_1M :
bits : 0 - 4 (5 bit)
access : read-write
KDCOCN_IC :
bits : 16 - 38 (23 bit)
access : read-write
TKDCOCAL :
bits : 24 - 50 (27 bit)
access : read-write
KDCOLFCALEN :
bits : 27 - 54 (28 bit)
access : read-write
KDCOCALRX :
bits : 28 - 56 (29 bit)
access : read-write
KDCOCALTX :
bits : 29 - 58 (30 bit)
access : read-write
KDCOESTDEV :
bits : 30 - 61 (32 bit)
access : read-write
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KDTC_ALPHA :
bits : 0 - 5 (6 bit)
access : read-write
KTDC_IN :
bits : 6 - 20 (15 bit)
access : read-write
KDTC_PIPELINE_BYPASS :
bits : 15 - 30 (16 bit)
access : read-write
KDTCCN_IC :
bits : 16 - 38 (23 bit)
access : read-write
KDTCIC :
bits : 23 - 54 (32 bit)
access : read-write
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KDTCCALEN :
bits : 0 - 0 (1 bit)
access : read-write
KDTCCALMOD :
bits : 1 - 2 (2 bit)
access : read-write
KDTCCALMOD1P :
bits : 2 - 4 (3 bit)
access : read-write
KDTCCAL_INV :
bits : 3 - 6 (4 bit)
access : read-write
KDTCCALLG :
bits : 4 - 10 (7 bit)
access : read-write
KTDCCALEN :
bits : 8 - 16 (9 bit)
access : read-write
PHRDLY :
bits : 9 - 19 (11 bit)
access : read-write
TKDTCCAL :
bits : 11 - 25 (15 bit)
access : read-write
PHRDLY_EXTRA :
bits : 15 - 30 (16 bit)
access : read-write
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KCOARSE :
bits : 0 - 2 (3 bit)
access : read-write
KMEDIUM :
bits : 3 - 8 (6 bit)
access : read-write
AMPCALEN :
bits : 6 - 12 (7 bit)
access : read-write
DCOAMPTM :
bits : 7 - 14 (8 bit)
access : read-write
DCOAMPIC_HP_RX :
bits : 16 - 35 (20 bit)
access : read-write
DCOAMPIC_HP_TX :
bits : 20 - 43 (24 bit)
access : read-write
DCOAMPIC_LP_RX :
bits : 24 - 51 (28 bit)
access : read-write
DCOAMPIC_LP_TX :
bits : 28 - 59 (32 bit)
access : read-write
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BT_SEL :
bits : 0 - 0 (1 bit)
access : read-write
TX_DATA_INV :
bits : 1 - 2 (2 bit)
access : read-write
MOD_INDEX :
bits : 2 - 5 (4 bit)
access : read-write
EO_PACKET_DIS :
bits : 4 - 8 (5 bit)
access : read-write
TX_MODE :
bits : 6 - 13 (8 bit)
access : read-write
INV_CKMODEXT :
bits : 8 - 16 (9 bit)
access : read-write
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDMMODERX :
bits : 0 - 2 (3 bit)
access : read-write
SDMMODETX :
bits : 3 - 8 (6 bit)
access : read-write
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FINETAU :
bits : 0 - 4 (5 bit)
access : read-write
FINEK :
bits : 5 - 14 (10 bit)
access : read-write
FINEKZ :
bits : 10 - 25 (16 bit)
access : read-write
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MODTAU_TUNE :
bits : 0 - 5 (6 bit)
access : read-write
MODK_TUNE :
bits : 6 - 17 (12 bit)
access : read-write
MODTAU :
bits : 12 - 29 (18 bit)
access : read-write
MODK :
bits : 18 - 41 (24 bit)
access : read-write
MODKZ :
bits : 24 - 53 (30 bit)
access : read-write
RST_TAU_EN :
bits : 30 - 60 (31 bit)
access : read-write
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TDC_DTCIN_EN :
bits : 0 - 0 (1 bit)
access : read-write
TDC_CKVIN_EN :
bits : 1 - 2 (2 bit)
access : read-write
TDC_INV :
bits : 2 - 4 (3 bit)
access : read-write
INV_CKTDC :
bits : 3 - 6 (4 bit)
access : read-write
INV_CKPHV :
bits : 4 - 8 (5 bit)
access : read-write
INV_CKDCOMOD :
bits : 5 - 10 (6 bit)
access : read-write
EN_CKDCOMOD :
bits : 6 - 12 (7 bit)
access : read-write
TGLDETEN :
bits : 7 - 14 (8 bit)
access : read-write
DTCOFFSET :
bits : 8 - 22 (15 bit)
access : read-write
DTC_EN :
bits : 15 - 30 (16 bit)
access : read-write
TDC_OFFSET :
bits : 16 - 37 (22 bit)
access : read-write
VPASETTLE :
bits : 24 - 49 (26 bit)
access : read-write
DTC_LDO_DMY :
bits : 27 - 55 (29 bit)
access : read-write
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FBDIV_EN :
bits : 0 - 0 (1 bit)
access : read-write
RXDIV_FB_EN_RX :
bits : 1 - 2 (2 bit)
access : read-write
RXDIV_FB_EN_TX :
bits : 2 - 4 (3 bit)
access : read-write
RXDIV_TRIM :
bits : 8 - 24 (17 bit)
access : read-write
TXDIV_TRIM :
bits : 17 - 42 (26 bit)
access : read-write
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DCOCOARSEIC :
bits : 0 - 3 (4 bit)
access : read-write
DCOMEDIUMIC :
bits : 4 - 10 (7 bit)
access : read-write
DCOFINEIC :
bits : 8 - 21 (14 bit)
access : read-write
DCOMODIC :
bits : 16 - 44 (29 bit)
access : read-write
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CN :
bits : 0 - 6 (7 bit)
access : read-write
CS :
bits : 8 - 16 (9 bit)
access : read-write
SGN :
bits : 15 - 30 (16 bit)
access : read-write
CH0 :
bits : 16 - 44 (29 bit)
access : read-write
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TCOARSE :
bits : 0 - 3 (4 bit)
access : read-write
TMEDIUM :
bits : 4 - 11 (8 bit)
access : read-write
TFINE :
bits : 8 - 19 (12 bit)
access : read-write
TMOD :
bits : 12 - 27 (16 bit)
access : read-write
TPASETTLE :
bits : 16 - 35 (20 bit)
access : read-write
TSETTLE :
bits : 20 - 43 (24 bit)
access : read-write
TVPASETTLE :
bits : 24 - 53 (30 bit)
access : read-write
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TFREQMEAS :
bits : 0 - 4 (5 bit)
access : read-write
TMREN :
bits : 5 - 10 (6 bit)
access : read-write
ENRFMEAS :
bits : 6 - 12 (7 bit)
access : read-write
RFMEAS_MODE :
bits : 7 - 14 (8 bit)
access : read-write
HOLD_STATE :
bits : 8 - 19 (12 bit)
access : read-write
QUALMONMOD :
bits : 16 - 33 (18 bit)
access : read-write
QUALMONWND :
bits : 18 - 41 (24 bit)
access : read-write
QUALMONTRHLD :
bits : 24 - 53 (30 bit)
access : read-write
QUALMONFRCEN :
bits : 30 - 60 (31 bit)
access : read-write
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DLYFCWDT :
bits : 0 - 1 (2 bit)
access : read-write
RESDLY :
bits : 2 - 5 (4 bit)
access : read-write
MODDLY :
bits : 4 - 9 (6 bit)
access : read-write
ENRESIDUE :
bits : 6 - 12 (7 bit)
access : read-write
ENFCWMOD :
bits : 7 - 14 (8 bit)
access : read-write
PHR_FRAC_PRESET_VAL :
bits : 8 - 31 (24 bit)
access : read-write
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OVR_ACTIVE_SEL :
bits : 0 - 0 (1 bit)
access : read-write
OVR_ACTIVE_WR :
bits : 1 - 2 (2 bit)
access : read-write
OVR_RXBIT_SEL :
bits : 2 - 4 (3 bit)
access : read-write
OVR_RXBIT_WR :
bits : 3 - 6 (4 bit)
access : read-write
OVR_ENPAIN_SEL :
bits : 4 - 8 (5 bit)
access : read-write
OVR_ENPAIN_WR :
bits : 5 - 10 (6 bit)
access : read-write
OVR_SRESETN_SEL :
bits : 6 - 12 (7 bit)
access : read-write
OVR_SRESETN_WR :
bits : 7 - 14 (8 bit)
access : read-write
OVR_VPAEN_SEL :
bits : 8 - 16 (9 bit)
access : read-write
OVR_VPAEN_WR :
bits : 9 - 18 (10 bit)
access : read-write
OVR_RDYFORDIV_SEL :
bits : 10 - 20 (11 bit)
access : read-write
OVR_RDYFORDIV_WR :
bits : 11 - 22 (12 bit)
access : read-write
OVR_DCOAMPHOLD_SEL :
bits : 12 - 24 (13 bit)
access : read-write
OVR_DCOAMPHOLD_WR :
bits : 13 - 26 (14 bit)
access : read-write
OVR_DCOAMP_SEL :
bits : 16 - 32 (17 bit)
access : read-write
OVR_DCOAMP_WR :
bits : 17 - 37 (21 bit)
access : read-write
OVR_DTC_OH_SEL :
bits : 24 - 48 (25 bit)
access : read-write
OVR_DTC_OH_WR :
bits : 25 - 56 (32 bit)
access : read-write
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OVR_DCOCOARSE_SEL :
bits : 0 - 0 (1 bit)
access : read-write
OVR_DCOCOARSE_WR :
bits : 1 - 5 (5 bit)
access : read-write
OVR_DCOMEDIUM_SEL :
bits : 8 - 16 (9 bit)
access : read-write
OVR_DCOMEDIUM_WR :
bits : 9 - 20 (12 bit)
access : read-write
OVR_DCOFINE_SEL :
bits : 16 - 32 (17 bit)
access : read-write
OVR_DCOFINE_WR :
bits : 17 - 39 (23 bit)
access : read-write
OVR_DCOMOD_SEL :
bits : 23 - 46 (24 bit)
access : read-write
OVR_DCOMOD_WR :
bits : 24 - 55 (32 bit)
access : read-write
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OVR_RXDIV_EN_SEL :
bits : 0 - 0 (1 bit)
access : read-write
OVR_RXDIV_EN_WR :
bits : 1 - 2 (2 bit)
access : read-write
OVR_TXDIV_EN_SEL :
bits : 2 - 4 (3 bit)
access : read-write
OVR_TXDIV_EN_WR :
bits : 3 - 6 (4 bit)
access : read-write
OVR_FBDIV_EN_SEL :
bits : 4 - 8 (5 bit)
access : read-write
OVR_FBDIV_EN_WR :
bits : 5 - 10 (6 bit)
access : read-write
OVR_RXDIV_FB_EN_SEL :
bits : 6 - 12 (7 bit)
access : read-write
OVR_RXDIV_FB_EN_WR :
bits : 7 - 14 (8 bit)
access : read-write
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RFPT_MUX :
bits : 0 - 3 (4 bit)
access : read-write
INV_CKRFPT :
bits : 4 - 8 (5 bit)
access : read-write
RFPT_RATE :
bits : 5 - 10 (6 bit)
access : read-write
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ANATSTEN :
bits : 0 - 15 (16 bit)
access : read-write
ANATSTSPARE :
bits : 16 - 47 (32 bit)
access : read-write
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLIP_MOD_TUNE_0_RX :
bits : 0 - 12 (13 bit)
access : read-write
CLIP_MOD_TUNE_0_TX :
bits : 16 - 44 (29 bit)
access : read-write
EN_CMF_AVG :
bits : 31 - 62 (32 bit)
access : read-write
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FREQDIFF :
bits : 0 - 22 (23 bit)
access : read-only
PHVSA1 :
bits : 23 - 46 (24 bit)
access : read-only
PHVSA0 :
bits : 24 - 48 (25 bit)
access : read-only
TDCBUB :
bits : 25 - 50 (26 bit)
access : read-only
QUALMONDET :
bits : 26 - 52 (27 bit)
access : read-only
MEASDONE_OUT :
bits : 29 - 58 (30 bit)
access : read-only
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIFRX_1M :
bits : 0 - 13 (14 bit)
access : read-write
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DCOCOARSE :
bits : 0 - 3 (4 bit)
access : read-only
DCOMEDIUM :
bits : 4 - 10 (7 bit)
access : read-only
DCOFINE :
bits : 7 - 19 (13 bit)
access : read-only
DCOMOD :
bits : 13 - 38 (26 bit)
access : read-only
DCOAMP :
bits : 26 - 55 (30 bit)
access : read-only
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KDCO_HF_INT :
bits : 0 - 7 (8 bit)
access : read-only
KDCO_HF_OUT :
bits : 8 - 23 (16 bit)
access : read-only
KDCOCN :
bits : 16 - 38 (23 bit)
access : read-only
CAL_KDCOCAL :
bits : 23 - 46 (24 bit)
access : read-only
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KDTC_OUT :
bits : 0 - 8 (9 bit)
access : read-only
KDTCCN :
bits : 9 - 24 (16 bit)
access : read-only
KDTC_ALPHA_COMP :
bits : 16 - 40 (25 bit)
access : read-only
CAL_KDTCCAL :
bits : 25 - 50 (26 bit)
access : read-only
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TUNE_STATE :
bits : 0 - 3 (4 bit)
access : read-only
TMRVAL :
bits : 4 - 17 (14 bit)
access : read-only
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PLLFCWDT :
bits : 0 - 22 (23 bit)
access : read-only
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ANATSTSPARE_IN :
bits : 0 - 15 (16 bit)
access : read-only
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIFRX_OFFSET :
bits : 0 - 13 (14 bit)
access : read-write
FIFTX :
bits : 16 - 45 (30 bit)
access : read-write
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