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Peripheral_Registers

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :

Registers

WATCHDOG_REG

WATCHDOG_CTRL_REG


WATCHDOG_REG

Watchdog timer register.
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WATCHDOG_REG WATCHDOG_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WDOG_VAL WDOG_VAL_NEG WDOG_WEN

WDOG_VAL : Write: Watchdog timer reload value. Note that all bits 15-9 must be 0 to reload this register. Read: Actual Watchdog timer value. Decremented by 1 every 10.24 msec. Bit 8 indicates a negative counter value. 2, 1, 0, 1FF16, 1FE16 etc. An NMI or WDOG (SYS) reset is generated under the following conditions: If WATCHDOG_CTRL_REG[NMI_RST] = 0 then If WDOG_VAL = 0 -> NMI (Non Maskable Interrupt) if WDOG_VAL = 1F016 -> WDOG reset -> reload FF16 If WATCHDOG_CTRL_REG[NMI_RST] = 1 then if WDOG_VAL <= 0 -> WDOG reset -> reload FF16
bits : 0 - 7 (8 bit)
access : read-write

WDOG_VAL_NEG : 0 = Watchdog timer value is positive. 1 = Watchdog timer value is negative.
bits : 8 - 16 (9 bit)
access : read-write

WDOG_WEN : 0000.000 = Write enable for Watchdog timer else Write disable. This filter prevents unintentional presetting the watchdog with a SW run-away.
bits : 9 - 24 (16 bit)
access : write-only


WATCHDOG_CTRL_REG

Watchdog control register.
address_offset : 0x2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WATCHDOG_CTRL_REG WATCHDOG_CTRL_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NMI_RST

NMI_RST : 0 = Watchdog timer generates NMI at value 0, and WDOG (SYS) reset at <=-16. Timer can be frozen /resumed using SET_FREEZE_REG[FRZ_WDOG]/ RESET_FREEZE_REG[FRZ_WDOG]. 1 = Watchdog timer generates a WDOG (SYS) reset at value 0 and can not be frozen by Software. Note that this bit can only be set to 1 by SW and only be reset with a WDOG (SYS) reset or SW reset. The watchdog is always frozen when the Cortex-M0 is halted in DEBUG State.
bits : 0 - 0 (1 bit)
access : read-write



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