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Peripheral_Registers

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1A byte (0x0)
mem_usage : registers
protection :

Registers

WKUP_CTRL_REG

WKUP_SELECT_P3_REG

WKUP_POL_P0_REG

WKUP_POL_P1_REG

WKUP_POL_P2_REG

WKUP_POL_P3_REG

WKUP_COMPARE_REG

WKUP_RESET_IRQ_REG

WKUP_COUNTER_REG

WKUP_RESET_CNTR_REG

WKUP_SELECT_P0_REG

WKUP_SELECT_P1_REG

WKUP_SELECT_P2_REG


WKUP_CTRL_REG

Control register for the wakeup counter
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WKUP_CTRL_REG WKUP_CTRL_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WKUP_DEB_VALUE WKUP_SFT_KEYHIT WKUP_ENABLE_IRQ

WKUP_DEB_VALUE : Keyboard debounce time (N*1 ms with N = 1 to 63). 0x0: no debouncing 0x1 to 0x3F: 1 ms to 63 ms debounce time
bits : 0 - 5 (6 bit)
access : read-write

WKUP_SFT_KEYHIT : 0: no effect 1: emulate key hit. The event counter will increment by 1 (after debouncing if enabled). First make this bit 0 before any new key hit can be sensed.
bits : 6 - 12 (7 bit)
access : read-write

Enumeration: ENUM

End of enumeration elements list.

WKUP_ENABLE_IRQ : 0: no interrupt will be enabled 1: if the event counter reaches the value set by WKUP_COMPARE_REG an IRQ will be generated
bits : 7 - 14 (8 bit)
access : read-write

Enumeration: ENUM

End of enumeration elements list.


WKUP_SELECT_P3_REG

Select which inputs from P3 port can trigger wkup counter
address_offset : 0x10 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WKUP_SELECT_P3_REG WKUP_SELECT_P3_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WKUP_SELECT_P3

WKUP_SELECT_P3 : 0: input P3x is not enabled for wakeup event counter 1: input P3x is enabled for wakeup event counter
bits : 0 - 7 (8 bit)
access : read-write


WKUP_POL_P0_REG

Select the sensitivity polarity for each P0 input
address_offset : 0x12 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WKUP_POL_P0_REG WKUP_POL_P0_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WKUP_POL_P0

WKUP_POL_P0 : 0: enabled input P0x will increment the event counter if that input goes high 1: enabled input P0x will increment the event counter if that input goes low
bits : 0 - 7 (8 bit)
access : read-write


WKUP_POL_P1_REG

Select the sensitivity polarity for each P1 input
address_offset : 0x14 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WKUP_POL_P1_REG WKUP_POL_P1_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WKUP_POL_P1

WKUP_POL_P1 : 0: enabled input P1x will increment the event counter if that input goes high 1: enabled input P1x will increment the event counter if that input goes low
bits : 0 - 5 (6 bit)
access : read-write


WKUP_POL_P2_REG

Select the sensitivity polarity for each P2 input
address_offset : 0x16 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WKUP_POL_P2_REG WKUP_POL_P2_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WKUP_POL_P2

WKUP_POL_P2 : 0: enabled input P2x will increment the event counter if that input goes high 1: enabled input P2x will increment the event counter if that input goes low
bits : 0 - 9 (10 bit)
access : read-write


WKUP_POL_P3_REG

Select the sensitivity polarity for each P3 input
address_offset : 0x18 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WKUP_POL_P3_REG WKUP_POL_P3_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WKUP_POL_P3

WKUP_POL_P3 : 0: enabled input P3x will increment the event counter if that input goes high 1: enabled input P3x will increment the event counter if that input goes low
bits : 0 - 7 (8 bit)
access : read-write


WKUP_COMPARE_REG

Number of events before wakeup interrupt
address_offset : 0x2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WKUP_COMPARE_REG WKUP_COMPARE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPARE

COMPARE : The number of events that have to be counted before the wakeup interrupt will be given
bits : 0 - 7 (8 bit)
access : read-write


WKUP_RESET_IRQ_REG

Reset wakeup interrupt
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WKUP_RESET_IRQ_REG WKUP_RESET_IRQ_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WKUP_IRQ_RST

WKUP_IRQ_RST : writing any value to this register will reset the interrupt. reading always returns 0.
bits : 0 - 15 (16 bit)
access : write-only


WKUP_COUNTER_REG

Actual number of events of the wakeup counter
address_offset : 0x6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WKUP_COUNTER_REG WKUP_COUNTER_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EVENT_VALUE

EVENT_VALUE : This value represents the number of events that have been counted so far. It will be reset by resetting the interrupt.
bits : 0 - 7 (8 bit)
access : read-only


WKUP_RESET_CNTR_REG

Reset the event counter
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WKUP_RESET_CNTR_REG WKUP_RESET_CNTR_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WKUP_CNTR_RST

WKUP_CNTR_RST : writing any value to this register will reset the event counter
bits : 0 - 15 (16 bit)
access : write-only


WKUP_SELECT_P0_REG

Select which inputs from P0 port can trigger wkup counter
address_offset : 0xA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WKUP_SELECT_P0_REG WKUP_SELECT_P0_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WKUP_SELECT_P0

WKUP_SELECT_P0 : 0: input P0x is not enabled for wakeup event counter 1: input P0x is enabled for wakeup event counter
bits : 0 - 7 (8 bit)
access : read-write


WKUP_SELECT_P1_REG

Select which inputs from P1 port can trigger wkup counter
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WKUP_SELECT_P1_REG WKUP_SELECT_P1_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WKUP_SELECT_P1

WKUP_SELECT_P1 : 0: input P1x is not enabled for wakeup event counter 1: input P1x is enabled for wakeup event counter
bits : 0 - 5 (6 bit)
access : read-write


WKUP_SELECT_P2_REG

Select which inputs from P2 port can trigger wkup counter
address_offset : 0xE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WKUP_SELECT_P2_REG WKUP_SELECT_P2_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WKUP_SELECT_P2

WKUP_SELECT_P2 : 0: input P2x is not enabled for wakeup event counter 1: input P2x is enabled for wakeup event counter
bits : 0 - 9 (10 bit)
access : read-write



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