\n

Peripheral_Registers

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xD2 byte (0x0)
mem_usage : registers
protection :

Registers

P0_DATA_REG

P3_SET_DATA_REG

P4_SET_DATA_REG

P0_RESET_DATA_REG

P1_RESET_DATA_REG

P2_RESET_DATA_REG

P3_RESET_DATA_REG

P4_RESET_DATA_REG

P00_MODE_REG

P1_DATA_REG

P01_MODE_REG

P02_MODE_REG

P03_MODE_REG

P04_MODE_REG

P05_MODE_REG

P06_MODE_REG

P07_MODE_REG

P10_MODE_REG

P11_MODE_REG

P12_MODE_REG

P13_MODE_REG

P14_MODE_REG

P15_MODE_REG

P16_MODE_REG

P17_MODE_REG

P20_MODE_REG

P2_DATA_REG

P21_MODE_REG

P22_MODE_REG

P23_MODE_REG

P24_MODE_REG

P30_MODE_REG

P31_MODE_REG

P32_MODE_REG

P33_MODE_REG

P34_MODE_REG

P35_MODE_REG

P36_MODE_REG

P37_MODE_REG

P40_MODE_REG

P3_DATA_REG

P41_MODE_REG

P42_MODE_REG

P43_MODE_REG

P44_MODE_REG

P45_MODE_REG

P46_MODE_REG

P47_MODE_REG

P4_DATA_REG

P0_SET_DATA_REG

P1_SET_DATA_REG

P0_PADPWR_CTRL_REG

P1_PADPWR_CTRL_REG

P2_PADPWR_CTRL_REG

P3_PADPWR_CTRL_REG

P4_PADPWR_CTRL_REG

CLK_SEL

P2_SET_DATA_REG


P0_DATA_REG

P0 Data input / output Register
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P0_DATA_REG P0_DATA_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0_DATA

P0_DATA : Set P0 output register when written Returns the value of P0 port when read
bits : 0 - 7 (8 bit)
access : read-write


P3_SET_DATA_REG

P3 Set port pins Register
address_offset : 0x10 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P3_SET_DATA_REG P3_SET_DATA_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P3_SET

P3_SET : Writing a 1 to P3[y] sets P3[y] to 1. Writing 0 is discarded Reading returns 0
bits : 0 - 7 (8 bit)
access : write-only


P4_SET_DATA_REG

P4 Set port pins Register
address_offset : 0x12 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P4_SET_DATA_REG P4_SET_DATA_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P4_SET

P4_SET : Writing a 1 to P4[y] sets P4[y] to 1. Writing 0 is discarded Reading returns 0
bits : 0 - 7 (8 bit)
access : write-only


P0_RESET_DATA_REG

P0 Reset port pins Register
address_offset : 0x14 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P0_RESET_DATA_REG P0_RESET_DATA_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0_RESET

P0_RESET : Writing a 1 to P0[y] sets P0[y] to 0. Writing 0 is discarded Reading returns 0
bits : 0 - 7 (8 bit)
access : read-write


P1_RESET_DATA_REG

P1 Reset port pins Register
address_offset : 0x16 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P1_RESET_DATA_REG P1_RESET_DATA_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P1_RESET

P1_RESET : Writing a 1 to P1[y] sets P1[y] to 0. Writing 0 is discarded Reading returns 0
bits : 0 - 7 (8 bit)
access : read-write


P2_RESET_DATA_REG

P2 Reset port pins Register
address_offset : 0x18 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P2_RESET_DATA_REG P2_RESET_DATA_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P2_RESET

P2_RESET : Writing a 1 to P2[y] sets P2[y] to 0. Writing 0 is discarded Reading returns 0
bits : 0 - 4 (5 bit)
access : read-write


P3_RESET_DATA_REG

P3 Reset port pins Register
address_offset : 0x1A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P3_RESET_DATA_REG P3_RESET_DATA_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P3_RESET

P3_RESET : Writing a 1 to P3[y] sets P3[y] to 0. Writing 0 is discarded Reading returns 0
bits : 0 - 7 (8 bit)
access : write-only


P4_RESET_DATA_REG

P4 Reset port pins Register
address_offset : 0x1C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P4_RESET_DATA_REG P4_RESET_DATA_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P4_RESET

P4_RESET : Writing a 1 to P4[y] sets P4[y] to 0. Writing 0 is discarded Reading returns 0
bits : 0 - 7 (8 bit)
access : write-only


P00_MODE_REG

P00 Mode Register
address_offset : 0x1E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P00_MODE_REG P00_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : Function of port: 0: GPIO, PUPD (see above) 1: UART_RX 2: UART_TX 3: UART_IRDA_RX 4: UART_IRDA_TX 5: UART2_RX 6: UART2_TX 7: UART2_IRDA_RX 8: UART2_IRDA_TX 9: UART2_CTSN 10: UART2_RTSN 11: SPI_DI 12: SPI_DO 13: SPI_CLK 14: SPI_EN 15: SPI2_DI 16: SPI2_DO 17: SPI2_CLK 18: SPI2_EN 19: I2C_SCL 20: I2C_SDA 21: I2C2_SCL 22: I2C2_SDA 23: PWM0 24: PWM1 25: PWM2 26: PWM3 27: PWM4 28: BLE_DIAG (ble_diag_0: P2_0, ble_diag_1: P2_1, ble_diag_2: P2_2, ble_diag_3: P1_0, ble_diag_4: P1_1, ble_diag_5: P1_2, ble_diag_6: P1_3, ble_diag_7: P2_3) 29: FTDF_DIAG (ftdf_diag_0: P1_4, ftdf_diag_1: P1_5, ftdf_diag_2: P1_6, ftdf_diag_3: P1_7, ftdf_diag_4: P0_6, ftdf_diag_5: P0_7, ftdf_diag_6: P1_3, ftdf_diag_7: P2_3) 30: PCM_DI 31: PCM_DO 32: PCM_FSC 33: PCM_CLK 34: PDM_DI 35: PDM_DO 36: PDM_CLK 37: USB_SOF 38: ADC (only for P0[7:6], P1[5:2,0] and P2[4]) 38: USB (only for P2[2] and P1[1]) 38: XTAL32 (only for P2[1:0]) 39: QD_CHA_X 40: QD_CHB_X 41: QD_CHA_Y 42: QD_CHB_Y 43: QD_CHA_Z 44: QD_CHB_Z 45: IR_OUT 46: BREATH 47: KB_ROW 48: COEX_EXT_ACT0 49: COEX_EXT_ACT1 50: COEX_SMART_ACT 51: COEX_SMART_PRI 52: CLOCK 53: ONESHOT 54: PWM5 55: PORT0_DCF 56: PORT1_DCF 57: PORT2_DCF 58: PORT3_DCF 59: PORT4_DCF 60: RF_ANT_TRIM[0] 61: RF_ANT_TRIM[1] 62: RF_ANT_TRIM[2]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P1_DATA_REG

P1 Data input / output Register
address_offset : 0x2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P1_DATA_REG P1_DATA_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P1_DATA

P1_DATA : Set P1 output register when written Returns the value of P1 port when read
bits : 0 - 7 (8 bit)
access : read-write


P01_MODE_REG

P01 Mode Register
address_offset : 0x20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P01_MODE_REG P01_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P02_MODE_REG

P02 Mode Register
address_offset : 0x22 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P02_MODE_REG P02_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P03_MODE_REG

P03 Mode Register
address_offset : 0x24 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P03_MODE_REG P03_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P04_MODE_REG

P04 Mode Register
address_offset : 0x26 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P04_MODE_REG P04_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P05_MODE_REG

P05 Mode Register
address_offset : 0x28 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P05_MODE_REG P05_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P06_MODE_REG

P06 Mode Register
address_offset : 0x2A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P06_MODE_REG P06_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P07_MODE_REG

P07 Mode Register
address_offset : 0x2C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P07_MODE_REG P07_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P10_MODE_REG

P10 Mode Register
address_offset : 0x2E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P10_MODE_REG P10_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P11_MODE_REG

P11 Mode Register
address_offset : 0x30 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P11_MODE_REG P11_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P12_MODE_REG

P12 Mode Register
address_offset : 0x32 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P12_MODE_REG P12_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P13_MODE_REG

P13 Mode Register
address_offset : 0x34 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P13_MODE_REG P13_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P14_MODE_REG

P14 Mode Register
address_offset : 0x36 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P14_MODE_REG P14_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P15_MODE_REG

P15 Mode Register
address_offset : 0x38 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P15_MODE_REG P15_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P16_MODE_REG

P24 Mode Register
address_offset : 0x3A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P16_MODE_REG P16_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P17_MODE_REG

P25 Mode Register
address_offset : 0x3C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P17_MODE_REG P17_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P20_MODE_REG

P20 Mode Register
address_offset : 0x3E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P20_MODE_REG P20_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P2_DATA_REG

P2 Data input / output Register
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P2_DATA_REG P2_DATA_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P2_DATA

P2_DATA : Set P2 output register when written Returns the value of P2 port when read
bits : 0 - 4 (5 bit)
access : read-write


P21_MODE_REG

P21 Mode Register
address_offset : 0x40 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P21_MODE_REG P21_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P22_MODE_REG

P22 Mode Register
address_offset : 0x42 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P22_MODE_REG P22_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P23_MODE_REG

P23 Mode Register
address_offset : 0x44 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P23_MODE_REG P23_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P24_MODE_REG

P24 Mode Register
address_offset : 0x46 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P24_MODE_REG P24_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P30_MODE_REG

P30 Mode Register
address_offset : 0x4E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P30_MODE_REG P30_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P31_MODE_REG

P31 Mode Register
address_offset : 0x50 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P31_MODE_REG P31_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P32_MODE_REG

P32 Mode Register
address_offset : 0x52 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P32_MODE_REG P32_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P33_MODE_REG

P33 Mode Register
address_offset : 0x54 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P33_MODE_REG P33_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P34_MODE_REG

P34 Mode Register
address_offset : 0x56 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P34_MODE_REG P34_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P35_MODE_REG

P35 Mode Register
address_offset : 0x58 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P35_MODE_REG P35_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P36_MODE_REG

P36 Mode Register
address_offset : 0x5A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P36_MODE_REG P36_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P37_MODE_REG

P37 Mode Register
address_offset : 0x5C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P37_MODE_REG P37_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P40_MODE_REG

P40 Mode Register
address_offset : 0x5E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P40_MODE_REG P40_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P3_DATA_REG

P3 Data input / output Register
address_offset : 0x6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P3_DATA_REG P3_DATA_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P3_DATA

P3_DATA : Set P3 output register when written Returns the value of P3 port when read
bits : 0 - 7 (8 bit)
access : read-write


P41_MODE_REG

P41 Mode Register
address_offset : 0x60 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P41_MODE_REG P41_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P42_MODE_REG

P42 Mode Register
address_offset : 0x62 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P42_MODE_REG P42_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P43_MODE_REG

P43 Mode Register
address_offset : 0x64 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P43_MODE_REG P43_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P44_MODE_REG

P44 Mode Register
address_offset : 0x66 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P44_MODE_REG P44_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P45_MODE_REG

P45 Mode Register
address_offset : 0x68 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P45_MODE_REG P45_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P46_MODE_REG

P46 Mode Register
address_offset : 0x6A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P46_MODE_REG P46_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P47_MODE_REG

P47 Mode Register
address_offset : 0x6C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P47_MODE_REG P47_MODE_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PID PUPD PPOD

PID : See P00_MODE_REG[PID]
bits : 0 - 5 (6 bit)
access : read-write

PUPD : 00 = Input, no resistors selected 01 = Input, pull-up selected 10 = Input, pull-down selected 11 = Output, no resistors selected In ADC mode, these bits are don't care
bits : 8 - 17 (10 bit)
access : read-write

PPOD : 0: Push pull 1: Open drain
bits : 10 - 20 (11 bit)
access : read-write


P4_DATA_REG

P4 Data input / output Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P4_DATA_REG P4_DATA_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P4_DATA

P4_DATA : Set P4 output register when written Returns the value of P4 port when read
bits : 0 - 7 (8 bit)
access : read-write


P0_SET_DATA_REG

P0 Set port pins Register
address_offset : 0xA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P0_SET_DATA_REG P0_SET_DATA_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0_SET

P0_SET : Writing a 1 to P0[y] sets P0[y] to 1. Writing 0 is discarded Reading returns 0
bits : 0 - 7 (8 bit)
access : read-write


P1_SET_DATA_REG

P1 Set port pins Register
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P1_SET_DATA_REG P1_SET_DATA_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P1_SET

P1_SET : Writing a 1 to P1[y] sets P1[y] to 1. Writing 0 is discarded Reading returns 0
bits : 0 - 7 (8 bit)
access : read-write


P0_PADPWR_CTRL_REG

P0 Output Power Control Register
address_offset : 0xC0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P0_PADPWR_CTRL_REG P0_PADPWR_CTRL_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0_OUT_CTRL

P0_OUT_CTRL : 1 = P0_x port output is powered by VDD1V8P rail 0 = P0_x port output is powered by V33 rail bit 6 controls the power supply of P0[6], bit 7 controls the power supply of P0[7]
bits : 6 - 13 (8 bit)
access : read-write


P1_PADPWR_CTRL_REG

P1 Output Power Control Register
address_offset : 0xC2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P1_PADPWR_CTRL_REG P1_PADPWR_CTRL_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P1_OUT_CTRL

P1_OUT_CTRL : 1 = P1_x port output is powered by VDD1V8P rail 0 = P1_x port output is powered by V33 rail bit x controls the power supply of P1[x]
bits : 0 - 7 (8 bit)
access : read-write


P2_PADPWR_CTRL_REG

P2 Output Power Control Register
address_offset : 0xC4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P2_PADPWR_CTRL_REG P2_PADPWR_CTRL_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P2_OUT_CTRL

P2_OUT_CTRL : 1 = P2_x port output is powered by VDD1V8P rail 0 = P2_x port output is powered by V33 rail bit x controls the power supply of P2[x]
bits : 0 - 4 (5 bit)
access : read-write


P3_PADPWR_CTRL_REG

P3 Output Power Control Register
address_offset : 0xC6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P3_PADPWR_CTRL_REG P3_PADPWR_CTRL_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P3_OUT_CTRL

P3_OUT_CTRL : 1 = P3_x port output is powered by VDD1V8P rail 0 = P3_x port output is powered by V33 rail bit x controls the power supply of P3[x]
bits : 0 - 7 (8 bit)
access : read-write


P4_PADPWR_CTRL_REG

P4 Output Power Control Register
address_offset : 0xC8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P4_PADPWR_CTRL_REG P4_PADPWR_CTRL_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P4_OUT_CTRL

P4_OUT_CTRL : 1 = P4_x port output is powered by VDD1V8P rail 0 = P4_x port output is powered by V33 rail bit x controls the power supply of P4[x]
bits : 0 - 7 (8 bit)
access : read-write


CLK_SEL

Select which clock to map on port in PPA
address_offset : 0xD0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLK_SEL CLK_SEL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FUNC_CLOCK_SEL

FUNC_CLOCK_SEL : Select which clock to map when PID = FUNC_CLOCK. 0x0: XTAL32K 0x1: RC32K 0x2: RCX 0x3: XTAL16M 0x4: RC16M 0x5: DIVN 0x6: Reserved 0x7: Reserved
bits : 0 - 2 (3 bit)
access : read-write


P2_SET_DATA_REG

P2 Set port pins Register
address_offset : 0xE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P2_SET_DATA_REG P2_SET_DATA_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P2_SET

P2_SET : Writing a 1 to P2[y] sets P2[y] to 1. Writing 0 is discarded Reading returns 0
bits : 0 - 4 (5 bit)
access : read-write



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.