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Peripheral_Registers

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1A byte (0x0)
mem_usage : registers
protection :

Registers

CAPTIM_CTRL_REG

CAPTIM_CAPTURE_GPIO1_REG

CAPTIM_CAPTURE_GPIO2_REG

CAPTIM_PRESCALER_VAL_REG

CAPTIM_PWM_FREQ_REG

CAPTIM_PWM_DC_REG

CAPTIM_TIMER_VAL_REG

CAPTIM_STATUS_REG

CAPTIM_GPIO1_CONF_REG

CAPTIM_GPIO2_CONF_REG

CAPTIM_RELOAD_REG

CAPTIM_SHOTWIDTH_REG

CAPTIM_PRESCALER_REG


CAPTIM_CTRL_REG

Capture Timer control register
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPTIM_CTRL_REG CAPTIM_CTRL_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAPTIM_EN CAPTIM_ONESHOT_MODE_EN CAPTIM_COUNT_DOWN_EN CAPTIM_IN1_EVENT_FALL_EN CAPTIM_IN2_EVENT_FALL_EN CAPTIM_IRQ_EN CAPTIM_FREE_RUN_MODE_EN CAPTIM_SYS_CLK_EN

CAPTIM_EN : '1' Capture Timer enabled, else disabled
bits : 0 - 0 (1 bit)
access : read-write

CAPTIM_ONESHOT_MODE_EN : '1' Capture Timer in OneShot mode, '0' Capture/Timer mode
bits : 1 - 2 (2 bit)
access : read-write

CAPTIM_COUNT_DOWN_EN : '1' when timer counts down, '0' count up
bits : 2 - 4 (3 bit)
access : read-write

CAPTIM_IN1_EVENT_FALL_EN : '1' When Input2 event type is falling edge, '0' rising edge
bits : 3 - 6 (4 bit)
access : read-write

CAPTIM_IN2_EVENT_FALL_EN : '1' When Input1 event type is falling edge, '0' rising edge
bits : 4 - 8 (5 bit)
access : read-write

CAPTIM_IRQ_EN : '1' When Capture timer IRQ unmask, '0' masked
bits : 5 - 10 (6 bit)
access : read-write

CAPTIM_FREE_RUN_MODE_EN : Only when timer counts up, if it is '1' timer does not zero when reaches to reload value. it is zero only when it has the max value.
bits : 6 - 12 (7 bit)
access : read-write

CAPTIM_SYS_CLK_EN : '1' When Capture Timer use the system clock else use the clock 32KHz
bits : 7 - 14 (8 bit)
access : read-write


CAPTIM_CAPTURE_GPIO1_REG

Capture Timer value for event on GPIO1
address_offset : 0x10 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPTIM_CAPTURE_GPIO1_REG CAPTIM_CAPTURE_GPIO1_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAPTIM_CAPTURE_GPIO1

CAPTIM_CAPTURE_GPIO1 : Gives the Capture time for event on GPIO1
bits : 0 - 15 (16 bit)
access : read-only


CAPTIM_CAPTURE_GPIO2_REG

Capture Timer value for event on GPIO2
address_offset : 0x12 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPTIM_CAPTURE_GPIO2_REG CAPTIM_CAPTURE_GPIO2_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAPTIM_CAPTURE_GPIO2

CAPTIM_CAPTURE_GPIO2 : Gives the Capture time for event on GPIO2
bits : 0 - 15 (16 bit)
access : read-only


CAPTIM_PRESCALER_VAL_REG

Capture Timer interrupt status register
address_offset : 0x14 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPTIM_PRESCALER_VAL_REG CAPTIM_PRESCALER_VAL_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAPTIM_PRESCALER_VAL

CAPTIM_PRESCALER_VAL : Gives the current prescaler value
bits : 0 - 15 (16 bit)
access : read-only


CAPTIM_PWM_FREQ_REG

Capture Timer pwm frequency register. PWM5 period is defined by the reference clock frequency multiplied by this value.
address_offset : 0x16 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPTIM_PWM_FREQ_REG CAPTIM_PWM_FREQ_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAPTIM_PWM_FREQ

CAPTIM_PWM_FREQ : Define the PWM frequency. = prescaler frequency / (value+1)
bits : 0 - 15 (16 bit)
access : read-write


CAPTIM_PWM_DC_REG

Capture Timer pwm dc register
address_offset : 0x18 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPTIM_PWM_DC_REG CAPTIM_PWM_DC_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAPTIM_PWM_DC

CAPTIM_PWM_DC : Define the PWM duty cyucle = pwm_dc / ( pwm_freq+1)
bits : 0 - 15 (16 bit)
access : read-write


CAPTIM_TIMER_VAL_REG

Capture Timer counter value
address_offset : 0x2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPTIM_TIMER_VAL_REG CAPTIM_TIMER_VAL_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAPTIM_TIMER_VALUE

CAPTIM_TIMER_VALUE : Gives the current timer value
bits : 0 - 15 (16 bit)
access : read-only


CAPTIM_STATUS_REG

Capture Timer status register
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPTIM_STATUS_REG CAPTIM_STATUS_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAPTIM_IN1_STATE CAPTIM_IN2_STATE CAPTIM_ONESHOT_PHASE

CAPTIM_IN1_STATE : Gives the logic level of the IN2
bits : 0 - 0 (1 bit)
access : read-only

CAPTIM_IN2_STATE : Gives the logic level of the IN1
bits : 1 - 2 (2 bit)
access : read-only

CAPTIM_ONESHOT_PHASE : 0 : Wait for event, 1 : Delay phase, 2 : Start Shot, 3 : Shot phase
bits : 2 - 5 (4 bit)
access : read-only


CAPTIM_GPIO1_CONF_REG

Capture Timer gpio1 selection
address_offset : 0x6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPTIM_GPIO1_CONF_REG CAPTIM_GPIO1_CONF_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAPTIM_GPIO1_CONF

CAPTIM_GPIO1_CONF : Select one of the 37 GPIOs as IN1, Valid value 0-37. 1 for P00 .. 37 for P47. When 0 Disable input
bits : 0 - 5 (6 bit)
access : read-write


CAPTIM_GPIO2_CONF_REG

Capture Timer gpio2 selection
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPTIM_GPIO2_CONF_REG CAPTIM_GPIO2_CONF_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAPTIM_GPIO2_CONF

CAPTIM_GPIO2_CONF : Select one of the 37 GPIOs as IN2, Valid value 0-37. 1 for P00 .. 37 for P47. When 0 Disable input
bits : 0 - 5 (6 bit)
access : read-write


CAPTIM_RELOAD_REG

Capture Timer reload value and Delay in shot mode
address_offset : 0xA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPTIM_RELOAD_REG CAPTIM_RELOAD_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAPTIM_RELOAD

CAPTIM_RELOAD : Reload or max value in timer mode, Delay phase duration in oneshot mode. Actual delay is the register value plus synchronization time (3 clock cycles)
bits : 0 - 15 (16 bit)
access : read-write


CAPTIM_SHOTWIDTH_REG

Capture Timer Shot duration in shot mode
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPTIM_SHOTWIDTH_REG CAPTIM_SHOTWIDTH_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAPTIM_SHOTWIDTH

CAPTIM_SHOTWIDTH : Shot phase duration in oneshot mode
bits : 0 - 15 (16 bit)
access : read-write


CAPTIM_PRESCALER_REG

Capture Timer prescaler value
address_offset : 0xE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPTIM_PRESCALER_REG CAPTIM_PRESCALER_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAPTIM_PRESCALER

CAPTIM_PRESCALER : Define the timer count frequncy. Freq = Freq_clock / (value+1)
bits : 0 - 15 (16 bit)
access : read-write



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