\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :
No Description
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IPVERSION : IP VERSION
bits : 0 - 31 (32 bit)
access : read-only
No Description
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
START : Start SYSRTC
bits : 0 - 0 (1 bit)
access : write-only
STOP : Stop SYSRTC
bits : 1 - 1 (1 bit)
access : write-only
No Description
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RUNNING : SYSRTC running status
bits : 0 - 0 (1 bit)
access : read-only
LOCKSTATUS : Lock Status
bits : 1 - 1 (1 bit)
access : read-only
Enumeration:
0 : UNLOCKED
SYSRTC registers are unlocked
1 : LOCKED
SYSRTC registers are locked
End of enumeration elements list.
No Description
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNT : Counter Value
bits : 0 - 31 (32 bit)
access : read-write
No Description
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
START : Sync busy for START bitfield
bits : 0 - 0 (1 bit)
access : read-only
STOP : Sync busy for STOP bitfield
bits : 1 - 1 (1 bit)
access : read-only
CNT : Sync busy for CNT bitfield
bits : 2 - 2 (1 bit)
access : read-only
No Description
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
LOCKKEY : Configuration Lock Key
bits : 0 - 15 (16 bit)
access : write-only
Enumeration:
18294 : UNLOCK
Write to unlock SYSRTC lockable registers
End of enumeration elements list.
No Description
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : SYSRTC Enable
bits : 0 - 0 (1 bit)
access : read-write
DISABLING : Disablement busy status
bits : 1 - 1 (1 bit)
access : read-only
No Description
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OVF : Overflow Interrupt Flag
bits : 0 - 0 (1 bit)
access : read-write
CMP0 : Compare 0 Interrupt Flag
bits : 1 - 1 (1 bit)
access : read-write
CMP1 : Compare 1 Interrupt Flag
bits : 2 - 2 (1 bit)
access : read-write
CAP0 : Capture 0 Interrupt Flag
bits : 3 - 3 (1 bit)
access : read-write
No Description
address_offset : 0x44 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OVF : Overflow Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write
CMP0 : Compare 0 Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write
CMP1 : Compare 1 Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write
CAP0 : Capture 0 Interrupt Enable
bits : 3 - 3 (1 bit)
access : read-write
No Description
address_offset : 0x48 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMP0EN : Compare 0 Enable
bits : 0 - 0 (1 bit)
access : read-write
CMP1EN : Compare 1 Enable
bits : 1 - 1 (1 bit)
access : read-write
CAP0EN : Capture 0 Enable
bits : 2 - 2 (1 bit)
access : read-write
CMP0CMOA : Compare 0 Compare Match Output Action
bits : 3 - 5 (3 bit)
access : read-write
Enumeration:
0 : CLEAR
Cleared on the next cycle
1 : SET
Set on the next cycle
2 : PULSE
Set on the next cycle, cleared on the cycle after
3 : TOGGLE
Inverted on the next cycle
4 : CMPIF
Export this channel's CMP IF
End of enumeration elements list.
CMP1CMOA : Compare 1 Compare Match Output Action
bits : 6 - 8 (3 bit)
access : read-write
Enumeration:
0 : CLEAR
Cleared on the next cycle
1 : SET
Set on the next cycle
2 : PULSE
Set on the next cycle, cleared on the cycle after
3 : TOGGLE
Inverted on the next cycle
4 : CMPIF
Export this channel's CMP IF
End of enumeration elements list.
CAP0EDGE : Capture 0 Edge Select
bits : 9 - 10 (2 bit)
access : read-write
Enumeration:
0 : RISING
Rising edges detected
1 : FALLING
Falling edges detected
2 : BOTH
Both edges detected
End of enumeration elements list.
No Description
address_offset : 0x4C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMP0VALUE : Compare 0 Value
bits : 0 - 31 (32 bit)
access : read-write
No Description
address_offset : 0x50 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMP1VALUE : Compare 1 Value
bits : 0 - 31 (32 bit)
access : read-write
No Description
address_offset : 0x54 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CAP0VALUE : Capture 0 Value
bits : 0 - 31 (32 bit)
access : read-only
No Description
address_offset : 0x58 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CTRL : Sync busy for CTRL register
bits : 0 - 0 (1 bit)
access : read-only
CMP0VALUE : Sync busy for CMP0VALUE register
bits : 1 - 1 (1 bit)
access : read-only
CMP1VALUE : Sync busy for CMP1VALUE register
bits : 2 - 2 (1 bit)
access : read-only
No Description
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWRST : Software reset command
bits : 0 - 0 (1 bit)
access : write-only
RESETTING : Software reset busy status
bits : 1 - 1 (1 bit)
access : read-only
No Description
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DEBUGRUN : Debug Mode Run Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
SYSRTC is frozen in debug mode
1 : ENABLE
SYSRTC is running in debug mode
End of enumeration elements list.
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