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Peripheral_Registers

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection :

Registers

DUTY_CYCLE_LED1_REG

DUTY_CYCLE_LED2_REG

FREQUENCY_REG

CTRL_REG


DUTY_CYCLE_LED1_REG

Defines duty cycle for PWM1
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DUTY_CYCLE_LED1_REG DUTY_CYCLE_LED1_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LED1_PWM_END_CYCLE LED1_PWM_START_CYCLE

LED1_PWM_END_CYCLE : Defines the cycle in which the PWM becomes low. If end_cycle is larger then freq and start_cycle is not larger then freq, output is always 1
bits : 0 - 7 (8 bit)
access : read-write

LED1_PWM_START_CYCLE : Defines the cycle in which the PWM becomes high. if start_cycle is larger than freq or end_cycle is equal to start_cycle, pwm out is always 0
bits : 8 - 23 (16 bit)
access : read-write


DUTY_CYCLE_LED2_REG

Defines duty cycle for PWM2
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DUTY_CYCLE_LED2_REG DUTY_CYCLE_LED2_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LED2_PWM_END_CYCLE LED2_PWM_START_CYCLE

LED2_PWM_END_CYCLE : Defines the cycle in which the PWM becomes low. If end_cycle is larger then freq and start_cycle is not larger then freq, output is always 1
bits : 0 - 7 (8 bit)
access : read-write

LED2_PWM_START_CYCLE : Defines the cycle in which the PWM becomes high. if start_cycle is larger than freq or end_cycle is equal to start_cycle, pwm out is always 0
bits : 8 - 23 (16 bit)
access : read-write


FREQUENCY_REG

Defines the PWM frequecny
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FREQUENCY_REG FREQUENCY_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LED_PWM_FREQUENCY

LED_PWM_FREQUENCY : Defines the frequency of PWM 1 2, period = PWM_CLK * ( FREQ+1)
bits : 0 - 7 (8 bit)
access : read-write


CTRL_REG

PWM Control register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL_REG CTRL_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWM_ENABLE SW_PAUSE_EN LED_TRIM LED1_EN LED2_EN LED1_LOAD_SEL LED2_LOAD_SEL

PWM_ENABLE : 0 = PWM 1,2 are disabled 1 = PWM 1,2 are enabled
bits : 0 - 0 (1 bit)
access : read-write

SW_PAUSE_EN : 0 = PWM are not blocked by SW 1 = PWM 1 and 2 are paused
bits : 1 - 2 (2 bit)
access : read-write

LED_TRIM : LED current trimming bits
bits : 2 - 7 (6 bit)
access : read-write

LED1_EN : 0 = LED1 disabled 1 = LED1 enabled
bits : 6 - 12 (7 bit)
access : read-write

LED2_EN : 0 = LED2 disabled 1 = LED2 enabled
bits : 7 - 14 (8 bit)
access : read-write

LED1_LOAD_SEL : Defines LED1 output current: 2.5mA + (LED1_LOAD_SEL*2.5mA). Max = 20mA.
bits : 8 - 18 (11 bit)
access : read-write

LED2_LOAD_SEL : Defines LED2 output current: 2.5mA + (LED2_LOAD_SEL*2.5mA). Max = 20mA.
bits : 11 - 24 (14 bit)
access : read-write



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