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address_offset : 0x0 Bytes (0x0)
size : 0x4C byte (0x0)
mem_usage : registers
protection :
Timer control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM_EN : Timer enable 1 = On 0 = Off
bits : 0 - 0 (1 bit)
access : read-write
TIM_ONESHOT_MODE_EN : Timer mode 1 = One shot enabled 0 = Counter enabled
bits : 1 - 2 (2 bit)
access : read-write
TIM_COUNT_DOWN_EN : Timer count direction 1 = down 0 = up
bits : 2 - 4 (3 bit)
access : read-write
TIM_IN1_EVENT_FALL_EN : Event input 1 edge type 1 = falling edge 0 = rising edge
bits : 3 - 6 (4 bit)
access : read-write
TIM_IN2_EVENT_FALL_EN : Event input 2 edge type 1 = falling edge 0 = rising edge
bits : 4 - 8 (5 bit)
access : read-write
TIM_IRQ_EN : Interrupt mask 1 = timer IRQ is unmasked 0 = timer IRQ is masked
bits : 5 - 10 (6 bit)
access : read-write
TIM_FREE_RUN_MODE_EN : Valid when timer counts up, if it is '1' timer does not zero when reaches to reload value. it becomes zero only when it reaches the max value.
bits : 6 - 12 (7 bit)
access : read-write
TIM_SYS_CLK_EN : Select clock 1 = Timer uses the DIVN clock 0 = Timer uses the lp clock
bits : 7 - 14 (8 bit)
access : read-write
TIM_CLK_EN : Timer clock enable 1 = clock enabled 0 = clock disabled
bits : 8 - 16 (9 bit)
access : read-write
TIM_IN3_EVENT_FALL_EN : Event input 3 edge type 1 = falling edge 0 = rising edge
bits : 9 - 18 (10 bit)
access : read-write
TIM_IN4_EVENT_FALL_EN : Event input 4 edge type 1 = falling edge 0 = rising edge
bits : 10 - 20 (11 bit)
access : read-write
TIM_CAP_GPIO1_IRQ_EN : 0 = Event on GPIO1 does not create a CAPTIM interrrupt 1 = Event on GPIO1 creates a CAPTIM interrrupt
bits : 11 - 22 (12 bit)
access : read-write
TIM_CAP_GPIO2_IRQ_EN : 0 = Event on GPIO2 does not create a CAPTIM interrrupt 1 = Event on GPIO2 creates a CAPTIM interrrupt
bits : 12 - 24 (13 bit)
access : read-write
TIM_CAP_GPIO3_IRQ_EN : 0 = Event on GPIO3 does not create a CAPTIM interrrupt 1 = Event on GPIO3 creates a CAPTIM interrrupt
bits : 13 - 26 (14 bit)
access : read-write
TIM_CAP_GPIO4_IRQ_EN : 0 = Event on GPIO4 does not create a CAPTIM interrrupt 1 = Event on GPIO4 creates a CAPTIM interrrupt
bits : 14 - 28 (15 bit)
access : read-write
Timer gpio2 selection
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM_GPIO2_CONF : Select one of the 32 GPIOs as IN2, Valid value 0-32. 1 for the first gpio, 32 for the last gpio. 0 Disable input
bits : 0 - 5 (6 bit)
access : read-write
Timer reload value and Delay in shot mode
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM_RELOAD : Reload or max value in timer mode, Delay phase duration in oneshot mode. Actual delay is the register value plus synchronization time (3 clock cycles)
bits : 0 - 23 (24 bit)
access : read-write
Timer Shot duration in shot mode
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM_SHOTWIDTH : Shot phase duration in oneshot mode
bits : 0 - 23 (24 bit)
access : read-write
Timer prescaler value
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM_PRESCALER : Defines the timer count frequency. CLOCK frequency / (TIM_PRESCALER+1)
bits : 0 - 4 (5 bit)
access : read-write
Timer value for event on GPIO1
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM_CAPTURE_GPIO1 : Gives the Capture time for event on GPIO1
bits : 0 - 23 (24 bit)
access : read-only
Timer value for event on GPIO2
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM_CAPTURE_GPIO2 : Gives the Capture time for event on GPIO2
bits : 0 - 23 (24 bit)
access : read-only
Timer prescaler counter valuew
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM_PRESCALER_VAL : Gives the current prescaler counter value
bits : 0 - 4 (5 bit)
access : read-only
Timer pwm frequency register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM_PWM_FREQ : Defines the PWM frequency. Timer clock frequency / (TIM_PWM_FREQ+1) Timer clock is clock after prescaler
bits : 0 - 15 (16 bit)
access : read-write
Timer pwm dc register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM_PWM_DC : Defines the PWM duty cycle. TIM_PWM_DC / ( TIM_PWM_FREQ+1)
bits : 0 - 15 (16 bit)
access : read-write
Timer gpio3 selection
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM_GPIO3_CONF : Select one of the 32 GPIOs as IN3, Valid value 0-32. 1 for the first gpio, 32 for the last gpio. 0 Disable input
bits : 0 - 5 (6 bit)
access : read-write
Timer gpio4 selection
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM_GPIO4_CONF : Select one of the 32 GPIOs as IN4, Valid value 0-32. 1 for the first gpio, 32 for the last gpio. 0 Disable input
bits : 0 - 5 (6 bit)
access : read-write
Timer value for event on GPIO1
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM_CAPTURE_GPIO3 : Gives the Capture time for event on GPIO3
bits : 0 - 23 (24 bit)
access : read-only
Timer counter value
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM_TIMER_VALUE : Gives the current timer value
bits : 0 - 23 (24 bit)
access : read-only
Timer value for event on GPIO1
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM_CAPTURE_GPIO4 : Gives the Capture time for event on GPIO4
bits : 0 - 23 (24 bit)
access : read-only
Timer clear gpio event register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM_CLEAR_GPIO1_EVENT : 1 = Clear GPIO1 event. Return always 0
bits : 0 - 0 (1 bit)
access : write-only
TIM_CLEAR_GPIO2_EVENT : 1 = Clear GPIO2 event. Return always 0
bits : 1 - 2 (2 bit)
access : write-only
TIM_CLEAR_GPIO3_EVENT : 1 = Clear GPIO3 event. Return always 0
bits : 2 - 4 (3 bit)
access : write-only
TIM_CLEAR_GPIO4_EVENT : 1 = Clear GPIO4 event. Return always 0
bits : 3 - 6 (4 bit)
access : write-only
Timer clear interrupt
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM_CLEAR_IRQ : Write any value clear interrupt
bits : 0 - 0 (1 bit)
access : write-only
Timer status register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM_IN1_STATE : Gives the logic level of the IN2
bits : 0 - 0 (1 bit)
access : read-only
TIM_IN2_STATE : Gives the logic level of the IN1
bits : 1 - 2 (2 bit)
access : read-only
TIM_ONESHOT_PHASE : OneShot phase 0 = Wait for event 1 = Delay phase 2 = Start Shot 3 = Shot phase
bits : 2 - 5 (4 bit)
access : read-only
TIM_GPIO1_EVENT_PENDING : When 1, GPIO1 event is pending.
bits : 4 - 8 (5 bit)
access : read-only
TIM_GPIO2_EVENT_PENDING : When 1, GPIO2 event is pending.
bits : 5 - 10 (6 bit)
access : read-only
TIM_GPIO3_EVENT_PENDING : When 1, GPIO3 event is pending.
bits : 6 - 12 (7 bit)
access : read-only
TIM_GPIO4_EVENT_PENDING : When 1, GPIO4 event is pending.
bits : 7 - 14 (8 bit)
access : read-only
Timer gpio1 selection
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIM_GPIO1_CONF : Select one of the 32 GPIOs as IN1, Valid value 0-32. 1 for the first gpio, 32 for the last gpio. 0 Disable input
bits : 0 - 5 (6 bit)
access : read-write
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