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Peripheral_Registers

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x38 byte (0x0)
mem_usage : registers
protection :

Registers

CTRL_REG

GPIO2_CONF_REG

RELOAD_REG

PRESCALER_REG

CAPTURE_GPIO1_REG

CAPTURE_GPIO2_REG

PRESCALER_VAL_REG

PWM_FREQ_REG

PWM_DC_REG

CLEAR_IRQ_REG

TIMER_VAL_REG

STATUS_REG

GPIO1_CONF_REG


CTRL_REG

Timer control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL_REG CTRL_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIM_EN TIM_COUNT_DOWN_EN TIM_IN1_EVENT_FALL_EN TIM_IN2_EVENT_FALL_EN TIM_IRQ_EN TIM_FREE_RUN_MODE_EN TIM_SYS_CLK_EN TIM_CLK_EN

TIM_EN : Timer enable 1 = On 0 = Off
bits : 0 - 0 (1 bit)
access : read-write

TIM_COUNT_DOWN_EN : Timer count direction 1 = down 0 = up
bits : 2 - 4 (3 bit)
access : read-write

TIM_IN1_EVENT_FALL_EN : Event input 1 edge type 1 = falling edge 0 = rising edge
bits : 3 - 6 (4 bit)
access : read-write

TIM_IN2_EVENT_FALL_EN : Event input 2 edge type 1 = falling edge 0 = rising edge
bits : 4 - 8 (5 bit)
access : read-write

TIM_IRQ_EN : Interrupt mask 1 = timer IRQ is unmasked 0 = timer IRQ is masked
bits : 5 - 10 (6 bit)
access : read-write

TIM_FREE_RUN_MODE_EN : Valid when timer counts up, if it is '1' timer does not zero when reaches to reload value. it becomes zero only when it reaches the max value.
bits : 6 - 12 (7 bit)
access : read-write

TIM_SYS_CLK_EN : Select clock 1 = Timer uses the DIVN clock 0 = Timer uses the lp clock
bits : 7 - 14 (8 bit)
access : read-write

TIM_CLK_EN : Timer clock enable 1 = clock enabled 0 = clock disabled
bits : 8 - 16 (9 bit)
access : read-write


GPIO2_CONF_REG

Timer gpio2 selection
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO2_CONF_REG GPIO2_CONF_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIM_GPIO2_CONF

TIM_GPIO2_CONF : Select one of the 32 GPIOs as IN2, Valid value 0-32. 1 for the first gpio, 32 for the last gpio. 0 Disable input
bits : 0 - 5 (6 bit)
access : read-write


RELOAD_REG

Timer reload value and Delay in shot mode
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RELOAD_REG RELOAD_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIM_RELOAD

TIM_RELOAD : Reload or max value in timer mode. Actual delay is the register value plus synchronization time (3 clock cycles)
bits : 0 - 23 (24 bit)
access : read-write


PRESCALER_REG

Timer prescaler value
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRESCALER_REG PRESCALER_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIM_PRESCALER

TIM_PRESCALER : Defines the timer count frequency. CLOCK frequency / (TIM_PRESCALER+1)
bits : 0 - 4 (5 bit)
access : read-write


CAPTURE_GPIO1_REG

Timer value for event on GPIO1
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPTURE_GPIO1_REG CAPTURE_GPIO1_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIM_CAPTURE_GPIO1

TIM_CAPTURE_GPIO1 : Gives the Capture time for event on GPIO1
bits : 0 - 23 (24 bit)
access : read-only


CAPTURE_GPIO2_REG

Timer value for event on GPIO2
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPTURE_GPIO2_REG CAPTURE_GPIO2_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIM_CAPTURE_GPIO2

TIM_CAPTURE_GPIO2 : Gives the Capture time for event on GPIO2
bits : 0 - 23 (24 bit)
access : read-only


PRESCALER_VAL_REG

Timer prescaler counter valuew
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRESCALER_VAL_REG PRESCALER_VAL_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIM_PRESCALER_VAL

TIM_PRESCALER_VAL : Gives the current prescaler counter value
bits : 0 - 4 (5 bit)
access : read-only


PWM_FREQ_REG

Timer pwm frequency register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWM_FREQ_REG PWM_FREQ_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIM_PWM_FREQ

TIM_PWM_FREQ : Defines the PWM frequency. Timer clock frequency / (TIM_PWM_FREQ+1) Timer clock is clock after prescaler
bits : 0 - 15 (16 bit)
access : read-write


PWM_DC_REG

Timer pwm dc register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWM_DC_REG PWM_DC_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIM_PWM_DC

TIM_PWM_DC : Defines the PWM duty cycle. TIM_PWM_DC / ( TIM_PWM_FREQ+1)
bits : 0 - 15 (16 bit)
access : read-write


CLEAR_IRQ_REG

Timer clear interrupt
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLEAR_IRQ_REG CLEAR_IRQ_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIM_CLEAR_IRQ

TIM_CLEAR_IRQ : Write any value clear interrupt
bits : 0 - 0 (1 bit)
access : write-only


TIMER_VAL_REG

Timer counter value
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER_VAL_REG TIMER_VAL_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIM_TIMER_VALUE

TIM_TIMER_VALUE : Gives the current timer value
bits : 0 - 23 (24 bit)
access : read-only


STATUS_REG

Timer status register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STATUS_REG STATUS_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIM_IN1_STATE TIM_IN2_STATE TIM_ONESHOT_PHASE

TIM_IN1_STATE : Gives the logic level of the IN2
bits : 0 - 0 (1 bit)
access : read-only

TIM_IN2_STATE : Gives the logic level of the IN1
bits : 1 - 2 (2 bit)
access : read-only

TIM_ONESHOT_PHASE : OneShot phase 0 = Wait for event 1 = Delay phase 2 = Start Shot 3 = Shot phase
bits : 2 - 5 (4 bit)
access : read-only


GPIO1_CONF_REG

Timer gpio1 selection
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIO1_CONF_REG GPIO1_CONF_REG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIM_GPIO1_CONF

TIM_GPIO1_CONF : Select one of the 32 GPIOs as IN1, Valid value 0-32. 1 for the first gpio, 32 for the last gpio. 0 Disable input
bits : 0 - 5 (6 bit)
access : read-write



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