\n

DCDC_NS

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :

Registers

IPVERSION

EM01CTRL0

EM23CTRL0

IF

IEN

STATUS

EN

LOCK

LOCKSTATUS

CTRL


IPVERSION

IPVERSION
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IPVERSION IPVERSION read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPVERSION

IPVERSION : IPVERSION
bits : 0 - 31 (32 bit)
access : read-only


EM01CTRL0

EM01 Configurations
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EM01CTRL0 EM01CTRL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPKVAL DRVSPEED

IPKVAL : EM01 Peak Current Setting
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

3 : Load36mA

Ipeak = 90mA, IL = 36mA

4 : Load40mA

Ipeak = 100mA, IL = 40mA

5 : Load44mA

Ipeak = 110mA, IL = 44mA

6 : Load48mA

Ipeak = 120mA, IL = 48mA

7 : Load52mA

Ipeak = 130mA, IL = 52mA

8 : Load56mA

Ipeak = 140mA, IL = 56mA

9 : Load60mA

Ipeak = 150mA, IL = 60mA

End of enumeration elements list.

DRVSPEED : EM01 Drive Speed Setting
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : BEST_EMI

Lowest Efficiency, Lowest EMI.. Small decrease in efficiency from default setting

1 : DEFAULT_SETTING

Default Efficiency, Acceptable EMI level

2 : INTERMEDIATE

Small increase in efficiency from the default setting

3 : BEST_EFFICIENCY

Highest Efficiency, Highest EMI.. Small increase in efficiency from INTERMEDIATE setting

End of enumeration elements list.


EM23CTRL0

EM23 Configurations
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EM23CTRL0 EM23CTRL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPKVAL DRVSPEED

IPKVAL : EM23 Peak Current Setting
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

3 : LOAD5MA

Ipeak = 90mA, IL = 5 mA

9 : LOAD10MA

Ipeak = 150mA, IL = 10 mA

End of enumeration elements list.

DRVSPEED : EM23 Drive Speed Setting
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : BEST_EMI

Lowest Efficiency, Lowest EMI.. Small decrease in efficiency from default setting

1 : DEFAULT_SETTING

Default Efficiency, Acceptable EMI level

2 : INTERMEDIATE

Small increase in efficiency from the default setting

3 : BEST_EFFICIENCY

Highest Efficiency, Highest EMI.. Small increase in efficiency from INTERMEDIATE setting

End of enumeration elements list.


IF

Interrupt Flags
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IF IF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BYPSW WARM RUNNING VREGINLOW VREGINHIGH REGULATION TMAX EM4ERR

BYPSW : Bypass Switch Enabled
bits : 0 - 0 (1 bit)
access : read-write

WARM : DCDC Warmup Time Done
bits : 1 - 1 (1 bit)
access : read-write

RUNNING : DCDC Running
bits : 2 - 2 (1 bit)
access : read-write

VREGINLOW : VREGVDD below threshold
bits : 3 - 3 (1 bit)
access : read-write

VREGINHIGH : VREGVDD above threshold
bits : 4 - 4 (1 bit)
access : read-write

REGULATION : DCDC in regulation
bits : 5 - 5 (1 bit)
access : read-write

TMAX : Ton_max Timeout Reached
bits : 6 - 6 (1 bit)
access : read-write

EM4ERR : EM4 Entry Request Error
bits : 7 - 7 (1 bit)
access : read-write


IEN

Interrupt Enable
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IEN IEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BYPSW WARM RUNNING VREGINLOW VREGINHIGH REGULATION TMAX EM4ERR

BYPSW : Bypass Switch Enabled Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write

WARM : DCDC Warmup Time Done Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write

RUNNING : DCDC Running Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write

VREGINLOW : VREGVDD below threshold Interrupt Enable
bits : 3 - 3 (1 bit)
access : read-write

VREGINHIGH : VREGVDD above threshold Interrupt Enable
bits : 4 - 4 (1 bit)
access : read-write

REGULATION : DCDC in Regulation Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write

TMAX : Ton_max Timeout Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

EM4ERR : EM4 Entry Req Interrupt Enable
bits : 7 - 7 (1 bit)
access : read-write


STATUS

DCDC Status Register
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STATUS STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BYPSW WARM RUNNING VREGIN BYPCMPOUT

BYPSW : Bypass Switch is currently enabled
bits : 0 - 0 (1 bit)
access : read-only

WARM : DCDC Warmup Done
bits : 1 - 1 (1 bit)
access : read-only

RUNNING : DCDC is running
bits : 2 - 2 (1 bit)
access : read-only

VREGIN : VREGVDD comparator status
bits : 3 - 3 (1 bit)
access : read-only

BYPCMPOUT : Bypass Comparator Output
bits : 4 - 4 (1 bit)
access : read-only


EN

Enable
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EN EN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EN

EN : Enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DISABLE

Disable

1 : ENABLE

Enable

End of enumeration elements list.


LOCK

No Description
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

LOCK LOCK write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOCKKEY

LOCKKEY : Configuration Lock Key
bits : 0 - 15 (16 bit)
access : write-only

Enumeration:

43981 : UNLOCKKEY

Value to write to unlock

End of enumeration elements list.


LOCKSTATUS

No Description
address_offset : 0x44 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

LOCKSTATUS LOCKSTATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOCK

LOCK : Lock Status
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

0 : UNLOCKED

Unlocked State

1 : LOCKED

LOCKED STATE

End of enumeration elements list.


CTRL

Control
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MODE DCMONLYEN IPKTMAXCTRL

MODE : DCDC/Bypass Mode Control
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : BYPASS

DCDC is OFF, bypass switch is enabled

1 : DCDCREGULATION

Request DCDC regulation, bypass switch disabled

End of enumeration elements list.

DCMONLYEN : DCDC DCM Only Enable
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : DUALMODE

Support higher load current at lower battery voltage by working in CCM mode

1 : DCMONLYEN

DCM only mode for normal operation, this is the default setting

End of enumeration elements list.

IPKTMAXCTRL : Peak Current Timeout Control
bits : 4 - 6 (3 bit)
access : read-write

Enumeration:

0 : OFF

Ton_max disabled

1 : TMAX_0P35us

0.35us

2 : TMAX_0P63us

0.63us

3 : TMAX_0P91us

0.91us

4 : TMAX_1P19us

1.19us

5 : TMAX_1P47us

1.47us

6 : TMAX_1P75us

1.75us

7 : TMAX_2P03us

2.03us

End of enumeration elements list.



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