\n

SMU_NS

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :

Registers

IPVERSION

IEN

PPUFS

BMPUPATD0

BMPUSATD0

M33CTRL

BMPUFS

BMPUFSADDR

ESAURTYPES0

ESAURTYPES1

ESAUMRB01

ESAUMRB12

ESAUMRB45

ESAUMRB56

STATUS

PPUPATD0

PPUPATD1

PPUSATD0

PPUSATD1

LOCK

IF


IPVERSION

The read only IPVERSION field gives the version for this module. There may be minor software changes required for modules with different values of IPVERSION.
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IPVERSION IPVERSION read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPVERSION

IPVERSION : IP Version
bits : 0 - 31 (32 bit)
access : read-only


IEN

Write to Enable/Disable SMU interrupts.
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IEN IEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PPUPRIV PPUINST PPUSEC BMPUSEC

PPUPRIV : PPU Privilege Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write

PPUINST : PPU Instruction Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write

PPUSEC : PPU Security Interrupt Enable
bits : 16 - 16 (1 bit)
access : read-write

BMPUSEC : BMPU Security Interrupt Enable
bits : 17 - 17 (1 bit)
access : read-write


PPUFS

Read to get fault status of SMU.
address_offset : 0x140 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PPUFS PPUFS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PPUFSPERIPHID

PPUFSPERIPHID : Peripheral ID
bits : 0 - 7 (8 bit)
access : read-only


BMPUPATD0

Set master bits to 1 to mark as a privileged master.
address_offset : 0x150 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BMPUPATD0 BMPUPATD0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RADIOAES CRYPTOACC RADIOSUBSYSTEM RADIOIFADCDEBUG LDMA

RADIOAES : RADIO AES DMA privileged mode
bits : 0 - 0 (1 bit)
access : read-write

CRYPTOACC : CRYPTOACC DMA privileged mode
bits : 1 - 1 (1 bit)
access : read-write

RADIOSUBSYSTEM : RADIO subsystem masters privileged mode
bits : 2 - 2 (1 bit)
access : read-write

RADIOIFADCDEBUG : RADIO IFADC debug privileged mode
bits : 3 - 3 (1 bit)
access : read-write

LDMA : MCU LDMA privileged mode
bits : 4 - 4 (1 bit)
access : read-write


BMPUSATD0

Set master bits to 1 to mark as a secure master.
address_offset : 0x170 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BMPUSATD0 BMPUSATD0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RADIOAES CRYPTOACC RADIOSUBSYSTEM RADIOIFADCDEBUG LDMA

RADIOAES : RADIOAES DMA secure mode
bits : 0 - 0 (1 bit)
access : read-write

CRYPTOACC : CRYPTOACC DMA secure mode
bits : 1 - 1 (1 bit)
access : read-write

RADIOSUBSYSTEM : RADIO subsystem masters secure mode
bits : 2 - 2 (1 bit)
access : read-write

RADIOIFADCDEBUG : RADIO IFADC debug secure mode
bits : 3 - 3 (1 bit)
access : read-write

LDMA : MCU LDMA secure mode
bits : 4 - 4 (1 bit)
access : read-write


M33CTRL

Holds the M33 control settings.
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

M33CTRL M33CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOCKSVTAIRCR LOCKNSVTOR LOCKSMPU LOCKNSMPU LOCKSAU

LOCKSVTAIRCR : LOCKSVTAIRCR control of M33 CPU
bits : 0 - 0 (1 bit)
access : read-write

LOCKNSVTOR : LOCKNSVTOR control of M33 CPU
bits : 1 - 1 (1 bit)
access : read-write

LOCKSMPU : LOCKSMPU control of M33 CPU
bits : 2 - 2 (1 bit)
access : read-write

LOCKNSMPU : LOCKNSMPU control of M33 CPU
bits : 3 - 3 (1 bit)
access : read-write

LOCKSAU : LOCKSAU control of M33 CPU
bits : 4 - 4 (1 bit)
access : read-write


BMPUFS

Read to get status about the master that triggered a fault.
address_offset : 0x250 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BMPUFS BMPUFS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BMPUFSMASTERID

BMPUFSMASTERID : Master ID
bits : 0 - 7 (8 bit)
access : read-only


BMPUFSADDR

Read to get the access address that triggered a fault.
address_offset : 0x254 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BMPUFSADDR BMPUFSADDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BMPUFSADDR

BMPUFSADDR : Fault Address
bits : 0 - 31 (32 bit)
access : read-only


ESAURTYPES0

Write to specify if a region is secure or non-secure.
address_offset : 0x260 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ESAURTYPES0 ESAURTYPES0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ESAUR3NS

ESAUR3NS : Region 3 Non-Secure Type
bits : 12 - 12 (1 bit)
access : read-write


ESAURTYPES1

Write to specify if a region is secure or non-secure.
address_offset : 0x264 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ESAURTYPES1 ESAURTYPES1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ESAUR11NS

ESAUR11NS : Region 11 Non-Secure Type
bits : 12 - 12 (1 bit)
access : read-write


ESAUMRB01

Specify the boundary between regions 0 and 1.
address_offset : 0x270 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ESAUMRB01 ESAUMRB01 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ESAUMRB01

ESAUMRB01 : Moveable Region Boundary 0-1
bits : 12 - 27 (16 bit)
access : read-write


ESAUMRB12

Specify the boundary between regions 1 and 2.
address_offset : 0x274 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ESAUMRB12 ESAUMRB12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ESAUMRB12

ESAUMRB12 : Moveable Region Boundary 1-2
bits : 12 - 27 (16 bit)
access : read-write


ESAUMRB45

Specify the boundary between regions 4 and 5.
address_offset : 0x280 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ESAUMRB45 ESAUMRB45 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ESAUMRB45

ESAUMRB45 : Moveable Region Boundary 4-5
bits : 12 - 27 (16 bit)
access : read-write


ESAUMRB56

Specify the boundary between regions 5 and 6.
address_offset : 0x284 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ESAUMRB56 ESAUMRB56 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ESAUMRB56

ESAUMRB56 : Moveable Region Boundary 5-6
bits : 12 - 27 (16 bit)
access : read-write


STATUS

Read to get SMU status.
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STATUS STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SMULOCK SMUPRGERR

SMULOCK : SMU Lock
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

0 : UNLOCKED

SMULOCK is Unlocked

1 : LOCKED

SMULOCK is Locked

End of enumeration elements list.

SMUPRGERR : SMU Programming Error
bits : 1 - 1 (1 bit)
access : read-only


PPUPATD0

Set peripheral bits to 1 to mark as privileged access only.
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPUPATD0 PPUPATD0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EMU CMU HFXO0 HFRCO0 FSRCO DPLL0 LFXO LFRCO ULFRCO MSC ICACHE0 PRS GPIO LDMA LDMAXBAR TIMER0 TIMER1 TIMER2 TIMER3 TIMER4 USART0 USART1 BURTC I2C1 CHIPTESTCTRL SYSCFGCFGNS SYSCFG BURAM IFADCDEBUG GPCRC DCI

EMU : EMU Privileged Access
bits : 1 - 1 (1 bit)
access : read-write

CMU : CMU Privileged Access
bits : 2 - 2 (1 bit)
access : read-write

HFXO0 : HFXO0 Privileged Access
bits : 3 - 3 (1 bit)
access : read-write

HFRCO0 : HFRCO0 Privileged Access
bits : 4 - 4 (1 bit)
access : read-write

FSRCO : FSRCO Privileged Access
bits : 5 - 5 (1 bit)
access : read-write

DPLL0 : DPLL0 Privileged Access
bits : 6 - 6 (1 bit)
access : read-write

LFXO : LFXO Privileged Access
bits : 7 - 7 (1 bit)
access : read-write

LFRCO : LFRCO Privileged Access
bits : 8 - 8 (1 bit)
access : read-write

ULFRCO : ULFRCO Privileged Access
bits : 9 - 9 (1 bit)
access : read-write

MSC : MSC Privileged Access
bits : 10 - 10 (1 bit)
access : read-write

ICACHE0 : ICACHE0 Privileged Access
bits : 11 - 11 (1 bit)
access : read-write

PRS : PRS Privileged Access
bits : 12 - 12 (1 bit)
access : read-write

GPIO : GPIO Privileged Access
bits : 13 - 13 (1 bit)
access : read-write

LDMA : LDMA Privileged Access
bits : 14 - 14 (1 bit)
access : read-write

LDMAXBAR : LDMAXBAR Privileged Access
bits : 15 - 15 (1 bit)
access : read-write

TIMER0 : TIMER0 Privileged Access
bits : 16 - 16 (1 bit)
access : read-write

TIMER1 : TIMER1 Privileged Access
bits : 17 - 17 (1 bit)
access : read-write

TIMER2 : TIMER2 Privileged Access
bits : 18 - 18 (1 bit)
access : read-write

TIMER3 : TIMER3 Privileged Access
bits : 19 - 19 (1 bit)
access : read-write

TIMER4 : TIMER4 Privileged Access
bits : 20 - 20 (1 bit)
access : read-write

USART0 : USART0 Privileged Access
bits : 21 - 21 (1 bit)
access : read-write

USART1 : USART1 Privileged Access
bits : 22 - 22 (1 bit)
access : read-write

BURTC : BURTC Privileged Access
bits : 23 - 23 (1 bit)
access : read-write

I2C1 : I2C1 Privileged Access
bits : 24 - 24 (1 bit)
access : read-write

CHIPTESTCTRL : CHIPTESTCTRL Privileged Access
bits : 25 - 25 (1 bit)
access : read-write

SYSCFGCFGNS : SYSCFGCFGNS Privileged Access
bits : 26 - 26 (1 bit)
access : read-write

SYSCFG : SYSCFG Privileged Access
bits : 27 - 27 (1 bit)
access : read-write

BURAM : BURAM Privileged Access
bits : 28 - 28 (1 bit)
access : read-write

IFADCDEBUG : IFADCDEBUG Privileged Access
bits : 29 - 29 (1 bit)
access : read-write

GPCRC : GPCRC Privileged Access
bits : 30 - 30 (1 bit)
access : read-write

DCI : DCI Privileged Access
bits : 31 - 31 (1 bit)
access : read-write


PPUPATD1

Set peripheral bits to 1 to mark as privileged access only.
address_offset : 0x44 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPUPATD1 PPUPATD1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCDC PDM RFSENSE RADIOAES SMU SMUCFGNS RTCC LETIMER0 IADC0 I2C0 WDOG0 AMUXCP0 EUART0 CRYPTOACC AHBRADIO

DCDC : DCDC Privileged Access
bits : 1 - 1 (1 bit)
access : read-write

PDM : PDM Privileged Access
bits : 2 - 2 (1 bit)
access : read-write

RFSENSE : RFSENSE Privileged Access
bits : 3 - 3 (1 bit)
access : read-write

RADIOAES : RADIOAES Privileged Access
bits : 4 - 4 (1 bit)
access : read-write

SMU : SMU Privileged Access
bits : 5 - 5 (1 bit)
access : read-write

SMUCFGNS : SMUCFGNS Privileged Access
bits : 6 - 6 (1 bit)
access : read-write

RTCC : RTCC Privileged Access
bits : 7 - 7 (1 bit)
access : read-write

LETIMER0 : LETIMER0 Privileged Access
bits : 8 - 8 (1 bit)
access : read-write

IADC0 : IADC0 Privileged Access
bits : 9 - 9 (1 bit)
access : read-write

I2C0 : I2C0 Privileged Access
bits : 10 - 10 (1 bit)
access : read-write

WDOG0 : WDOG0 Privileged Access
bits : 11 - 11 (1 bit)
access : read-write

AMUXCP0 : AMUXCP0 Privileged Access
bits : 12 - 12 (1 bit)
access : read-write

EUART0 : EUART0 Privileged Access
bits : 13 - 13 (1 bit)
access : read-write

CRYPTOACC : CRYPTOACC Privileged Access
bits : 14 - 14 (1 bit)
access : read-write

AHBRADIO : AHBRADIO Privileged Access
bits : 15 - 15 (1 bit)
access : read-write


PPUSATD0

Set peripheral bits to 1 to mark as secure access only.
address_offset : 0x60 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPUSATD0 PPUSATD0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EMU CMU HFXO0 HFRCO0 FSRCO DPLL0 LFXO LFRCO ULFRCO MSC ICACHE0 PRS GPIO LDMA LDMAXBAR TIMER0 TIMER1 TIMER2 TIMER3 TIMER4 USART0 USART1 BURTC I2C1 CHIPTESTCTRL SYSCFGCFGNS SYSCFG BURAM IFADCDEBUG GPCRC DCI

EMU : EMU Secure Access
bits : 1 - 1 (1 bit)
access : read-write

CMU : CMU Secure Access
bits : 2 - 2 (1 bit)
access : read-write

HFXO0 : HFXO0 Secure Access
bits : 3 - 3 (1 bit)
access : read-write

HFRCO0 : HFRCO0 Secure Access
bits : 4 - 4 (1 bit)
access : read-write

FSRCO : FSRCO Secure Access
bits : 5 - 5 (1 bit)
access : read-write

DPLL0 : DPLL0 Secure Access
bits : 6 - 6 (1 bit)
access : read-write

LFXO : LFXO Secure Access
bits : 7 - 7 (1 bit)
access : read-write

LFRCO : LFRCO Secure Access
bits : 8 - 8 (1 bit)
access : read-write

ULFRCO : ULFRCO Secure Access
bits : 9 - 9 (1 bit)
access : read-write

MSC : MSC Secure Access
bits : 10 - 10 (1 bit)
access : read-write

ICACHE0 : ICACHE0 Secure Access
bits : 11 - 11 (1 bit)
access : read-write

PRS : PRS Secure Access
bits : 12 - 12 (1 bit)
access : read-write

GPIO : GPIO Secure Access
bits : 13 - 13 (1 bit)
access : read-write

LDMA : LDMA Secure Access
bits : 14 - 14 (1 bit)
access : read-write

LDMAXBAR : LDMAXBAR Secure Access
bits : 15 - 15 (1 bit)
access : read-write

TIMER0 : TIMER0 Secure Access
bits : 16 - 16 (1 bit)
access : read-write

TIMER1 : TIMER1 Secure Access
bits : 17 - 17 (1 bit)
access : read-write

TIMER2 : TIMER2 Secure Access
bits : 18 - 18 (1 bit)
access : read-write

TIMER3 : TIMER3 Secure Access
bits : 19 - 19 (1 bit)
access : read-write

TIMER4 : TIMER4 Secure Access
bits : 20 - 20 (1 bit)
access : read-write

USART0 : USART0 Secure Access
bits : 21 - 21 (1 bit)
access : read-write

USART1 : USART1 Secure Access
bits : 22 - 22 (1 bit)
access : read-write

BURTC : BURTC Secure Access
bits : 23 - 23 (1 bit)
access : read-write

I2C1 : I2C1 Secure Access
bits : 24 - 24 (1 bit)
access : read-write

CHIPTESTCTRL : CHIPTESTCTRL Secure Access
bits : 25 - 25 (1 bit)
access : read-write

SYSCFGCFGNS : SYSCFGCFGNS Secure Access
bits : 26 - 26 (1 bit)
access : read-write

SYSCFG : SYSCFG Secure Access
bits : 27 - 27 (1 bit)
access : read-write

BURAM : BURAM Secure Access
bits : 28 - 28 (1 bit)
access : read-write

IFADCDEBUG : IFADCDEBUG Secure Access
bits : 29 - 29 (1 bit)
access : read-write

GPCRC : GPCRC Secure Access
bits : 30 - 30 (1 bit)
access : read-write

DCI : DCI Secure Access
bits : 31 - 31 (1 bit)
access : read-write


PPUSATD1

Set peripheral bits to 1 to mark as secure access only.
address_offset : 0x64 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPUSATD1 PPUSATD1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCDC PDM RFSENSE RADIOAES SMU SMUCFGNS RTCC LETIMER0 IADC0 I2C0 WDOG0 AMUXCP0 EUART0 CRYPTOACC AHBRADIO

DCDC : DCDC Secure Access
bits : 1 - 1 (1 bit)
access : read-write

PDM : PDM Secure Access
bits : 2 - 2 (1 bit)
access : read-write

RFSENSE : RFSENSE Secure Access
bits : 3 - 3 (1 bit)
access : read-write

RADIOAES : RADIOAES Secure Access
bits : 4 - 4 (1 bit)
access : read-write

SMU : SMU Secure Access
bits : 5 - 5 (1 bit)
access : read-write

SMUCFGNS : SMUCFGNS Secure Access
bits : 6 - 6 (1 bit)
access : read-write

RTCC : RTCC Secure Access
bits : 7 - 7 (1 bit)
access : read-write

LETIMER0 : LETIMER0 Secure Access
bits : 8 - 8 (1 bit)
access : read-write

IADC0 : IADC0 Secure Access
bits : 9 - 9 (1 bit)
access : read-write

I2C0 : I2C0 Secure Access
bits : 10 - 10 (1 bit)
access : read-write

WDOG0 : WDOG0 Secure Access
bits : 11 - 11 (1 bit)
access : read-write

AMUXCP0 : AMUXCP0 Secure Access
bits : 12 - 12 (1 bit)
access : read-write

EUART0 : EUART0 Secure Access
bits : 13 - 13 (1 bit)
access : read-write

CRYPTOACC : CRYPTOACC Secure Access
bits : 14 - 14 (1 bit)
access : read-write

AHBRADIO : AHBRADIO Secure Access
bits : 15 - 15 (1 bit)
access : read-write


LOCK

Access to Lock/unlock the SMU Configuration.
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

LOCK LOCK write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SMULOCKKEY

SMULOCKKEY : SMU Lock/Key
bits : 0 - 23 (24 bit)
access : write-only

Enumeration:

11325013 : UNLOCK

Unlocks Registers

End of enumeration elements list.


IF

Read to get status of SMU interrupts.
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IF IF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PPUPRIV PPUINST PPUSEC BMPUSEC

PPUPRIV : PPU Privilege Interrupt Flag
bits : 0 - 0 (1 bit)
access : read-write

PPUINST : PPU Instruction Interrupt Flag
bits : 2 - 2 (1 bit)
access : read-write

PPUSEC : PPU Security Interrupt Flag
bits : 16 - 16 (1 bit)
access : read-write

BMPUSEC : BMPU Security Interrupt Flag
bits : 17 - 17 (1 bit)
access : read-write



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