\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :
No Description
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IPVERSION : IP Version
bits : 0 - 31 (32 bit)
access : read-only
No Description
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RFPKDHILATCNT : RF PKD HI Latch CNT
bits : 0 - 11 (12 bit)
access : read-only
PNDWNUP : Allow PN GAIN UP
bits : 14 - 14 (1 bit)
access : read-only
RFPKDPRDCNT : RF PKD PERIOD CNT
bits : 16 - 31 (16 bit)
access : read-only
No Description
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RSSIFRAC : RSSI fractional part
bits : 6 - 7 (2 bit)
access : read-only
RSSIINT : RSSI integer part
bits : 8 - 15 (8 bit)
access : read-only
No Description
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FRAMERSSIFRAC : FRAMERSSI fractional part
bits : 6 - 7 (2 bit)
access : read-only
FRAMERSSIINT : FRAMERSSI integer part
bits : 8 - 15 (8 bit)
access : read-only
No Description
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PWRTARGET : Power Target
bits : 0 - 7 (8 bit)
access : read-write
MODE : Mode
bits : 8 - 10 (3 bit)
access : read-write
Enumeration:
0 : CONT
AGC loop is adjusting gain continuously.
1 : LOCKPREDET
Gain is locked once a preamble is detected.
2 : LOCKFRAMEDET
Gain is locked once a sync word is detected.
3 : LOCKDSA
Gain is locked once DSA is detected.
End of enumeration elements list.
RSSISHIFT : RSSI Shift
bits : 11 - 18 (8 bit)
access : read-write
DISCFLOOPADJ : Disable gain adjustment by CFLOOP
bits : 19 - 19 (1 bit)
access : read-write
CFLOOPNFADJ : Enable NF correction term in SL
bits : 20 - 20 (1 bit)
access : read-write
CFLOOPNEWCALC : Enable new wanted gain calculation in SL
bits : 21 - 21 (1 bit)
access : read-write
DISRESETCHPWR : Disable Reset of CHPWR
bits : 22 - 22 (1 bit)
access : read-write
ADCATTENMODE : ADC Attenuator mode
bits : 23 - 23 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
ADC attenuator back-off will not be done by AGC
1 : NOTMAXGAIN
ADC attenuator is backed-off if rxgain is NOT MAXGAIN
End of enumeration elements list.
ADCATTENCODE : ADC Attenuator code
bits : 25 - 26 (2 bit)
access : read-write
ENRSSIRESET : Enables reset of RSSI and CCA
bits : 27 - 27 (1 bit)
access : read-write
DSADISCFLOOP : Disable channel filter loop
bits : 28 - 28 (1 bit)
access : read-write
DISPNGAINUP : Disable PN gain increase
bits : 29 - 29 (1 bit)
access : read-write
DISPNDWNCOMP : Disable PN gain decrease compensation
bits : 30 - 30 (1 bit)
access : read-write
AGCRST : AGC reset
bits : 31 - 31 (1 bit)
access : read-write
No Description
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCATHRSH : Clear Channel Assessment (CCA) Threshold
bits : 0 - 7 (8 bit)
access : read-write
RSSIPERIOD : RSSI measure period
bits : 8 - 11 (4 bit)
access : read-write
PWRPERIOD : AGC measure period
bits : 12 - 14 (3 bit)
access : read-write
No Description
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMASEL : DMA select
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : RSSI
RSSI
1 : GAIN
Gain
End of enumeration elements list.
SAFEMODE : AGC safe mode
bits : 1 - 1 (1 bit)
access : read-write
SAFEMODETHD : Enter threshold
bits : 2 - 4 (3 bit)
access : read-write
REHICNTTHD : Exit threshold based on HICNT
bits : 5 - 12 (8 bit)
access : read-write
RELOTHD : Exit threshold based on Release Counter
bits : 13 - 15 (3 bit)
access : read-write
RELBYCHPWR : Safe mode release mode
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : LO_CNT
Increment counter if IFPKD_LO_LAT signal is not set.
1 : PWR
Increment counter if channel power is below RELTARGETPWR.
2 : LO_CNT_PWR
Increment if either LO_CNT or PWR.
3 : LO_CNT_AND_PWR
Increment if both LO_CNT and PWR.
End of enumeration elements list.
RELTARGETPWR : Safe Mode Release Power Target
bits : 18 - 25 (8 bit)
access : read-write
RSSICCASUB : RSSI CCA sub windows
bits : 26 - 28 (3 bit)
access : read-write
DEBCNTRST : Debonce CNT Reset MODE
bits : 29 - 29 (1 bit)
access : read-write
PRSDEBUGEN : PRS Debug Enable
bits : 30 - 30 (1 bit)
access : read-write
DISRFPKD : Disable RF PEAKDET
bits : 31 - 31 (1 bit)
access : read-write
No Description
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IFPKDDEB : IF PEAKDET debounce mode enable
bits : 0 - 0 (1 bit)
access : read-write
IFPKDDEBTHD : IF PEAKDET debance thrshold
bits : 1 - 2 (2 bit)
access : read-write
IFPKDDEBPRD : IF PEAKDET debance period
bits : 3 - 8 (6 bit)
access : read-write
IFPKDDEBRST : IF PEAKDET debounce period
bits : 9 - 12 (4 bit)
access : read-write
RFPKDDEB : RF PEAKDET debounce mode enable
bits : 13 - 13 (1 bit)
access : read-write
RFPKDDEBTHD : RF PEAKDET debance thrshold
bits : 14 - 18 (5 bit)
access : read-write
RFPKDDEBPRD : RF PEAKDET debance period
bits : 19 - 26 (8 bit)
access : read-write
RFPKDDEBRST : RFPKD_LAT debounce reset delay
bits : 27 - 31 (5 bit)
access : read-write
No Description
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PERIODRFPKD : RFPKD trigger measure period
bits : 0 - 15 (16 bit)
access : read-write
RFPKDPRDGEAR : RFPKD Period Gear
bits : 25 - 27 (3 bit)
access : read-write
RFPKDSYNCSEL : SYNC RF PKD OUTPUT SELECT
bits : 28 - 28 (1 bit)
access : read-write
RFPKDSEL : RF PKD OUTPUT SELECT
bits : 29 - 29 (1 bit)
access : read-write
FRZPKDEN : PKD Freeze Enable
bits : 30 - 30 (1 bit)
access : read-write
RFPKDCNTEN : Counter-based RFPKD Enable
bits : 31 - 31 (1 bit)
access : read-write
No Description
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PNUPDISTHD : Disable PN GAIN increase THD
bits : 0 - 11 (12 bit)
access : read-write
PNUPRELTHD : Enable PN GAIN increase THD
bits : 12 - 23 (12 bit)
access : read-write
SEQPNUPALLOW : SEQ Set PN GAIN UP ALLOW
bits : 30 - 30 (1 bit)
access : read-write
SEQRFPKDEN : SEQ-based RFPKD Enable
bits : 31 - 31 (1 bit)
access : read-write
No Description
address_offset : 0x38 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DUALRFPKDDEC : Decoding matrix for dualrfpkd logic
bits : 0 - 17 (18 bit)
access : read-write
ENDUALRFPKD : Enable dual RFPKD
bits : 18 - 18 (1 bit)
access : read-write
GAINDETTHD : Threshold for gain aligned interrupt
bits : 19 - 30 (12 bit)
access : read-write
No Description
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SUBDEN : Subperiod denominator
bits : 0 - 7 (8 bit)
access : read-write
SUBINT : Subperiod integer
bits : 8 - 15 (8 bit)
access : read-write
SUBNUM : Subperiod numerator
bits : 16 - 23 (8 bit)
access : read-write
SUBPERIOD : Subperiod
bits : 24 - 24 (1 bit)
access : read-write
No Description
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : Enable peripheral clock to this module
bits : 0 - 0 (1 bit)
access : read-write
No Description
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
POSSTEPTHR : Positive Step Threshold
bits : 0 - 7 (8 bit)
access : read-write
NEGSTEPTHR : Negative Step Threshold
bits : 8 - 15 (8 bit)
access : read-write
STEPPER : Step Period
bits : 16 - 16 (1 bit)
access : read-write
DEMODRESTARTPER : Demodulator Restart Period
bits : 17 - 20 (4 bit)
access : read-write
DEMODRESTARTTHR : Demodulator Restart Threshold
bits : 21 - 28 (8 bit)
access : read-write
RSSIFAST : RSSI fast startup
bits : 29 - 29 (1 bit)
access : read-write
No Description
address_offset : 0x48 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RSSIVALID : RSSI Value is Valid
bits : 0 - 0 (1 bit)
access : read-write
CCA : Clear Channel Assessment
bits : 2 - 2 (1 bit)
access : read-write
RSSIPOSSTEP : Positive RSSI Step Detected
bits : 3 - 3 (1 bit)
access : read-write
RSSINEGSTEP : Negative RSSI Step Detected
bits : 4 - 4 (1 bit)
access : read-write
SHORTRSSIPOSSTEP : Short-term Positive RSSI Step Detected
bits : 6 - 6 (1 bit)
access : read-write
RFPKDPRDDONE : RF PKD PERIOD CNT TOMEOUT
bits : 8 - 8 (1 bit)
access : read-write
RFPKDCNTDONE : RF PKD pulse CNT TOMEOUT
bits : 9 - 9 (1 bit)
access : read-write
RSSIHIGH : RSSI high detected
bits : 10 - 10 (1 bit)
access : read-write
RSSILOW : RSSI low detected
bits : 11 - 11 (1 bit)
access : read-write
CCANODET : CCA Not Detected
bits : 12 - 12 (1 bit)
access : read-write
GAINBELOWGAINTHD : agc gain above threshold int
bits : 13 - 13 (1 bit)
access : read-write
GAINUPDATEFRZ : AGC gain update frozen int
bits : 14 - 14 (1 bit)
access : read-write
No Description
address_offset : 0x4C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RSSIVALID : RSSIVALID Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write
CCA : CCA Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write
RSSIPOSSTEP : RSSIPOSSTEP Interrupt Enable
bits : 3 - 3 (1 bit)
access : read-write
RSSINEGSTEP : RSSINEGSTEP Interrupt Enable
bits : 4 - 4 (1 bit)
access : read-write
SHORTRSSIPOSSTEP : SHORTRSSIPOSSTEP Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write
RFPKDPRDDONE : RF PKD PERIOD CNT Interrupt Enable
bits : 8 - 8 (1 bit)
access : read-write
RFPKDCNTDONE : RF PKD pulse CNT Interrupt Enable
bits : 9 - 9 (1 bit)
access : read-write
RSSIHIGH : RSSIHIGH Interrupt Enable
bits : 10 - 10 (1 bit)
access : read-write
RSSILOW : RSSILOW Interrupt Enable
bits : 11 - 11 (1 bit)
access : read-write
CCANODET : CCANODET Interrupt Enable
bits : 12 - 12 (1 bit)
access : read-write
GAINBELOWGAINTHD : GAINBELOWGAINTHD Interrupt Enable
bits : 13 - 13 (1 bit)
access : read-write
GAINUPDATEFRZ : AGC gain update frozen int Enable
bits : 14 - 14 (1 bit)
access : read-write
No Description
address_offset : 0x54 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAINDEXBORDER : LNA gain border
bits : 0 - 3 (4 bit)
access : read-write
PGAINDEXBORDER : PGA gain border
bits : 4 - 7 (4 bit)
access : read-write
GAININCSTEP : AGC gain increase step size
bits : 8 - 11 (4 bit)
access : read-write
PNGAINSTEP : PN Gain Step size
bits : 12 - 15 (4 bit)
access : read-write
LATCHEDHISTEP : Ltached Hi step size
bits : 16 - 19 (4 bit)
access : read-write
HIPWRTHD : High power detect thrshold
bits : 20 - 25 (6 bit)
access : read-write
No Description
address_offset : 0x58 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PERIODHI : AGC measure period hi
bits : 0 - 8 (9 bit)
access : read-write
MAXHICNTTHD : max hi-countrer threshold
bits : 16 - 23 (8 bit)
access : read-write
SETTLETIMEIF : IF peak Detector settling time
bits : 24 - 27 (4 bit)
access : read-write
SETTLETIMERF : RF peak Detector settling time
bits : 28 - 31 (4 bit)
access : read-write
No Description
address_offset : 0x5C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PERIODLOW : AGC IF period low th
bits : 0 - 31 (32 bit)
access : read-write
No Description
address_offset : 0x60 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HICNTREGION0 : AGC HICNT to step size map region 0
bits : 0 - 7 (8 bit)
access : read-write
HICNTREGION1 : AGC HICNT to step size map region 1
bits : 8 - 15 (8 bit)
access : read-write
HICNTREGION2 : AGC HICNT to step size map region 2
bits : 16 - 23 (8 bit)
access : read-write
HICNTREGION3 : AGC HICNT to step size map region 3
bits : 24 - 31 (8 bit)
access : read-write
No Description
address_offset : 0x64 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HICNTREGION4 : AGC HICNT to step size map region 4
bits : 0 - 7 (8 bit)
access : read-write
No Description
address_offset : 0x68 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STEPDWN0 : AGC gain step size 0
bits : 0 - 2 (3 bit)
access : read-write
STEPDWN1 : AGC gain step size 1
bits : 3 - 5 (3 bit)
access : read-write
STEPDWN2 : AGC gain step size 2
bits : 6 - 8 (3 bit)
access : read-write
STEPDWN3 : AGC gain step size 3
bits : 9 - 11 (3 bit)
access : read-write
STEPDWN4 : AGC gain step size 4
bits : 12 - 14 (3 bit)
access : read-write
STEPDWN5 : AGC gain step size 5
bits : 15 - 17 (3 bit)
access : read-write
No Description
address_offset : 0x6C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CFLOOPSTEPMAX : Maximum step in slow loop
bits : 0 - 4 (5 bit)
access : read-write
CFLOOPDEL : Channel Filter Loop Delay
bits : 5 - 11 (7 bit)
access : read-write
HYST : Hysteresis
bits : 12 - 15 (4 bit)
access : read-write
MAXPWRVAR : Maximum Power Variation
bits : 16 - 23 (8 bit)
access : read-write
TRANRSTAGC : power transient detector Reset AGC
bits : 24 - 24 (1 bit)
access : read-write
No Description
address_offset : 0x70 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAINDEXMAX : MAX LNA INDEX
bits : 0 - 3 (4 bit)
access : read-write
PGAINDEXMAX : MAX LNA INDEX
bits : 4 - 7 (4 bit)
access : read-write
PNINDEXMAX : MAX PN INDEX
bits : 8 - 12 (5 bit)
access : read-write
No Description
address_offset : 0x74 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXRFATT1 : PN RF attenuation code for index 1
bits : 0 - 13 (14 bit)
access : read-write
LNAMIXRFATT2 : PN RF attenuation code for index 2
bits : 16 - 29 (14 bit)
access : read-write
No Description
address_offset : 0x78 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXRFATT3 : PN RF attenuation code for index 3
bits : 0 - 13 (14 bit)
access : read-write
LNAMIXRFATT4 : PN RF attenuation code for index 4
bits : 16 - 29 (14 bit)
access : read-write
No Description
address_offset : 0x7C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXRFATT5 : PN RF attenuation code for index 5
bits : 0 - 13 (14 bit)
access : read-write
LNAMIXRFATT6 : PN RF attenuation code for index 6
bits : 16 - 29 (14 bit)
access : read-write
No Description
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
GAININDEX : Gain Table Index
bits : 0 - 5 (6 bit)
access : read-only
RFPKDLOWLAT : RFPKD low Latch
bits : 6 - 6 (1 bit)
access : read-only
RFPKDHILAT : RFPKD hi Latch
bits : 7 - 7 (1 bit)
access : read-only
IFPKDLOLAT : IFPKD Lo threshold pass Latch
bits : 8 - 8 (1 bit)
access : read-only
IFPKDHILAT : IFPKD Hi threshold pass Latch
bits : 9 - 9 (1 bit)
access : read-only
CCA : Clear Channel Assessment
bits : 10 - 10 (1 bit)
access : read-only
GAINOK : Gain OK
bits : 11 - 11 (1 bit)
access : read-only
PGAINDEX : PGA GAIN INDEX
bits : 12 - 15 (4 bit)
access : read-only
LNAINDEX : LNA GAIN INDEX
bits : 16 - 19 (4 bit)
access : read-only
PNINDEX : PN GAIN INDEX
bits : 20 - 24 (5 bit)
access : read-only
ADCINDEX : ADC Attenuator INDEX
bits : 25 - 26 (2 bit)
access : read-only
No Description
address_offset : 0x80 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXRFATT7 : PN RF attenuation code for index 7
bits : 0 - 13 (14 bit)
access : read-write
LNAMIXRFATT8 : PN RF attenuation code for index 8
bits : 16 - 29 (14 bit)
access : read-write
No Description
address_offset : 0x84 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXRFATT9 : PN RF attenuation code for index 9
bits : 0 - 13 (14 bit)
access : read-write
LNAMIXRFATT10 : PN RF attenuation code for index 10
bits : 16 - 29 (14 bit)
access : read-write
No Description
address_offset : 0x88 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXRFATT11 : PN RF attenuation code for index 11
bits : 0 - 13 (14 bit)
access : read-write
LNAMIXRFATT12 : PN RF attenuation code for index 12
bits : 16 - 29 (14 bit)
access : read-write
No Description
address_offset : 0x8C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXRFATT13 : PN RF attenuation code for index 13
bits : 0 - 13 (14 bit)
access : read-write
LNAMIXRFATT14 : PN RF attenuation code for index 14
bits : 16 - 29 (14 bit)
access : read-write
No Description
address_offset : 0x90 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXRFATT15 : PN RF attenuation code for index 15
bits : 0 - 13 (14 bit)
access : read-write
LNAMIXRFATT16 : PN RF attenuation code for index 16
bits : 16 - 29 (14 bit)
access : read-write
No Description
address_offset : 0x94 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXRFATT17 : PN RF attenuation code for index 17
bits : 0 - 13 (14 bit)
access : read-write
LNAMIXRFATT18 : PN RF attenuation code for index 18
bits : 16 - 29 (14 bit)
access : read-write
No Description
address_offset : 0x98 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXRFATT19 : PN RF attenuation code for index 19
bits : 0 - 13 (14 bit)
access : read-write
LNAMIXRFATT20 : PN RF attenuation code for index 20
bits : 16 - 29 (14 bit)
access : read-write
No Description
address_offset : 0x9C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXRFATT21 : PN RF attenuation code for index 21
bits : 0 - 13 (14 bit)
access : read-write
LNAMIXRFATT22 : PN RF attenuation code for index 22
bits : 16 - 29 (14 bit)
access : read-write
No Description
address_offset : 0xA0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXRFATT23 : PN RF attenuation code for index 23
bits : 0 - 13 (14 bit)
access : read-write
No Description
address_offset : 0xA4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXRFATTALT : PN RF attenuation code for index 21
bits : 0 - 13 (14 bit)
access : read-write
No Description
address_offset : 0xA8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXSLICE1 : LNA/MIX slice code for index 1
bits : 0 - 5 (6 bit)
access : read-write
LNAMIXSLICE2 : LNA/MIX slice code for index 2
bits : 6 - 11 (6 bit)
access : read-write
LNAMIXSLICE3 : LNA/MIX slice code for index 3
bits : 12 - 17 (6 bit)
access : read-write
LNAMIXSLICE4 : LNA/MIX slice code for index 4
bits : 18 - 23 (6 bit)
access : read-write
LNAMIXSLICE5 : LNA/MIX slice code for index 5
bits : 24 - 29 (6 bit)
access : read-write
No Description
address_offset : 0xAC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXSLICE6 : LNA/MIX slice code for index 6
bits : 0 - 5 (6 bit)
access : read-write
LNAMIXSLICE7 : LNA/MIX slice code for index 7
bits : 6 - 11 (6 bit)
access : read-write
LNAMIXSLICE8 : LNA/MIX slice code for index 8
bits : 12 - 17 (6 bit)
access : read-write
LNAMIXSLICE9 : LNA/MIX slice code for index 9
bits : 18 - 23 (6 bit)
access : read-write
LNAMIXSLICE10 : LNA/MIX slice code for index 10
bits : 24 - 29 (6 bit)
access : read-write
No Description
address_offset : 0xB0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PGAGAIN1 : PGA GAIN code for index 1
bits : 0 - 3 (4 bit)
access : read-write
PGAGAIN2 : PGA GAIN code for index 2
bits : 4 - 7 (4 bit)
access : read-write
PGAGAIN3 : PGA GAIN code for index 3
bits : 8 - 11 (4 bit)
access : read-write
PGAGAIN4 : PGA GAIN code for index 4
bits : 12 - 15 (4 bit)
access : read-write
PGAGAIN5 : PGA GAIN code for index 5
bits : 16 - 19 (4 bit)
access : read-write
PGAGAIN6 : PGA GAIN code for index 6
bits : 20 - 23 (4 bit)
access : read-write
PGAGAIN7 : PGA GAIN code for index 7
bits : 24 - 27 (4 bit)
access : read-write
PGAGAIN8 : PGA GAIN code for index 8
bits : 28 - 31 (4 bit)
access : read-write
No Description
address_offset : 0xB4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PGAGAIN9 : PGA GAIN code for index 9
bits : 0 - 3 (4 bit)
access : read-write
PGAGAIN10 : PGA GAIN code for index 10
bits : 4 - 7 (4 bit)
access : read-write
PGAGAIN11 : PGA GAIN code for index 11
bits : 8 - 11 (4 bit)
access : read-write
No Description
address_offset : 0xB8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCARSSIPERIOD : RSSI Period during CCA measurements
bits : 0 - 3 (4 bit)
access : read-write
ENCCARSSIPERIOD : RSSI PERIOD during CCA measurements
bits : 4 - 4 (1 bit)
access : read-write
ENCCAGAINREDUCED : CCA gain reduced
bits : 5 - 5 (1 bit)
access : read-write
ENCCARSSIMAX : Use RSSIMAX to indicate CCA
bits : 6 - 6 (1 bit)
access : read-write
No Description
address_offset : 0xBC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RSSIPOSSTEPM : Positive RSSI Step Detected
bits : 0 - 0 (1 bit)
access : read-only
RSSINEGSTEPM : Negative RSSI Step Detected
bits : 1 - 1 (1 bit)
access : read-only
SHORTRSSIPOSSTEPM : Short-term Positive RSSI Step Detected
bits : 2 - 2 (1 bit)
access : read-only
IFMIRRORCLEAR : Clear bit for the AGC IF MIRROR Register
bits : 3 - 3 (1 bit)
access : read-write
No Description
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RFPKDLOWLATCNT : RF PKD Low Latch CNT
bits : 18 - 29 (12 bit)
access : read-only
No Description
address_offset : 0xC0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RSSIVALID : RSSI Value is Valid
bits : 0 - 0 (1 bit)
access : read-write
CCA : Clear Channel Assessment
bits : 2 - 2 (1 bit)
access : read-write
RSSIPOSSTEP : Positive RSSI Step Detected
bits : 3 - 3 (1 bit)
access : read-write
RSSINEGSTEP : Negative RSSI Step Detected
bits : 4 - 4 (1 bit)
access : read-write
SHORTRSSIPOSSTEP : Short-term Positive RSSI Step Detected
bits : 6 - 6 (1 bit)
access : read-write
RFPKDPRDDONE : RF PKD PERIOD CNT TOMEOUT
bits : 8 - 8 (1 bit)
access : read-write
RFPKDCNTDONE : RF PKD pulse CNT TOMEOUT
bits : 9 - 9 (1 bit)
access : read-write
RSSIHIGH : RSSI high detected
bits : 10 - 10 (1 bit)
access : read-write
RSSILOW : RSSI low detected
bits : 11 - 11 (1 bit)
access : read-write
CCANODET : CCA Not Detected
bits : 12 - 12 (1 bit)
access : read-write
GAINBELOWGAINTHD : agc gain above threshold int
bits : 13 - 13 (1 bit)
access : read-write
GAINUPDATEFRZ : AGC gain update frozen int
bits : 14 - 14 (1 bit)
access : read-write
No Description
address_offset : 0xC4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RSSIVALID : RSSIVALID Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write
CCA : CCA Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write
RSSIPOSSTEP : RSSIPOSSTEP Interrupt Enable
bits : 3 - 3 (1 bit)
access : read-write
RSSINEGSTEP : RSSINEGSTEP Interrupt Enable
bits : 4 - 4 (1 bit)
access : read-write
SHORTRSSIPOSSTEP : SHORTRSSIPOSSTEP Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write
RFPKDPRDDONE : RF PKD PERIOD CNT Interrupt Enable
bits : 8 - 8 (1 bit)
access : read-write
RFPKDCNTDONE : RF PKD pulse CNT Interrupt Enable
bits : 9 - 9 (1 bit)
access : read-write
RSSIHIGH : RSSIHIGH Interrupt Enable
bits : 10 - 10 (1 bit)
access : read-write
RSSILOW : RSSILOW Interrupt Enable
bits : 11 - 11 (1 bit)
access : read-write
CCANODET : CCANODET Interrupt Enable
bits : 12 - 12 (1 bit)
access : read-write
GAINBELOWGAINTHD : GAINBELOWGAINTHD Interrupt Enable
bits : 13 - 13 (1 bit)
access : read-write
GAINUPDATEFRZ : AGC gain update frozen int Enable
bits : 14 - 14 (1 bit)
access : read-write
No Description
address_offset : 0xC8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RSSIHIGHTHRSH : RSSI High Threshold
bits : 0 - 7 (8 bit)
access : read-write
RSSILOWTHRSH : RSSI Low Threshold
bits : 8 - 15 (8 bit)
access : read-write
No Description
address_offset : 0xCC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BOOSTLNA : LNA GAIN BOOST mode
bits : 0 - 0 (1 bit)
access : read-write
LNABWADJ : LNA BW ADJUST
bits : 1 - 4 (4 bit)
access : read-write
LNABWADJBOOST : LNA BW ADJUST
bits : 5 - 8 (4 bit)
access : read-write
No Description
address_offset : 0xD0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GAINMODE : Antenna gain restore mode
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : DISABLE
Gain restore feature disabled
1 : SINGLE_PACKET
Gain restore enabled. The stored gain will be cleared when current RX off.
2 : ALWAYS
Gain restore enabled. The stored gain will be kept across packets.
End of enumeration elements list.
DEBOUNCECNTTHD : Gain restore debounce timer threshold
bits : 2 - 8 (7 bit)
access : read-write
DISRSSIANTDIVFIX : Disables RSSI fix for antenna diversity
bits : 9 - 9 (1 bit)
access : read-write
No Description
address_offset : 0xD4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RFPKDLOWTHD0 : low rfpkd threshold 0
bits : 0 - 11 (12 bit)
access : read-write
RFPKDLOWTHD1 : low rfpkd threshold 1
bits : 16 - 27 (12 bit)
access : read-write
No Description
address_offset : 0xD8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RFPKDHITHD0 : low rfpkd threshold 0
bits : 0 - 11 (12 bit)
access : read-write
RFPKDHITHD1 : low rfpkd threshold 1
bits : 16 - 27 (12 bit)
access : read-write
No Description
address_offset : 0xDC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SPAREREG : Spare reg for ECOs
bits : 0 - 7 (8 bit)
access : read-write
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