Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :
IPVERSION
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IPVERSION : IPVERSION
bits : 0 - 31 (32 bit)
access : read-only
Command
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
KEYSCANSTART : Keyscan Start
bits : 0 - 0 (1 bit)
access : write-only
KEYSCANSTOP : Keyscan Stop
bits : 1 - 1 (1 bit)
access : write-only
Delay
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SCANDLY : Scan Delay
bits : 8 - 11 (4 bit)
access : read-write
Enumeration:
0 : SCANDLY2
2ms Scan Delay
1 : SCANDLY4
4ms Scan Delay
2 : SCANDLY6
6ms Scan Delay
3 : SCANDLY8
8ms Scan Delay
4 : SCANDLY10
10ms Scan Delay
5 : SCANDLY12
12ms Scan Delay
6 : SCANDLY14
14ms Scan Delay
7 : SCANDLY16
16ms Scan Delay
8 : SCANDLY18
18ms Scan Delay
9 : SCANDLY20
20ms Scan Delay
10 : SCANDLY22
22ms Scan Delay
11 : SCANDLY24
24ms Scan Delay
12 : SCANDLY26
26ms Scan Delay
13 : SCANDLY28
28ms Scan Delay
14 : SCANDLY30
30ms Scan Delay
15 : SCANDLY32
32ms Scan Delay
End of enumeration elements list.
DEBDLY : Debounce Delay
bits : 16 - 19 (4 bit)
access : read-write
Enumeration:
0 : DEBDLY2
2ms Debounce Delay
1 : DEBDLY4
4ms Debounce Delay
2 : DEBDLY6
6ms Debounce Delay
3 : DEBDLY8
8ms Debounce Delay
4 : DEBDLY10
10ms Debounce Delay
5 : DEBDLY12
12ms Debounce Delay
6 : DEBDLY14
14ms Debounce Delay
7 : DEBDLY16
16ms Debounce Delay
8 : DEBDLY18
18ms Debounce Delay
9 : DEBDLY20
20ms Debounce Delay
10 : DEBDLY22
22ms Debounce Delay
11 : DEBDLY24
24ms Debounce Delay
12 : DEBDLY26
26ms Debounce Delay
13 : DEBDLY28
28ms Debounce Delay
14 : DEBDLY30
30ms Debounce Delay
15 : DEBDLY32
32ms Debounce Delay
End of enumeration elements list.
STABDLY : Row stable Delay
bits : 24 - 27 (4 bit)
access : read-write
Enumeration:
0 : STABDLY2
2ms Row Stable Delay
1 : STABDLY4
4ms Row Stable Delay
2 : STABDLY6
6ms Row Stable Delay
3 : STABDLY8
8ms Row Stable Delay
4 : STABDLY10
10ms Row Stable Delay
5 : STABDLY12
12ms Row Stable Delay
6 : STABDLY14
14ms Row Stable Delay
7 : STABDLY16
16ms Row Stable Delay
8 : STABDLY18
18ms Row Stable Delay
9 : STABDLY20
20ms Row Stable Delay
10 : STABDLY22
22ms Row Stable Delay
11 : STABDLY24
24ms Row Stable Delay
12 : STABDLY26
26ms Row Stable Delay
13 : STABDLY28
28ms Row Stable Delay
14 : STABDLY30
30ms Row Stable Delay
15 : STABDLY32
32ms Row Stable Delay
End of enumeration elements list.
Status
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ROW : Row detection
bits : 0 - 5 (6 bit)
access : read-only
RUNNING : Running
bits : 16 - 16 (1 bit)
access : read-only
COL : Column Latched
bits : 24 - 26 (3 bit)
access : read-only
NOKEY : No Key pressed status
bits : 30 - 30 (1 bit)
access : read-only
SYNCBUSY : Sync Busy
bits : 31 - 31 (1 bit)
access : read-only
Interrupt Flags
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NOKEY : No key was pressed
bits : 0 - 0 (1 bit)
access : read-write
KEY : A key was pressed
bits : 1 - 1 (1 bit)
access : read-write
SCANNED : Completed scan
bits : 2 - 2 (1 bit)
access : read-write
WAKEUP : Wake up
bits : 3 - 3 (1 bit)
access : read-write
Interrupt Enables
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NOKEY : No Key was pressed
bits : 0 - 0 (1 bit)
access : read-write
KEY : A Key was pressed
bits : 1 - 1 (1 bit)
access : read-write
SCANNED : Completed Scanning
bits : 2 - 2 (1 bit)
access : read-write
WAKEUP : Wake up
bits : 3 - 3 (1 bit)
access : read-write
Enable
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
Stops clocking and resets peripheral core logic.
1 : ENABLE
Enables clocking, and begins scanning if CFG.AUTOSTART is 0x1.
End of enumeration elements list.
DISABLING : Disablement busy status
bits : 1 - 1 (1 bit)
access : read-only
Software Reset
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWRST : Software reset command
bits : 0 - 0 (1 bit)
access : write-only
RESETTING : Software reset busy status
bits : 1 - 1 (1 bit)
access : read-only
Config
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLKDIV : Clock Divider
bits : 0 - 17 (18 bit)
access : read-write
SINGLEPRESS : Single Press
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : MULTIPRESS
After KEYIF is set and then cleared, scanning will continue. This can give multiple interrupts for the same key press, but allow multiple key presses to be detected. To use this mode for multi-key detection, the ISR should update a section of memory of COLNUM bytes on each interrupt, until key release is detected. After key release, the section of memory where key presses are recorded can be processed.
1 : SINGLEPRESS
After KEYIF has been set and cleared, it will not set again until no key press is detected. This allows faster response since the ISR can start processing data as soon as the KEYIF is set.
End of enumeration elements list.
AUTOSTART : Automatically Start
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
0 : AUTOSTARTDIS
Auto start is disabled
1 : AUTOSTARTEN
Auto start is enabled
End of enumeration elements list.
NUMROWS : Number of Rows
bits : 24 - 26 (3 bit)
access : read-write
Enumeration:
0 : RSV1
1 Row is not supported defaults to 3 instead
1 : RSV2
2 Rows are not supported defaults to 3 instead
2 : ROW3
3 Rows
3 : ROW4
4 Rows
4 : ROW5
5 Rows
5 : ROW6
6 Rows
End of enumeration elements list.
NUMCOLS : Number of Columns
bits : 28 - 30 (3 bit)
access : read-write
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