Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :
No Description
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IPVERSION : IP Version
bits : 0 - 31 (32 bit)
access : read-only
No Description
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
TXEN : Transmitter Enable
bits : 0 - 0 (1 bit)
access : write-only
FORCETX : Force TX Command
bits : 1 - 1 (1 bit)
access : write-only
TXONCCA : Transmit On CCA
bits : 2 - 2 (1 bit)
access : write-only
CLEARTXEN : Clear TX Enable
bits : 3 - 3 (1 bit)
access : write-only
TXAFTERFRAME : TX After Frame
bits : 4 - 4 (1 bit)
access : write-only
TXDIS : TX Disable
bits : 5 - 5 (1 bit)
access : write-only
CLEARRXOVERFLOW : Clear RX Overflow
bits : 6 - 6 (1 bit)
access : write-only
RXCAL : Start an RX Calibration
bits : 7 - 7 (1 bit)
access : write-only
RXDIS : RX Disable
bits : 8 - 8 (1 bit)
access : write-only
FRCWR : FRC write cmd
bits : 10 - 10 (1 bit)
access : write-only
FRCRD : FRC read cmd
bits : 11 - 11 (1 bit)
access : write-only
PAENSET : PAEN Set
bits : 12 - 12 (1 bit)
access : write-only
PAENCLEAR : PAEN Clear
bits : 13 - 13 (1 bit)
access : write-only
LNAENSET : LNAEN Set
bits : 14 - 14 (1 bit)
access : write-only
LNAENCLEAR : LNAEN Clear
bits : 15 - 15 (1 bit)
access : write-only
address_offset : 0x100 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXLNA0CAPSEL : LNAMIXLNA0CAPSEL
bits : 0 - 2 (3 bit)
access : read-write
LNAMIXMXRBIAS0 : LNAMIXMXRBIAS0
bits : 3 - 4 (2 bit)
access : read-write
Enumeration:
0 : bias_1V
1 : unused
2 : bias_900m
3 : bias_800m
End of enumeration elements list.
LNAMIXVOUT0ADJ : LNAMIXVOUT0ADJ
bits : 5 - 8 (4 bit)
access : read-write
address_offset : 0x104 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXLNA1CAPSEL : LNAMIXLNA1CAPSEL
bits : 0 - 2 (3 bit)
access : read-write
LNAMIXMXRBIAS1 : LNAMIXMXRBIAS1
bits : 3 - 4 (2 bit)
access : read-write
Enumeration:
0 : bias_1V
1 : unused
2 : bias_900m
3 : bias_800m
End of enumeration elements list.
LNAMIXVOUT1ADJ : LNAMIXVOUT1ADJ
bits : 5 - 8 (4 bit)
access : read-write
address_offset : 0x108 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXCURCTRL : LNAMIXCURCTRL
bits : 4 - 9 (6 bit)
access : read-write
LNAMIXHIGHCUR : LNAMIXHIGHCUR
bits : 10 - 11 (2 bit)
access : read-write
Enumeration:
0 : current_470uA
1 : current_530uA
2 : unused
3 : current_590uA
End of enumeration elements list.
LNAMIXLOWCUR : LNAMIXLOWCUR
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : current_60per
1 : current_80per
2 : current_100per
3 : current_150per
End of enumeration elements list.
LNAMIXLNARESADJ : LNAMIXLNARESADJ
bits : 14 - 16 (3 bit)
access : read-write
LNAMIXNCASADJ : LNAMIXNCASADJ
bits : 17 - 18 (2 bit)
access : read-write
LNAMIXPCASADJ : LNAMIXPCASADJ
bits : 19 - 20 (2 bit)
access : read-write
LNAMIXTRIMVREG : LNAMIXTRIMVREG
bits : 21 - 24 (4 bit)
access : read-write
No Description
address_offset : 0x10C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXIBIASADJN : LNAMIXIBIASADJN
bits : 0 - 4 (5 bit)
access : read-write
LNAMIXIBIASADJP : LNAMIXIBIASADJP
bits : 5 - 9 (5 bit)
access : read-write
LNAMIXIBIASRANGEADJN : LNAMIXIBIASRANGEADJN
bits : 10 - 11 (2 bit)
access : read-write
Enumeration:
0 : Shift_range_low
2 : default
3 : Shift_range_high
End of enumeration elements list.
LNAMIXIBIASRANGEADJP : LNAMIXIBIASRANGEADJP
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0 : Shift_range_low
2 : default
3 : Shift_range_high
End of enumeration elements list.
No Description
address_offset : 0x110 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXRFPKDBWSEL : LNAMIXRFPKDBWSEL
bits : 0 - 1 (2 bit)
access : read-write
LNAMIXRFPKDCALCMLO : LNAMIXRFPKDCALCMLO
bits : 8 - 13 (6 bit)
access : read-write
LNAMIXRFPKDCALCMHI : LNAMIXRFPKDCALCMHI
bits : 14 - 19 (6 bit)
access : read-write
LNAMIXRFPKDTHRESHSELLO : LNAMIXRFPKDTHRESHSELLO
bits : 24 - 27 (4 bit)
access : read-write
Enumeration:
0 : thresh_0
1 : thresh_20m
2 : thresh_30m
3 : thresh_40m
4 : thresh_50m
5 : thresh_60m
6 : thresh_70m
7 : thresh_80m
8 : thresh_90m
9 : thresh_100m
End of enumeration elements list.
LNAMIXRFPKDTHRESHSELHI : LNAMIXRFPKDTHRESHSELHI
bits : 28 - 31 (4 bit)
access : read-write
Enumeration:
0 : thresh_0
1 : thresh_20m
2 : thresh_30m
3 : thresh_40m
4 : thresh_50m
5 : thresh_60m
6 : thresh_70m
7 : thresh_80m
8 : thresh_90m
9 : thresh_100m
End of enumeration elements list.
address_offset : 0x114 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXCALPMOSEN : LNAMIXCALPMOSEN
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : cal_disable
1 : cal_enable
End of enumeration elements list.
LNAMIXCALNMOSEN : LNAMIXCALNMOSEN
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : cal_disable
1 : cal_enable
End of enumeration elements list.
LNAMIXCALVMODE : LNAMIXCALVMODE
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : current_mode
1 : voltage_mode
End of enumeration elements list.
LNAMIXENIRCAL0 : LNAMIXENIRCAL0
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
LNAMIXENIRCAL1 : LNAMIXENIRCAL1
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
LNAMIXIRCAL0AMP : LNAMIXIRCAL0AMP
bits : 5 - 7 (3 bit)
access : read-write
LNAMIXIRCAL1AMP : LNAMIXIRCAL1AMP
bits : 8 - 10 (3 bit)
access : read-write
address_offset : 0x118 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXENAMP0 : LNAMIXENAMP0
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
LNAMIXENAMP1 : LNAMIXENAMP1
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
LNAMIXENBIAS : LNAMIXENBIAS
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
LNAMIXENLDO : LNAMIXENLDO
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
address_offset : 0x11C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PREBYPFORCE : PREBYPFORCE
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : not_forced
1 : forced
End of enumeration elements list.
PREREGTRIM : PREREGTRIM
bits : 1 - 3 (3 bit)
access : read-write
Enumeration:
0 : v1p61
1 : v1p68
2 : v1p74
3 : v1p80
4 : v1p86
5 : v1p91
6 : v1p96
7 : v2p00
End of enumeration elements list.
PREVREFTRIM : PREVREFTRIM
bits : 4 - 5 (2 bit)
access : read-write
Enumeration:
0 : v0p675
1 : v0p688
2 : v0p700
3 : v0p713
End of enumeration elements list.
address_offset : 0x120 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXTRIMLPAVMID : TXTRIMLPAVMID
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : noeffect0
1 : noeffect1
2 : noeffec2
3 : noeffect3
End of enumeration elements list.
address_offset : 0x124 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXTRIMXPAVNB : TXTRIMXPAVNB
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0 : ovdd0p45
1 : ovdd0p50
2 : ovdd0p55
3 : ovdd0p60
4 : ovdd0p65
5 : ovdd0p70
6 : ovdd0p75
7 : ovdd0p80
End of enumeration elements list.
TXTRIMXPAVPB : TXTRIMXPAVPB
bits : 3 - 5 (3 bit)
access : read-write
Enumeration:
0 : ognd0p45
1 : ognd0p50
2 : ognd0p55
3 : ognd0p60
4 : ognd0p65
5 : ognd0p70
6 : ognd0p75
7 : ognd0p80
End of enumeration elements list.
TXTRIMHPAVMID : TXTRIMHPAVMID
bits : 6 - 7 (2 bit)
access : read-write
Enumeration:
0 : noeffect0
1 : noeffect1
2 : noeffect2
3 : noeffect3
End of enumeration elements list.
TXTRIMHPAVNCAS : TXTRIMHPAVNCAS
bits : 8 - 10 (3 bit)
access : read-write
Enumeration:
0 : ognd1p50
1 : ognd1p55
2 : ognd1p60
3 : ognd1p65
4 : ognd1p70
5 : ognd1p75
6 : ognd1p80
7 : ognd1p85
End of enumeration elements list.
TXTRIMHPAVPCAS : TXTRIMHPAVPCAS
bits : 11 - 13 (3 bit)
access : read-write
Enumeration:
0 : ovdd1p30
1 : ovdd1p35
2 : ovdd1p40
3 : ovdd1p45
4 : ovdd1p50
5 : ovdd1p55
6 : ovdd1p60
7 : ovdd1p65
End of enumeration elements list.
address_offset : 0x128 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXTRIMCLKGENDUTYN : TXTRIMCLKGENDUTYN
bits : 0 - 3 (4 bit)
access : read-write
Enumeration:
0 : pc50_plus_0000ps
1 : pc50_plus_2p40ps
2 : pc50_plus_5p00ps
3 : pc50_plus_7p20ps
4 : pc50_plus_10p8ps
5 : pc50_plus_13p6ps
6 : pc50_plus_17p1ps
7 : pc50_plus_21p9ps
8 : pc50_plus_28p1ps
9 : pc50_plus_36p3ps
10 : pc50_plus_47p3ps
11 : pc50_plus_62p0ps
12 : pc50_plus_0110ps
13 : pc50_plus_0211ps
14 : pc50_plus_0304ps
15 : pc50_plus_0450ps
End of enumeration elements list.
TXTRIMCLKGENDUTYP : TXTRIMCLKGENDUTYP
bits : 4 - 7 (4 bit)
access : read-write
Enumeration:
0 : pc50_plus_0000ps
1 : pc50_plus_2p40ps
2 : pc50_plus_5p00ps
3 : pc50_plus_7p20ps
4 : pc50_plus_10p8ps
5 : pc50_plus_13p6ps
6 : pc50_plus_17p1ps
7 : pc50_plus_21p9ps
8 : pc50_plus_28p1ps
9 : pc50_plus_36p3ps
10 : pc50_plus_47p3ps
11 : pc50_plus_62p0ps
12 : pc50_plus_0110ps
13 : pc50_plus_0211ps
14 : pc50_plus_304ps
15 : pc50_plus_450ps
End of enumeration elements list.
TXTRIMCLKGENNOVFALL : TXTRIMCLKGENNOVFALL
bits : 8 - 11 (4 bit)
access : read-write
Enumeration:
0 : tnov_0052ps
1 : tnov_0070ps
2 : tnov_0097ps
3 : tnov_0111ps
4 : tnov_0120ps
5 : tnov_0131ps
6 : tnov_0143ps
7 : tnov_0158ps
8 : tnov_0175ps
9 : tnov_0196ps
10 : tnov_0221ps
11 : tnov_0251ps
12 : tnov_0335ps
13 : tnov_0466ps
14 : tnov_0677ps
15 : tnov_1025ps
End of enumeration elements list.
TXTRIMCLKGENNOVRISE : TXTRIMCLKGENNOVRISE
bits : 12 - 15 (4 bit)
access : read-write
Enumeration:
0 : tnov_0053ps
1 : tnov_0073ps
2 : tnov_0102ps
3 : tnov_0116ps
4 : tnov_0125ps
5 : tnov_0136ps
6 : tnov_0149ps
7 : tnov_0164ps
8 : tnov_0181ps
9 : tnov_0203ps
10 : tnov_0230ps
11 : tnov_0262ps
12 : tnov_0353ps
13 : tnov_0495ps
14 : tnov_0723ps
15 : tnov_1099ps
End of enumeration elements list.
TXTRIMDRVEDGENN : TXTRIMDRVEDGENN
bits : 16 - 19 (4 bit)
access : read-write
Enumeration:
0 : tedge_0103ps
1 : tedge_0110ps
2 : tedge_0118ps
3 : tedge_0125ps
4 : tedge_0137ps
5 : tedge_0159ps
6 : tedge_0178ps
7 : tedge_0203ps
8 : tedge_0238ps
9 : tedge_0288ps
10 : tedge_0357ps
11 : tedge_0457ps
12 : tedge_0604ps
13 : tedge_0828ps
14 : tedge_1186ps
15 : tedge_1793ps
End of enumeration elements list.
TXTRIMDRVEDGENP : TXTRIMDRVEDGENP
bits : 20 - 23 (4 bit)
access : read-write
Enumeration:
0 : tedge_0103ps
1 : tedge_0110ps
2 : tedge_0118ps
3 : tedge_0125ps
4 : tedge_0137ps
5 : tedge_0159ps
6 : tedge_0178ps
7 : tedge_0203ps
8 : tedge_0238ps
9 : tedge_0288ps
10 : tedge_0357ps
11 : tedge_0457ps
12 : tedge_0604ps
13 : tedge_0828ps
14 : tedge_1186ps
15 : tedge_1793ps
End of enumeration elements list.
TXTRIMDRVEDGEPN : TXTRIMDRVEDGEPN
bits : 24 - 27 (4 bit)
access : read-write
Enumeration:
0 : tedge_0103ps
1 : tedge_0110ps
2 : tedge_0118ps
3 : tedge_0125ps
4 : tedge_0137ps
5 : tedge_0159ps
6 : tedge_0178ps
7 : tedge_0203ps
8 : tedge_0238ps
9 : tedge_0288ps
10 : tedge_0357ps
11 : tedge_0457ps
12 : tedge_0604ps
13 : tedge_0828ps
14 : tedge_1186ps
15 : tedge_1793ps
End of enumeration elements list.
TXTRIMDRVEDGEPP : TXTRIMDRVEDGEPP
bits : 28 - 31 (4 bit)
access : read-write
Enumeration:
0 : tedge_0103ps
1 : tedge_0110ps
2 : tedge_0118ps
3 : tedge_0125ps
4 : tedge_0137ps
5 : tedge_0159ps
6 : tedge_0179ps
7 : tedge_0203ps
8 : tedge_0238ps
9 : tedge_0288ps
10 : tedge_0357ps
11 : tedge_0457ps
12 : tedge_0604ps
13 : tedge_0828ps
14 : tedge_1186ps
15 : tedge_1793ps
End of enumeration elements list.
No Description
address_offset : 0x12C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXTRIMDREGBLEED : TXTRIMDREGBLEED
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : bleed_0uA
1 : bleed_140uA
2 : bleed_280uA
3 : bleed_420uA
End of enumeration elements list.
TXTRIMDREGBLEEDAUTO : TXTRIMDREGBLEEDAUTO
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
TXTRIMOREGBLEEDAUTO : TXTRIMOREGBLEEDAUTO
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : disable_bleed_auto
1 : enable_bleed_auto
End of enumeration elements list.
TXTRIMDREGFB : TXTRIMDREGFB
bits : 4 - 5 (2 bit)
access : read-write
Enumeration:
0 : v1p222
1 : v1p276
2 : v1p346
3 : v1p436
End of enumeration elements list.
TXTRIMOREGFB : TXTRIMOREGFB
bits : 6 - 9 (4 bit)
access : read-write
Enumeration:
0 : v1p340
1 : v1p491
2 : v1p641
3 : v1p791
4 : v1p941
5 : v2p091
6 : v2p241
7 : v2p391
8 : v2p541
9 : v2p691
10 : v2p841
11 : v2p991
12 : v3p141
End of enumeration elements list.
TXTRIMDREG : TXTRIMDREG
bits : 10 - 12 (3 bit)
access : read-write
Enumeration:
0 : v1p212
1 : v1p257
2 : v1p301
3 : v1p346
4 : v1p391
5 : v1p436
6 : v1p481
7 : v1p526
End of enumeration elements list.
TXTRIMOREG : TXTRIMOREG
bits : 13 - 16 (4 bit)
access : read-write
Enumeration:
0 : v1p420
1 : v1p448
2 : v1p475
3 : v1p503
4 : v1p531
5 : v1p558
6 : v1p586
7 : v1p613
8 : v1p641
9 : v1p668
10 : v1p696
11 : v1p723
12 : v1p751
13 : v1p778
14 : v1p806
15 : v1p833
End of enumeration elements list.
TXTRIMRREG : TXTRIMRREG
bits : 17 - 20 (4 bit)
access : read-write
Enumeration:
0 : v1p354
1 : v1p380
2 : v1p406
3 : v1p432
4 : v1p458
5 : v1p484
6 : v1p510
7 : v1p536
8 : v1p562
9 : v1p588
10 : v1p614
11 : v1p640
12 : v1p666
13 : v1p692
14 : v1p707
15 : v1p708
End of enumeration elements list.
TXTRIMDREGPSR : TXTRIMDREGPSR
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : disable_psrr_boost
1 : enable_psrr_boost
End of enumeration elements list.
TXTRIMOREGPSR : TXTRIMOREGPSR
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
0 : disable_psrr_cancellation
1 : enable_psrr_cancellation
End of enumeration elements list.
TXTRIMDREGSLICES : TXTRIMDREGSLICES
bits : 23 - 24 (2 bit)
access : read-write
Enumeration:
0 : slice_1x
1 : slice_2x
2 : slice_3x
3 : slice_4x
End of enumeration elements list.
TXTRIMOREGSLICES : TXTRIMOREGSLICES
bits : 25 - 26 (2 bit)
access : read-write
Enumeration:
0 : enable_oreg
1 : not_valid1
2 : not_valid2
3 : not_valid3
End of enumeration elements list.
TXTRIMDREGMOREBW : TXTRIMDREGMOREBW
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
0 : disable_extra_bw
1 : enable_extra_bw
End of enumeration elements list.
TXTRIMOREGMOREBW : TXTRIMOREGMOREBW
bits : 28 - 28 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
No Description
address_offset : 0x130 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXTRIMXPAVNBDRV : TXTRIMXPAVNBDRV
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : vnb_plus_0p60
1 : vnb_plus_0p65
2 : vnb_plus_0p70
3 : vnb_plus_0p75
End of enumeration elements list.
TXTRIMXPAVPBDRV : TXTRIMXPAVPBDRV
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : vpb_plus_0p60
1 : vpb_plus_0p65
2 : vpb_plus_0p70
3 : vpb_plus_0p75
End of enumeration elements list.
TXTRIMXPAVXSCURRENT : TXTRIMXPAVXSCURRENT
bits : 4 - 7 (4 bit)
access : read-write
Enumeration:
0 : m1p75db
1 : m1p50db
2 : m1p25db
3 : m1p00db
4 : m0p75db
5 : m0p50db
6 : m0p25db
7 : p00db
8 : p0p25db
9 : p0p50db
10 : p0p75db
11 : p1p00db
12 : p1p25db
13 : p1p50db
14 : p1p75db
15 : p2p00db
End of enumeration elements list.
TXXPAVXSCURRENTCOARSE : TXXPAVXSCURRENTCOARSE
bits : 8 - 12 (5 bit)
access : read-write
Enumeration:
0 : rep01x
1 : rep02x
2 : rep03x
3 : rep04x
4 : rep05x
5 : rep06x
6 : rep07x
7 : rep08x
8 : rep09x
9 : rep10x
10 : rep11x
11 : rep12x
12 : rep13x
13 : rep14x
14 : rep15x
15 : rep16x
16 : rep17x
17 : rep18x
18 : rep19x
19 : rep20x
20 : rep21x
21 : rep22x
22 : rep23x
23 : rep24x
24 : rep25x
25 : rep26x
26 : rep27x
27 : rep28x
28 : rep29x
29 : rep30x
30 : rep31x
31 : rep32x
End of enumeration elements list.
TXXPAVXSCURRENTCOARSEMIN : TXXPAVXSCURRENTCOARSEMIN
bits : 13 - 14 (2 bit)
access : read-write
Enumeration:
0 : imin20u
1 : imin10u
2 : imin05u
3 : imin2p5u
End of enumeration elements list.
TXXPAVXSCURRENTFINE : TXXPAVXSCURRENTFINE
bits : 15 - 18 (4 bit)
access : read-write
Enumeration:
0 : imax200u
1 : imax245u
2 : imax293u
3 : imax360u
4 : imax400u
5 : imax800u
6 : imax1200u
7 : imax1600u
8 : classd
End of enumeration elements list.
TXXPAVXSCURRENTSELHPA : TXXPAVXSCURRENTSELHPA
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
0 : lpa
1 : hpa
End of enumeration elements list.
TXVXSCURRENTVREFN : TXVXSCURRENTVREFN
bits : 20 - 21 (2 bit)
access : read-write
Enumeration:
0 : ognd0p825
1 : ognd1p075
2 : ognd1p325
3 : ognd1p575
End of enumeration elements list.
TXVXSCURRENTVREFP : TXVXSCURRENTVREFP
bits : 22 - 23 (2 bit)
access : read-write
Enumeration:
0 : ovdd0p825
1 : ovdd1p075
2 : ovdd1p325
3 : ovdd1p575
End of enumeration elements list.
No Description
address_offset : 0x134 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXVNSRAIL : TXVNSRAIL
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
TXVPSRAIL : TXVPSRAIL
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
TXTRIMXPAVNS : TXTRIMXPAVNS
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : ognd1p07
1 : ognd1p12
2 : ognd1p18
3 : ognd1p25
4 : ognd1p34
5 : ognd1p43
6 : ognd1p53
7 : ognd1p63
End of enumeration elements list.
TXTRIMXPAVPS : TXTRIMXPAVPS
bits : 5 - 7 (3 bit)
access : read-write
Enumeration:
0 : ovdd1p03
1 : ovdd1p08
2 : ovdd1p14
3 : ovdd1p19
4 : ovdd1p24
5 : ovdd1p30
6 : ovdd1p40
7 : ovdd1p50
End of enumeration elements list.
address_offset : 0x138 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXOREGBYPASS : TXOREGBYPASS
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
TXDREGBYPASS : TXDREGBYPASS
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : disable_bypass
1 : enable_bypass
End of enumeration elements list.
TXRREGBYPASS : TXRREGBYPASS
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : not_bypass
1 : bypass
End of enumeration elements list.
TXPDNVDDPA : TXPDNVDDPA
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : not_pull_down_ovdd
1 : pull_down_ovdd
End of enumeration elements list.
No Description
address_offset : 0x13C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXSTRIPE : TXSTRIPE
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
0 : on_stripe_0
12 : on_stripe_12
End of enumeration elements list.
TXSLICE : TXSLICE
bits : 5 - 7 (3 bit)
access : read-write
Enumeration:
0 : on_0_slice
1 : on_1_slices
2 : on_2_slices
3 : NA
End of enumeration elements list.
TXDRVSLICE : TXDRVSLICE
bits : 9 - 11 (3 bit)
access : read-write
TXANARAMPODEV : TXANARAMPODEV
bits : 13 - 17 (5 bit)
access : read-write
TXANARAMPDRVFF : TXANARAMPDRVFF
bits : 18 - 22 (5 bit)
access : read-write
No Description
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FORCEDISABLE : Force Radio Disable
bits : 0 - 0 (1 bit)
access : read-write
PRSTXEN : PRS TX Enable
bits : 1 - 1 (1 bit)
access : read-write
TXAFTERRX : TX After RX
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : X0
TX will not be started automatically.
1 : X1
A transition to TX is automatically started when a received frame is accepted by the FRC.
End of enumeration elements list.
PRSMODE : PRS RXEN Mode
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : DIRECT
The PRS signal is used directly
1 : PULSE
The PRS signal is used as an RX enable pulse
End of enumeration elements list.
PRSCLR : PRS RXEN Clear
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : RXSEARCH
The PRS RXEN signal is cleared when the RSM state enters RXSEARCH
1 : PRSCH
The Selected PRS channel in PRSCLRSEL is used as a disable pulse
End of enumeration elements list.
TXPOSTPONE : TX Postpone
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : X0
In the TX state transmit data is output.
1 : X1
In the TX state an unmodulated carrier is output until this bit is cleared.
End of enumeration elements list.
ACTIVEPOL : ACTIVE signal polarity
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
0 : X0
Active low
1 : X1
Active high
End of enumeration elements list.
PAENPOL : PAEN signal polarity
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0 : X0
Active low
1 : X1
Active high
End of enumeration elements list.
LNAENPOL : LNAEN signal polarity
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
0 : X0
Active low
1 : X1
Active high
End of enumeration elements list.
PRSRXDIS : PRS RX Disable
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
0 : X0
PRS will not disable RX
1 : X1
The channel selected by PRSRXDISSEL will generate a disable RX pulse
End of enumeration elements list.
PRSFORCETX : PRS Force RX
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : X0
PRS will not force TX
1 : X1
The channel selected by PRSFORCETXSEL will generate a force TX pulse
End of enumeration elements list.
SEQRESET : SEQ reset
bits : 24 - 24 (1 bit)
access : write-only
EXITSHUTDOWNDIS : Exit SHUTDOWN state Disable
bits : 25 - 25 (1 bit)
access : read-write
CPUWAITDIS : SEQ CPU Wait Disable
bits : 26 - 26 (1 bit)
access : read-write
SEQCLKDIS : SEQ Clk Disable
bits : 27 - 27 (1 bit)
access : read-write
RXOFDIS : Switch to RXOVERFLOW Disable
bits : 28 - 28 (1 bit)
access : read-write
No Description
address_offset : 0x140 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXANARAMPDRVBW : TXANARAMPDRVBW
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : drv_ramp_bw_500k
1 : drv_ramp_bw_1meg
2 : drv_ramp_bw_2meg
3 : drv_ramp_bw_4meg
End of enumeration elements list.
TXANARAMPDRVEN : TXANARAMPDRVEN
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : ana_ramp_drv_off
1 : tana_ramp_drv_on
End of enumeration elements list.
TXANARAMPODEVBW : TXANARAMPODEVBW
bits : 3 - 4 (2 bit)
access : read-write
Enumeration:
0 : odev_ramp_res105k
1 : odev_ramp_res035k
2 : odev_ramp_res015k
3 : odev_ramp_res005k
End of enumeration elements list.
TXANARAMPODEVEN : TXANARAMPODEVEN
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ana_ramp_odev_off
1 : ana_ramp_odev_on
End of enumeration elements list.
TXBYPASSRAMPCLK : TXBYPASSRAMPCLK
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : use_ramp_clk
1 : bypass_ramp_clk
End of enumeration elements list.
TXMODEPHASEFLIP : TXMODEPHASEFLIP
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
TXPHASEDIGITAL : TXPHASEDIGITAL
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0 : phase0
1 : phase180
End of enumeration elements list.
TXRESETPAPOWER : TXRESETPAPOWER
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
0 : no_reset
1 : reset
End of enumeration elements list.
TXUNMUTEENDRVFF : TXUNMUTEENDRVFF
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
0 : driver_off
1 : driver_on
End of enumeration elements list.
address_offset : 0x148 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PGACTUNE : PGACTUNE
bits : 0 - 3 (4 bit)
access : read-write
Enumeration:
0 : cfb_0p7
7 : cfb_nominal
15 : cfb_1p32
End of enumeration elements list.
PGADISANTILOCK : PGADISANTILOCK
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : antilock_enable
1 : antilock_disable
End of enumeration elements list.
PGAVCMOUTTRIM : PGAVCMOUTTRIM
bits : 5 - 7 (3 bit)
access : read-write
Enumeration:
0 : vcm_out_0p4
1 : vcm_out_0p45
2 : vcm_out_0p5
3 : vcm_out_0p55
4 : vcm_out_0p6
5 : vcm_out_0p65
6 : vcm_out_0p7
7 : vcm_out_0p75
End of enumeration elements list.
PGAVLDOTRIM : PGAVLDOTRIM
bits : 8 - 10 (3 bit)
access : read-write
Enumeration:
0 : vdda_1p15
1 : vdda_1p2
2 : vdda_1p25
3 : vdda_1p3
4 : vdda_1p35
5 : vdda_1p4
6 : vdda_1p5
7 : vdda_1p55
End of enumeration elements list.
address_offset : 0x14C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PGAOFFNCALI : PGAOFFNCALI
bits : 0 - 5 (6 bit)
access : read-write
Enumeration:
0 : offset_m_300mv
63 : offset_p_300mv
End of enumeration elements list.
PGAOFFNCALQ : PGAOFFNCALQ
bits : 8 - 13 (6 bit)
access : read-write
Enumeration:
0 : offset_m_300mv
63 : offset_p_300mv
End of enumeration elements list.
PGAOFFPCALI : PGAOFFPCALI
bits : 16 - 21 (6 bit)
access : read-write
Enumeration:
0 : offset_m_300mv
63 : offset_p_300mv
End of enumeration elements list.
PGAOFFPCALQ : PGAOFFPCALQ
bits : 24 - 29 (6 bit)
access : read-write
Enumeration:
0 : offset_m_300mv
63 : offset_p_300mv
End of enumeration elements list.
address_offset : 0x150 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PGABWMODE : PGABWMODE
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : bw_5MHz
1 : bw_2p5MHz
2 : bw_625kHz
3 : bw_1p25MHz
End of enumeration elements list.
PGAENBIAS : PGAENBIAS
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : bias_disable
1 : bias_enable
End of enumeration elements list.
PGAENGHZ : PGAENGHZ
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : ghz_disable
1 : ghz_enable
End of enumeration elements list.
PGAENLATCHI : PGAENLATCHI
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : pkd_latch_i_disable
1 : pkd_latch_i_enable
End of enumeration elements list.
PGAENLATCHQ : PGAENLATCHQ
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : pkd_latch_q_disable
1 : pkd_latch_q_enable
End of enumeration elements list.
PGAENLDOLOAD : PGAENLDOLOAD
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
0 : disable_ldo_load
1 : enable_ldo_load
End of enumeration elements list.
PGAENPGAI : PGAENPGAI
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
0 : pgai_disable
1 : pgai_enable
End of enumeration elements list.
PGAENPGAQ : PGAENPGAQ
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
0 : pgaq_disable
1 : pgaq_enable
End of enumeration elements list.
PGAENPKD : PGAENPKD
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
0 : pkd_disable
1 : pkd_enable
End of enumeration elements list.
PGAENRCMOUT : PGAENRCMOUT
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
0 : rcm_out_disable
1 : rcm_out_enable
End of enumeration elements list.
PGAPOWERMODE : PGAPOWERMODE
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0 : pm_typ
1 : pm_0p9
2 : pm_1p2
3 : pm_0p8
End of enumeration elements list.
PGATHRPKDLOSEL : PGATHRPKDLOSEL
bits : 16 - 19 (4 bit)
access : read-write
Enumeration:
0 : vref50mv
1 : vref75mv
2 : vref100mv
3 : vref125mv
4 : vref150mv
5 : vref175mv
6 : vref200mv
7 : vref225mv
8 : vref250mv
9 : vref275mv
10 : vref300mv
End of enumeration elements list.
PGATHRPKDHISEL : PGATHRPKDHISEL
bits : 20 - 23 (4 bit)
access : read-write
Enumeration:
0 : vref50mv
1 : vref75mv
2 : vref100mv
3 : vref125mv
4 : verf150mv
5 : vref175mv
6 : vref200mv
7 : vref225mv
8 : vref250mv
9 : vref275mv
10 : vref300mv
End of enumeration elements list.
address_offset : 0x154 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RFBIASCALBIAS : RFBIASCALBIAS
bits : 0 - 5 (6 bit)
access : read-write
RFBIASCALTC : RFBIASCALTC
bits : 8 - 13 (6 bit)
access : read-write
RFBIASCALVREF : RFBIASCALVREF
bits : 16 - 21 (6 bit)
access : read-write
RFBIASCALVREFSTARTUP : RFBIASCALVREFSTARTUP
bits : 24 - 29 (6 bit)
access : read-write
address_offset : 0x158 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RFBIASDISABLEBOOTSTRAP : RFBIASDISABLEBOOTSTRAP
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : enable_startup
1 : disable_startup
End of enumeration elements list.
RFBIASLDOHIGHCURRENT : RFBIASLDOHIGHCURRENT
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : low_current
1 : high_current
End of enumeration elements list.
RFBIASNONFLASHMODE : RFBIASNONFLASHMODE
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : flash_process
1 : non_flash_process
End of enumeration elements list.
RFBIASSTARTUPCORE : RFBIASSTARTUPCORE
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : default
1 : force_start
End of enumeration elements list.
RFBIASSTARTUPSUPPLY : RFBIASSTARTUPSUPPLY
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : default
1 : forc_start
End of enumeration elements list.
RFBIASLDOVREFTRIM : RFBIASLDOVREFTRIM
bits : 16 - 19 (4 bit)
access : read-write
Enumeration:
0 : vref_v0p800
1 : vref_v0p813
2 : vref_v0p825
3 : vref_v0p837
4 : vref_v0p850
5 : vref_v0p863
6 : vref_v0p875
7 : vref_v0p887
8 : vref_v0p900
9 : vref_v0p913
10 : vref_v0p925
11 : vref_v0p938
12 : vref_v0p950
13 : vref_v0p963
14 : vref_v0p975
15 : vref_v0p988
End of enumeration elements list.
address_offset : 0x15C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PREEN : PREEN
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : powered_off
1 : powered_on
End of enumeration elements list.
PRESTB100UDIS : PRESTB100UDIS
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : i100ua_enabled
1 : i100ua_disabled
End of enumeration elements list.
RFBIASEN : RFBIASEN
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : disable_rfis_vtr
1 : enable_rfis_vtr
End of enumeration elements list.
No Description
address_offset : 0x160 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXEN0 : LNAMIXEN0
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
LNAMIXRFATTDCEN0 : LNAMIXRFATTDCEN0
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : disable_dc
1 : enable_dc
End of enumeration elements list.
LNAMIXRFPKDENRF0 : LNAMIXRFPKDENRF0
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable_path0
End of enumeration elements list.
SYLODIVRLO0SUBGEN : SYLODIVRLO0SUBGEN
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
TXENHPA0 : TXENHPA0
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : hpa0_off
1 : hpa0_on
End of enumeration elements list.
TXENLPA0 : TXENLPA0
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : lpa0_off
1 : lpa0_on
End of enumeration elements list.
TXENVMIDHPA0 : TXENVMIDHPA0
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
TXENVMIDLPA0 : TXENVMIDLPA0
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
No Description
address_offset : 0x164 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNAMIXEN1 : LNAMIXEN1
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
LNAMIXRFATTDCEN1 : LNAMIXRFATTDCEN1
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : disable_dc
1 : enable_dc
End of enumeration elements list.
LNAMIXRFPKDENRF1 : LNAMIXRFPKDENRF1
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable_path1
End of enumeration elements list.
SYLODIVRLO1SUBGEN : SYLODIVRLO1SUBGEN
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
TXENHPA1 : TXENHPA1
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : hpa1_off
1 : hpa1_on
End of enumeration elements list.
TXENLPA1 : TXENLPA1
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : lpa1_off
1 : lpa1_on
End of enumeration elements list.
TXENVMIDHPA1 : TXENVMIDHPA1
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
TXENVMIDLPA1 : TXENVMIDLPA1
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
address_offset : 0x168 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IFADCCAPRESET : IFADCCAPRESET
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : cap_reset_disable
1 : cap_reset_enable
End of enumeration elements list.
IFADCENLDOSERIES : IFADCENLDOSERIES
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : series_ldo_disable
1 : series_ldo_enable
End of enumeration elements list.
IFADCENLDOSHUNT : IFADCENLDOSHUNT
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : shunt_ldo_disable
1 : shunt_ldo_enable
End of enumeration elements list.
LNAMIXENRFPKD : LNAMIXENRFPKD
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
LNAMIXENRFPKDLOTHRESH : LNAMIXENRFPKDLOTHRESH
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
LNAMIXLDOLOWCUR : LNAMIXLDOLOWCUR
bits : 5 - 6 (2 bit)
access : read-write
Enumeration:
0 : regular_mode
1 : low_current_mode
3 : high_current_mode
End of enumeration elements list.
LNAMIXREGLOADEN : LNAMIXREGLOADEN
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
0 : disable_resistor
1 : enable_resistor
End of enumeration elements list.
PGAENLDO : PGAENLDO
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0 : disable_ldo
1 : enable_ldo
End of enumeration elements list.
SYCHPQNC3EN : SYCHPQNC3EN
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
0 : qnc_2
1 : qnc_3
End of enumeration elements list.
SYCHPBIASTRIMBUFRX : SYCHPBIASTRIMBUFRX
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : i_tail_10u
1 : i_tail_20u
End of enumeration elements list.
SYPFDCHPLPENRX : SYPFDCHPLPENRX
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
SYPFDFPWENRX : SYPFDFPWENRX
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
SYVCOVCAPFASTRAMPRX : SYVCOVCAPFASTRAMPRX
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
0 : vcap_fastramp_0
1 : vcap_fastramp_1
End of enumeration elements list.
address_offset : 0x16C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXENDREG : TXENDREG
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : dreg_off
1 : dreg_on
End of enumeration elements list.
TXENOREG : TXENOREG
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : oreg_off
1 : oreg_on
End of enumeration elements list.
TXENOREGBLEED : TXENOREGBLEED
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : oreg_bleed_off
1 : oreg_bleed_on
End of enumeration elements list.
TXENRREG : TXENRREG
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
TXENCLKGEN : TXENCLKGEN
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : clkgen_off
1 : clkgen_on
End of enumeration elements list.
TXENPADDCFORCE : TXENPADDCFORCE
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : dc_force_off
1 : dc_force_on
End of enumeration elements list.
TXENPKDOGND : TXENPKDOGND
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : ognd_pkd_off
1 : ognd_pkd_on
End of enumeration elements list.
TXENPKDOGNDCLK : TXENPKDOGNDCLK
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
0 : pkdognd_clk_off
1 : pkdognd_clki_on
End of enumeration elements list.
TXENPUPDNPROTECT : TXENPUPDNPROTECT
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0 : pupdn_protect_off
1 : pupdn_protect_on
End of enumeration elements list.
TXENRAMPCLK : TXENRAMPCLK
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
0 : disable_ramp_clk
1 : enable_ramp_clk
End of enumeration elements list.
TXENVTRCURRENT : TXENVTRCURRENT
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
TXENXDRVVMID : TXENXDRVVMID
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
TXMODEPMOSOFF : TXMODEPMOSOFF
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
TXMODESE : TXMODESE
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
0 : differential
1 : single_ended
End of enumeration elements list.
SYCHPBIASTRIMBUFTX : SYCHPBIASTRIMBUFTX
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : i_tail_10u
1 : i_tail_20u
End of enumeration elements list.
SYPFDCHPLPENTX : SYPFDCHPLPENTX
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
SYPFDFPWENTX : SYPFDFPWENTX
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
SYVCOVCAPFASTRAMPTX : SYVCOVCAPFASTRAMPTX
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
0 : vcap_fastramp_0
1 : vcap_fastramp_1
End of enumeration elements list.
ENPAPOWER : Override
bits : 30 - 30 (1 bit)
access : read-write
ENPASELSLICE : Override
bits : 31 - 31 (1 bit)
access : read-write
address_offset : 0x174 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SYCHPBIAS : SYCHPBIAS
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0 : bias_0
1 : bias_1
3 : bias_2
7 : bias_3
End of enumeration elements list.
SYCHPCURRRX : SYCHPCURRRX
bits : 3 - 5 (3 bit)
access : read-write
Enumeration:
0 : curr_1p5uA
1 : curr_2p0uA
2 : curr_2p5uA
3 : curr_3p0uA
4 : curr_3p5uA
5 : curr_4p0uA
6 : curr_4p5uA
7 : curr_5p0uA
End of enumeration elements list.
SYCHPCURRTX : SYCHPCURRTX
bits : 6 - 8 (3 bit)
access : read-write
Enumeration:
0 : curr_1p5uA
1 : curr_2p0uA
2 : curr_2p5uA
3 : curr_3p0uA
4 : curr_3p5uA
5 : curr_4p0uA
6 : curr_4p5uA
7 : curr_5p0uA
End of enumeration elements list.
SYCHPLEVNSRC : SYCHPLEVNSRC
bits : 9 - 11 (3 bit)
access : read-write
SYCHPLEVPSRCRX : SYCHPLEVPSRCRX
bits : 12 - 14 (3 bit)
access : read-write
Enumeration:
0 : vsrcp_n105m
1 : vsrcp_n90m
2 : vsrcp_n75m
3 : vsrcp_n60m
4 : vsrcp_n45m
5 : vsrcp_n30m
6 : vsrcp_n15m
7 : vsrcp_n0m
End of enumeration elements list.
SYCHPLEVPSRCTX : SYCHPLEVPSRCTX
bits : 15 - 17 (3 bit)
access : read-write
Enumeration:
0 : vsrcp_n105m
1 : vsrcp_n90m
2 : vsrcp_n75m
3 : vsrcp_n60m
4 : vsrcp_n45m
5 : vsrcp_n30m
6 : vsrcp_n15m
7 : vsrcp_n0m
End of enumeration elements list.
SYCHPSRCENRX : SYCHPSRCENRX
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
SYCHPSRCENTX : SYCHPSRCENTX
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
SYCHPREPLICACURRADJ : SYCHPREPLICACURRADJ
bits : 20 - 22 (3 bit)
access : read-write
Enumeration:
0 : load_8ua
1 : load_16ua
2 : load_20ua
3 : load_28ua
4 : load_24ua
5 : load_32ua
6 : load_36ua
7 : load_44ua
End of enumeration elements list.
SYTRIMCHPREGAMPBIAS : SYTRIMCHPREGAMPBIAS
bits : 23 - 25 (3 bit)
access : read-write
Enumeration:
0 : bias_14uA
1 : bias_20uA
2 : bias_26uA
3 : bias_32uA
4 : bias_38uA
5 : bias_44uA
6 : bias_50uA
7 : bias_56uA
End of enumeration elements list.
SYTRIMCHPREGAMPBW : SYTRIMCHPREGAMPBW
bits : 26 - 27 (2 bit)
access : read-write
Enumeration:
0 : C_000f
1 : C_300f
2 : C_600f
3 : C_900f
End of enumeration elements list.
address_offset : 0x178 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SYLODIVLDOTRIMCORERX : SYLODIVLDOTRIMCORERX
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : RXLO
3 : TXLO
End of enumeration elements list.
SYLODIVLDOTRIMCORETX : SYLODIVLDOTRIMCORETX
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0 : RXLO
3 : TXLO
End of enumeration elements list.
SYLODIVLDOTRIMNDIORX : SYLODIVLDOTRIMNDIORX
bits : 4 - 7 (4 bit)
access : read-write
Enumeration:
0 : vreg_1p08
1 : vreg_1p11
2 : vreg_1p15
3 : vreg_1p18
4 : vreg_1p21
5 : vreg_1p24
6 : vreg_1p27
7 : vreg_1p29
8 : vreg_1p32
9 : vreg_1p34
End of enumeration elements list.
SYLODIVLDOTRIMNDIOTX : SYLODIVLDOTRIMNDIOTX
bits : 8 - 11 (4 bit)
access : read-write
Enumeration:
0 : vreg_1p08
1 : vreg_1p11
2 : vreg_1p15
3 : vreg_1p18
4 : vreg_1p21
5 : vreg_1p24
6 : vreg_1p27
7 : vreg_1p29
8 : vreg_1p32
9 : vreg_1p34
End of enumeration elements list.
SYLODIVSELOUTINVADC : SYLODIVSELOUTINVADC
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
SYLODIVTLOTRIMDELAY : SYLODIVTLOTRIMDELAY
bits : 18 - 20 (3 bit)
access : read-write
SYMMDREPLICA1CURRADJ : SYMMDREPLICA1CURRADJ
bits : 21 - 23 (3 bit)
access : read-write
Enumeration:
0 : load_8ua
1 : load_16u
2 : load_20ua
3 : load_28ua
4 : load_24ua
5 : load_32ua
6 : load_36ua
7 : load_44ua
End of enumeration elements list.
SYMMDREPLICA2CURRADJ : SYMMDREPLICA2CURRADJ
bits : 24 - 26 (3 bit)
access : read-write
Enumeration:
0 : load_32u
1 : load_64u
2 : load_96u
3 : load_128u
4 : load_160u
5 : load_192u
6 : load_224u
7 : load_256u
End of enumeration elements list.
SYTRIMMMDREGAMPBIAS : SYTRIMMMDREGAMPBIAS
bits : 27 - 29 (3 bit)
access : read-write
Enumeration:
0 : bias_14uA
1 : bias_20uA
2 : bias_26uA
3 : bias_32uA
4 : bias_38uA
5 : bias_44uA
6 : bias_50uA
7 : bias_56uA
End of enumeration elements list.
SYTRIMMMDREGAMPBW : SYTRIMMMDREGAMPBW
bits : 30 - 31 (2 bit)
access : read-write
Enumeration:
0 : C_000f
1 : C_300f
2 : C_600f
3 : C_900f
End of enumeration elements list.
address_offset : 0x17C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SYVCOMODEPKD : SYVCOMODEPKD
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0 : t_openloop_0
1 : t_pkdetect_1
End of enumeration elements list.
SYVCOMORECURRENT : SYVCOMORECURRENT
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
0 : more_current_0
1 : more_current_1
End of enumeration elements list.
SYVCOSLOWNOISEFILTER : SYVCOSLOWNOISEFILTER
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
0 : slow_noise_filter_0
1 : slow_noise_filter_1
End of enumeration elements list.
SYVCOVCAPVCM : SYVCOVCAPVCM
bits : 15 - 16 (2 bit)
access : read-write
SYHILOADCHPREG : SYHILOADCHPREG
bits : 24 - 25 (2 bit)
access : read-write
Enumeration:
0 : i_350uA
1 : i_500uA
2 : i_550uA
3 : i_700uA
End of enumeration elements list.
No Description
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FORCESTATE : Force RAC state transition
bits : 0 - 3 (4 bit)
access : read-write
address_offset : 0x180 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SYCHPEN : SYCHPEN
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
SYCHPLPENRX : SYCHPLPENRX
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
SYCHPLPENTX : SYCHPLPENTX
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
SYENCHPREG : SYENCHPREG
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : Disable
1 : Enable
End of enumeration elements list.
SYENCHPREPLICA : SYENCHPREPLICA
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
SYENMMDREG : SYENMMDREG
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : Disable
1 : Enable
End of enumeration elements list.
SYENMMDREPLICA1 : SYENMMDREPLICA1
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
SYENMMDREPLICA2 : SYENMMDREPLICA2
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
0 : Disable
1 : Enable
End of enumeration elements list.
SYENVCOBIAS : SYENVCOBIAS
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0 : en_vco_bias_0
1 : en_vco_bias_1
End of enumeration elements list.
SYENVCOPFET : SYENVCOPFET
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
0 : en_vco_pfet_0
1 : en_vco_pfet_1
End of enumeration elements list.
SYENVCOREG : SYENVCOREG
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
0 : en_vco_reg_0
1 : en_vco_reg_1
End of enumeration elements list.
SYSTARTCHPREG : SYSTARTCHPREG
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
0 : no_fast_startup
1 : fast_startup
End of enumeration elements list.
SYSTARTMMDREG : SYSTARTMMDREG
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
0 : no_fast_startup
1 : fast_startup
End of enumeration elements list.
address_offset : 0x184 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SYLODIVEN : SYLODIVEN
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
SYLODIVLDOBIASEN : SYLODIVLDOBIASEN
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
SYLODIVLDOEN : SYLODIVLDOEN
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
SYLODIVRLOSUBGRADCCLKEN : SYLODIVRLOSUBGRADCCLKEN
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
SYLODIVSMUXDIVEN : SYLODIVSMUXDIVEN
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
SYLODIVTLOSUBGAUXEN : SYLODIVTLOSUBGAUXEN
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
SYLODIVTLOSUBGEN : SYLODIVTLOSUBGEN
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
address_offset : 0x188 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SYMMDDIVRSDIG : SYMMDDIVRSDIG
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : Divideby1
1 : Divideby2
2 : Divideby4
3 : Divideby8
End of enumeration elements list.
SYMMDMODERX : SYMMDMODERX
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : rx_w_swctrl
1 : rx_wo_swctrl
2 : qnc_dsm2
3 : qnc_dsm3
4 : rxlp_wo_swctrl
5 : notuse_5
6 : notuse_6
7 : notuse_7
End of enumeration elements list.
SYMMDMODETX : SYMMDMODETX
bits : 5 - 7 (3 bit)
access : read-write
Enumeration:
0 : rx_w_swctrl
1 : rx_wo_swctrl
2 : qnc_dsm2
3 : qnc_dsm3
4 : rxlp_wo_swctrl
5 : notuse_5
6 : notuse_6
7 : notuse_7
End of enumeration elements list.
No Description
address_offset : 0x18C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SYLODIVRADCDIV : SYLODIVRADCDIV
bits : 10 - 13 (4 bit)
access : read-write
Enumeration:
0 : divide_by_8
1 : divide_by_9
2 : divide_by_10
3 : divide_by_11
4 : divide_by_12
5 : divide_by_13
6 : divide_by_14
7 : divide_by_15
8 : divide_by_16
9 : divide_by_17
10 : divide_by_18
11 : divide_by_19
12 : divide_by_20
13 : divide_by_21
14 : divide_by_22
15 : divide_by_23
End of enumeration elements list.
SYLODIVSMUXDIV : SYLODIVSMUXDIV
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0 : div_by_1
1 : div_by_2
2 : div_by_4
3 : div_by_8
End of enumeration elements list.
No Description
address_offset : 0x190 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIGCLKRETIMEENRETIME : DIGCLKRETIMEENRETIME
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
DIGCLKRETIMEDISRETIME : DIGCLKRETIMEDISRETIME
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : enable_retime
1 : disable_retime
End of enumeration elements list.
DIGCLKRETIMERESETN : DIGCLKRETIMERESETN
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : operate
1 : reset
End of enumeration elements list.
DIGCLKRETIMELIMITH : DIGCLKRETIMELIMITH
bits : 4 - 6 (3 bit)
access : read-write
DIGCLKRETIMELIMITL : DIGCLKRETIMELIMITL
bits : 8 - 10 (3 bit)
access : read-write
No Description
address_offset : 0x194 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DIGCLKRETIMECLKSEL : DIGCLKRETIMECLKSEL
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
0 : use_raw_clk
1 : use_retimed_clk
End of enumeration elements list.
DIGCLKRETIMERESETNLO : DIGCLKRETIMERESETNLO
bits : 1 - 1 (1 bit)
access : read-only
Enumeration:
0 : lo
1 : hi
End of enumeration elements list.
No Description
address_offset : 0x198 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XORETIMEENRETIME : XORETIMEENRETIME
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
XORETIMEDISRETIME : XORETIMEDISRETIME
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : enable_retime
1 : disable_retime
End of enumeration elements list.
XORETIMERESETN : XORETIMERESETN
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : reset
1 : operate
End of enumeration elements list.
XORETIMELIMITH : XORETIMELIMITH
bits : 4 - 6 (3 bit)
access : read-write
XORETIMELIMITL : XORETIMELIMITL
bits : 8 - 10 (3 bit)
access : read-write
No Description
address_offset : 0x19C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
XORETIMECLKSEL : XORETIMECLKSEL
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
0 : use_raw_clk
1 : use_retimed_clk
End of enumeration elements list.
XORETIMERESETNLO : XORETIMERESETNLO
bits : 1 - 1 (1 bit)
access : read-only
Enumeration:
0 : lo
1 : hi
End of enumeration elements list.
No Description
address_offset : 0x1A0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENMANLNAMIXRFATT : Enable RAC Overwite PN
bits : 0 - 0 (1 bit)
access : read-write
ENMANLNAMIXSLICE : Enable RAC Overwite LNA
bits : 1 - 1 (1 bit)
access : read-write
ENMANPGAGAIN : Enable RAC Overwite PGA
bits : 2 - 2 (1 bit)
access : read-write
ENMANIFADCSCALE : Enable RAC Overwite PN
bits : 3 - 3 (1 bit)
access : read-write
MANLNAMIXSLICE0 : RAC Overwite LNA
bits : 4 - 9 (6 bit)
access : read-write
MANLNAMIXSLICE1 : RAC Overwite LNA
bits : 10 - 15 (6 bit)
access : read-write
MANPGAGAIN : RAC Overwite PGA
bits : 20 - 23 (4 bit)
access : read-write
MANIFADCSCALE : RAC Overwite PGA
bits : 24 - 25 (2 bit)
access : read-write
No Description
address_offset : 0x1A4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MANLNAMIXRFATT0 : RAC Overwite PN
bits : 0 - 13 (14 bit)
access : read-write
MANLNAMIXRFATT1 : RAC Overwite PN
bits : 16 - 29 (14 bit)
access : read-write
No Description
address_offset : 0x1A8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IFADCPLLINNIBBLE : IFADCPLLINNIBBLE
bits : 0 - 3 (4 bit)
access : read-write
IFADCPLLLDCNIB : IFADCPLLLDCNIB
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
IFADCPLLLDFNIB : IFADCPLLLDFNIB
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
IFADCPLLLDMNIB : IFADCPLLLDMNIB
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : enable
1 : disable
End of enumeration elements list.
IFADCPLLRDNIBBLE : IFADCPLLRDNIBBLE
bits : 7 - 8 (2 bit)
access : read-write
No Description
address_offset : 0x1AC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IFADCPLLDCOBBCAL : IFADCPLLDCOBBCAL
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0 : Invalid
1 : LSB0p5
2 : LSB1p0
3 : LSB1p5
4 : LSB2p0
5 : LSB2p5
6 : LSB3p0
7 : LSB3p5
End of enumeration elements list.
IFADCPLLDCOTEMPADJ : IFADCPLLDCOTEMPADJ
bits : 3 - 8 (6 bit)
access : read-write
IFADCPLLDCOBIASHALF : IFADCPLLDCOBIASHALF
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
IFADCPLLDCOENABLE : IFADCPLLDCOENABLE
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
IFADCPLLDCOFILTER : IFADCPLLDCOFILTER
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
IFADCPLLDCOFULLRATE : IFADCPLLDCOFULLRATE
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
0 : halfrate
1 : fullrate
End of enumeration elements list.
IFADCPLLDCOMSBCURRENT : IFADCPLLDCOMSBCURRENT
bits : 13 - 16 (4 bit)
access : read-write
No Description
address_offset : 0x1B0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IFADCPLLENBBDET : IFADCPLLENBBDET
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
IFADCPLLENBBXLDET : IFADCPLLENBBXLDET
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
IFADCPLLENBBXMDET : IFADCPLLENBBXMDET
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
IFADCPLLENCFDET : IFADCPLLENCFDET
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
IFADCPLLENROTDET : IFADCPLLENROTDET
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
IFADCPLLSERIEREGENABLE : IFADCPLLSERIEREGENABLE
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
IFADCPLLSHUNTREGENABLE : IFADCPLLSHUNTREGENABLE
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
IFADCPLLENREFBUF : IFADCPLLENREFBUF
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
IFADCPLLENXOBYP : IFADCPLLENXOBYP
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
No Description
address_offset : 0x1B4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IFADCPLLSERIEREGFILTER : IFADCPLLSERIEREGFILTER
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
IFADCPLLSERIEREGVCTRL : IFADCPLLSERIEREGVCTRL
bits : 1 - 3 (3 bit)
access : read-write
Enumeration:
0 : v1p393
1 : v1p370
2 : v1p346
3 : v1p322
4 : v1p298
5 : v1p274
6 : v1p249
7 : v1p225
End of enumeration elements list.
IFADCPLLSHUNTREGICTRL : IFADCPLLSHUNTREGICTRL
bits : 4 - 6 (3 bit)
access : read-write
Enumeration:
0 : cur15uA
1 : cur20uA
2 : cur25uA
3 : cur30uA
4 : cur35uA
5 : cur40uA
6 : cur45uA
7 : cur50uA
End of enumeration elements list.
IFADCPLLSHUNTREGVCTRL : IFADCPLLSHUNTREGVCTRL
bits : 7 - 8 (2 bit)
access : read-write
Enumeration:
0 : v0p987
1 : v1p027
2 : v1p108
3 : v1p148
End of enumeration elements list.
address_offset : 0x1B8 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IFADCPLLOUTNIBBLE : IFADCPLLOUTNIBBLE
bits : 0 - 3 (4 bit)
access : read-only
No Description
address_offset : 0x1BC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXPKDOGNDTHRESH : TXPKDOGNDTHRESH
bits : 0 - 3 (4 bit)
access : read-write
TXPKDOGNDBYPASSLATCH : TXPKDOGNDBYPASSLATCH
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
TXPKDOGNDTYPE : TXPKDOGNDTYPE
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : negative
1 : positive
End of enumeration elements list.
TXPKDOGNDRESET : TXPKDOGNDRESET
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : latch
1 : reset_latch
End of enumeration elements list.
No Description
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STATECHANGE : Radio State Change
bits : 0 - 0 (1 bit)
access : read-write
STIMCMPEV : STIMER Compare Event
bits : 1 - 1 (1 bit)
access : read-write
SEQLOCKUP : SEQ locked up
bits : 2 - 2 (1 bit)
access : read-write
SEQRESETREQ : SEQ reset request
bits : 3 - 3 (1 bit)
access : read-write
SEQ : Sequencer Interrupt Flags
bits : 16 - 23 (8 bit)
access : read-write
No Description
address_offset : 0x1C0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
TXOGNDPKDN : TXOGNDPKDN
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
0 : triped
1 : no_trip
End of enumeration elements list.
TXOGNDPKDP : TXOGNDPKDP
bits : 1 - 1 (1 bit)
access : read-only
Enumeration:
0 : no_trip
1 : tripped
End of enumeration elements list.
No Description
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STATECHANGE : Radio State Change Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write
STIMCMPEV : STIMER Compare Event Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write
SEQLOCKUP : SEQ locked up Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write
SEQRESETREQ : SEQ reset request Interrupt Enable
bits : 3 - 3 (1 bit)
access : read-write
SEQ : Sequencer Flags Interrupt Enable
bits : 16 - 23 (8 bit)
access : read-write
No Description
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MODEN : Modulator enable
bits : 0 - 0 (1 bit)
access : read-write
DEMODEN : Demodulator enable
bits : 1 - 1 (1 bit)
access : read-write
No Description
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STATECHANGESEQ : Radio State Change
bits : 0 - 0 (1 bit)
access : read-write
STIMCMPEVSEQ : STIMER Compare Event
bits : 1 - 1 (1 bit)
access : read-write
DEMODRXREQCLRSEQ : Demod RX request clear
bits : 2 - 2 (1 bit)
access : read-write
PRSEVENTSEQ : SEQ PRS Event
bits : 3 - 3 (1 bit)
access : read-write
STATEOFF : entering STATE_OFF
bits : 16 - 16 (1 bit)
access : read-write
STATERXWARM : entering STATE_RXWARM
bits : 17 - 17 (1 bit)
access : read-write
STATERXSEARCH : entering STATE_RXSEARCH
bits : 18 - 18 (1 bit)
access : read-write
STATERXFRAME : entering STATE_RXFRAME
bits : 19 - 19 (1 bit)
access : read-write
STATERXPD : entering STATE_RXPD
bits : 20 - 20 (1 bit)
access : read-write
STATERX2RX : entering STATE_RX2RX
bits : 21 - 21 (1 bit)
access : read-write
STATERXOVERFLOW : entering STATE_RXOVERFLOW
bits : 22 - 22 (1 bit)
access : read-write
STATERX2TX : entering STATE_RX2TX
bits : 23 - 23 (1 bit)
access : read-write
STATETXWARM : entering STATE_TXWARM
bits : 24 - 24 (1 bit)
access : read-write
STATETX : entering STATE_TX
bits : 25 - 25 (1 bit)
access : read-write
STATETXPD : entering STATE_TXPD
bits : 26 - 26 (1 bit)
access : read-write
STATETX2RX : entering STATE_TX2RX
bits : 27 - 27 (1 bit)
access : read-write
STATETX2TX : entering STATE_TX2TX
bits : 28 - 28 (1 bit)
access : read-write
STATESHUTDOWN : entering STATE_SHUTDOWN
bits : 29 - 29 (1 bit)
access : read-write
No Description
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STATECHANGESEQ : Radio State Change Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write
STIMCMPEVSEQ : STIMER Compare Event Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write
DEMODRXREQCLRSEQ : Demod RX req clr Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write
PRSEVENTSEQ : PRS SEQ EVENT Interrupt Enable
bits : 3 - 3 (1 bit)
access : read-write
STATEOFF : STATE_OFF Interrupt Enable
bits : 16 - 16 (1 bit)
access : read-write
STATERXWARM : STATE_RXWARM Interrupt Enable
bits : 17 - 17 (1 bit)
access : read-write
STATERXSEARCH : STATE_RXSEARC Interrupt Enable
bits : 18 - 18 (1 bit)
access : read-write
STATERXFRAME : STATE_RXFRAME Interrupt Enable
bits : 19 - 19 (1 bit)
access : read-write
STATERXPD : STATE_RXPD Interrupt Enable
bits : 20 - 20 (1 bit)
access : read-write
STATERX2RX : STATE_RX2RX Interrupt Enable
bits : 21 - 21 (1 bit)
access : read-write
STATERXOVERFLOW : STATE_RXOVERFLOW Interrupt Enable
bits : 22 - 22 (1 bit)
access : read-write
STATERX2TX : STATE_RX2TX Interrupt Enable
bits : 23 - 23 (1 bit)
access : read-write
STATETXWARM : STATE_TXWARM Interrupt Enable
bits : 24 - 24 (1 bit)
access : read-write
STATETX : STATE_TX Interrupt Enable
bits : 25 - 25 (1 bit)
access : read-write
STATETXPD : STATE_TXPD Interrupt Enable
bits : 26 - 26 (1 bit)
access : read-write
STATETX2RX : STATE_TX2RX Interrupt Enable
bits : 27 - 27 (1 bit)
access : read-write
STATETX2TX : STATE_TX2TX Interrupt Enable
bits : 28 - 28 (1 bit)
access : read-write
STATESHUTDOWN : STATE_SHUTDOWN Interrupt Enable
bits : 29 - 29 (1 bit)
access : read-write
No Description
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
TXMASK : Transmit Enable Mask
bits : 0 - 7 (8 bit)
access : read-only
No Description
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
STIMER : STIMER Register
bits : 0 - 15 (16 bit)
access : read-only
No Description
address_offset : 0x38 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STIMERCOMP : STIMER Compare Register
bits : 0 - 15 (16 bit)
access : read-write
No Description
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMPACT : STIMER Compare Action
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : WRAP
STIMER wraps when reaching STIMERCOMP
1 : CONTINUE
STIMER continues when reaching STIMERCOMP
End of enumeration elements list.
COMPINVALMODE : STIMER Comp Invalid Mode
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : NEVER
STIMERCOMP is always valid
1 : STATECHANGE
STIMERCOMP is invalidated when the RSM changes state
2 : COMPEVENT
STIMERCOMP is invalidated when an STIMER compare event occurs
3 : STATECOMP
STIMERCOMP is invalidated both when the RSM changes state and when a compare event occurs
End of enumeration elements list.
RELATIVE : STIMER Compare value relative
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : Absolute
The compare value set for stimer is an absolute value.
1 : Relative
The compare value set for stimer is a relative value. It takes the amount of time you set to make compare event happens.
End of enumeration elements list.
STIMERALWAYSRUN : STIMER always Run
bits : 4 - 4 (1 bit)
access : read-write
STIMERDEBUGRUN : STIMER Debug Run
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : X0
STIMER is not running when the Sequencer is halted.
1 : X1
STIMER is running when the Sequencer is halted.
End of enumeration elements list.
STATEDEBUGRUN : FSM state Debug Run
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : X0
FSM keeps unchanged when the Sequencer is halted
1 : X1
FSM keeps going when the Sequencer is halted
End of enumeration elements list.
SWIRQ : SW spare IRQ
bits : 24 - 25 (2 bit)
access : read-write
No Description
address_offset : 0x3E0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SCRATCH0 : SCRATCH0
bits : 0 - 31 (32 bit)
access : read-write
No Description
address_offset : 0x3E4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SCRATCH1 : SCRATCH1
bits : 0 - 31 (32 bit)
access : read-write
No Description
address_offset : 0x3E8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SCRATCH2 : SCRATCH2
bits : 0 - 31 (32 bit)
access : read-write
No Description
address_offset : 0x3EC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SCRATCH3 : SCRATCH3
bits : 0 - 31 (32 bit)
access : read-write
No Description
address_offset : 0x3F0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SCRATCH4 : SCRATCH4
bits : 0 - 31 (32 bit)
access : read-write
No Description
address_offset : 0x3F4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SCRATCH5 : SCRATCH5
bits : 0 - 31 (32 bit)
access : read-write
No Description
address_offset : 0x3F8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SCRATCH6 : SCRATCH6
bits : 0 - 31 (32 bit)
access : read-write
No Description
address_offset : 0x3FC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SCRATCH7 : SCRATCH7
bits : 0 - 31 (32 bit)
access : read-write
No Description
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : Enable peripheral clock to this module
bits : 0 - 0 (1 bit)
access : read-write
No Description
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STIMER : STIMER Prescaler
bits : 0 - 6 (7 bit)
access : read-write
No Description
address_offset : 0x44 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SR0 : Sequencer Storage Register 0
bits : 0 - 31 (32 bit)
access : read-write
No Description
address_offset : 0x48 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SR1 : Sequencer Storage Register 1
bits : 0 - 31 (32 bit)
access : read-write
No Description
address_offset : 0x4C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SR2 : Sequencer Storage Register 2
bits : 0 - 31 (32 bit)
access : read-write
No Description
address_offset : 0x50 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SR3 : Sequencer Storage Register 3
bits : 0 - 31 (32 bit)
access : read-write
No Description
address_offset : 0x54 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STCAL : Systick timer freq cal
bits : 0 - 23 (24 bit)
access : read-write
STSKEW : Systick timer skew
bits : 24 - 24 (1 bit)
access : read-write
No Description
address_offset : 0x58 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WDATA : FRC write data
bits : 0 - 7 (8 bit)
access : read-write
No Description
address_offset : 0x5C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RDATA : FRC read data
bits : 0 - 7 (8 bit)
access : read-only
No Description
address_offset : 0x60 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RADIOEM1PMODE :
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : HWCTRL
Hardware Controls EM1P Request Signal
1 : SWCTRL
Software Controls EM1P Request Signal
End of enumeration elements list.
RADIOEM1PDISSWREQ :
bits : 1 - 1 (1 bit)
access : read-write
MCUEM1PMODE :
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : HWCTRL
Hardware Controls EM1P Request Signal.
1 : SWCTRL
Software Controls EM1P Request Signal
End of enumeration elements list.
MCUEM1PDISSWREQ :
bits : 5 - 5 (1 bit)
access : read-write
RADIOEM1PREQ :
bits : 16 - 16 (1 bit)
access : read-only
RADIOEM1PACK :
bits : 17 - 17 (1 bit)
access : read-only
RADIOEM1PHWREQ :
bits : 18 - 18 (1 bit)
access : read-only
No Description
address_offset : 0x7E8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : Enable Switch
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Disabled
1 : Enabled
End of enumeration elements list.
HALFSWITCH : Halfswitch Mode enable
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : Disabled
1 : Enabled
End of enumeration elements list.
No Description
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWRXEN : SW RX Enable
bits : 0 - 7 (8 bit)
access : read-write
CHANNELBUSYEN : Channel Busy Enable
bits : 8 - 8 (1 bit)
access : read-write
TIMDETEN : Timing Detected Enable
bits : 9 - 9 (1 bit)
access : read-write
PREDETEN : Preamble Detected Enable
bits : 10 - 10 (1 bit)
access : read-write
FRAMEDETEN : Frame Detected Enable
bits : 11 - 11 (1 bit)
access : read-write
DEMODRXREQEN : DEMOD RX Request Enable
bits : 12 - 12 (1 bit)
access : read-write
PRSRXEN : PRS RX Enable
bits : 13 - 13 (1 bit)
access : read-write
No Description
address_offset : 0x98 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VCOSTARTUP : SYVCOFASTSTARTUP
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : fast_start_up_0
1 : fast_start_up_1
End of enumeration elements list.
VCBUFEN : SYLPFVCBUFEN
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
0 : Disabled
1 : Enabled
End of enumeration elements list.
MMDPOWERBALANCEDISABLE : SYMMDPOWERBALANCEENB
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
0 : EnablePowerbleed
1 : DisablePowerBleed
End of enumeration elements list.
LPFBWSEL : LPF bandwidth register selection
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : LPFBWRX
Select LPFBWRX
1 : LPFBWTX
Select LPFBWTX
End of enumeration elements list.
No Description
address_offset : 0x9C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMDLDOVREFTRIM : SYTRIMMMDREGVREF
bits : 10 - 12 (3 bit)
access : read-write
Enumeration:
0 : vref0p5125
1 : vref0p5250
2 : vref0p5375
3 : vref0p5500
4 : vref0p5625
5 : vref0p5750
6 : vref0p5875
7 : vref0p6000
End of enumeration elements list.
CHPLDOVREFTRIM : SYTRIMCHPREGVREF
bits : 24 - 26 (3 bit)
access : read-write
Enumeration:
0 : vref0p6000
1 : vref0p6125
2 : vref0p6250
3 : vref0p6375
4 : vref0p6500
5 : vref0p6625
6 : vref0p6750
7 : vref0p6875
End of enumeration elements list.
No Description
address_offset : 0xA0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VCOAMPLITUDE : SYVCOAMPLOPEN
bits : 0 - 3 (4 bit)
access : read-write
VCODETAMPLITUDERX : SYVCOAMPLPKDRX
bits : 4 - 7 (4 bit)
access : read-write
VCODETAMPLITUDETX : SYVCOAMPLPKDTX
bits : 8 - 11 (4 bit)
access : read-write
No Description
address_offset : 0xB0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PREVSTATE1 : Previous Radio State
bits : 0 - 3 (4 bit)
access : read-only
Enumeration:
0 : OFF
Radio is off
1 : RXWARM
Radio is enabling receiver
2 : RXSEARCH
Radio is listening for incoming frames
3 : RXFRAME
Radio is receiving a frame
4 : RXPD
Radio is powering down receiver and going to OFF state
5 : RX2RX
Radio remains in receive mode after frame reception is completed
6 : RXOVERFLOW
Received data was lost due to full receive buffer
7 : RX2TX
Radio is disabling receiver and enabling transmitter
8 : TXWARM
Radio is enabling transmitter
9 : TX
Radio is transmitting data
10 : TXPD
Radio is powering down transmitter and going to OFF state
11 : TX2RX
Radio is disabling transmitter and enabling reception
12 : TX2TX
Radio is preparing for a transmission after the previous transmission was ended
13 : SHUTDOWN
Radio is powering down receiver and going to OFF state
14 : POR
Radio power-on-reset state
End of enumeration elements list.
PREVSTATE2 : Previous Radio State 2
bits : 4 - 7 (4 bit)
access : read-only
Enumeration:
0 : OFF
Radio is off
1 : RXWARM
Radio is enabling receiver
2 : RXSEARCH
Radio is listening for incoming frames
3 : RXFRAME
Radio is receiving a frame
4 : RXPD
Radio is powering down receiver and going to OFF state
5 : RX2RX
Radio remains in receive mode after frame reception is completed
6 : RXOVERFLOW
Received data was lost due to full receive buffer
7 : RX2TX
Radio is disabling receiver and enabling transmitter
8 : TXWARM
Radio is enabling transmitter
9 : TX
Radio is transmitting data
10 : TXPD
Radio is powering down transmitter and going to OFF state
11 : TX2RX
Radio is disabling transmitter and enabling reception
12 : TX2TX
Radio is preparing for a transmission after the previous transmission was ended
13 : SHUTDOWN
Radio is powering down receiver and going to OFF state
14 : POR
Radio power-on-reset state
End of enumeration elements list.
PREVSTATE3 : Previous Radio State 3
bits : 8 - 11 (4 bit)
access : read-only
Enumeration:
0 : OFF
Radio is off
1 : RXWARM
Radio is enabling receiver
2 : RXSEARCH
Radio is listening for incoming frames
3 : RXFRAME
Radio is receiving a frame
4 : RXPD
Radio is powering down receiver and going to OFF state
5 : RX2RX
Radio remains in receive mode after frame reception is completed
6 : RXOVERFLOW
Received data was lost due to full receive buffer
7 : RX2TX
Radio is disabling receiver and enabling transmitter
8 : TXWARM
Radio is enabling transmitter
9 : TX
Radio is transmitting data
10 : TXPD
Radio is powering down transmitter and going to OFF state
11 : TX2RX
Radio is disabling transmitter and enabling reception
12 : TX2TX
Radio is preparing for a transmission after the previous transmission was ended
13 : SHUTDOWN
Radio is powering down receiver and going to OFF state
14 : POR
Radio power-on-reset state
End of enumeration elements list.
CURRSTATE : Current Radio State
bits : 12 - 15 (4 bit)
access : read-only
Enumeration:
0 : OFF
Radio is off
1 : RXWARM
Radio is enabling receiver
2 : RXSEARCH
Radio is listening for incoming frames
3 : RXFRAME
Radio is receiving a frame
4 : RXPD
Radio is powering down receiver and going to OFF state
5 : RX2RX
Radio remains in receive mode after frame reception is completed
6 : RXOVERFLOW
Received data was lost due to full receive buffer
7 : RX2TX
Radio is disabling receiver and enabling transmitter
8 : TXWARM
Radio is enabling transmitter
9 : TX
Radio is transmitting data
10 : TXPD
Radio is powering down transmitter and going to OFF state
11 : TX2RX
Radio is disabling transmitter and enabling reception
12 : TX2TX
Radio is preparing for a transmission after the previous transmission was ended
13 : SHUTDOWN
Radio is powering down receiver and going to OFF state
14 : POR
Radio power-on-reset state
End of enumeration elements list.
No Description
address_offset : 0xB4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DCCALON : Enable/Disable DCCAL in DEMOD
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
DC ESTI DISABLED
1 : ENABLE
DC ESTI ENABLED
End of enumeration elements list.
DCRSTEN : DC Compensation Filter Reset Enable
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
DC Comp out of Reset
1 : ENABLE
DC Comp in Reset
End of enumeration elements list.
DCESTIEN : DCESTIEN Override for RAC
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
DCESTI Disabled in MODEM
1 : ENABLE
DCESTI Enabled in MODEM
End of enumeration elements list.
DCCALDEC0 : DEC0 Value for DCCAL
bits : 22 - 24 (3 bit)
access : read-write
Enumeration:
0 : DF3
Decimation Factor 0 = 3. Cutoff 0.050 * f
1 : DF4WIDE
Decimation Factor 0 = 4. Cutoff 0.069 * f
2 : DF4NARROW
Decimation Factor 0 = 4. Cutoff 0.037 * f
3 : DF8WIDE
Decimation Factor 0 = 8. Cutoff 0.012 * f
4 : DF8NARROW
Decimation Factor 0 = 8. Cutoff 0.005 * f
End of enumeration elements list.
DCCALDCGEAR : DC COMP GEAR Value for DCCAL
bits : 25 - 27 (3 bit)
access : read-write
No Description
address_offset : 0xB8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PARAMP : PA output level ramping
bits : 8 - 8 (1 bit)
access : read-write
INVRAMPCLK : Invert PA ramping clock
bits : 16 - 16 (1 bit)
access : read-write
DIV2RAMPCLK : Div PA ramping clock by 2
bits : 17 - 17 (1 bit)
access : read-write
RSTDIV2RAMPCLK : Reset Div2 PA ramping clock
bits : 18 - 18 (1 bit)
access : read-write
No Description
address_offset : 0xBC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENAPCSW : software control bit for apc
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
1 : ENABLE
End of enumeration elements list.
AMPCONTROLLIMITSW : software amp_control top limit
bits : 24 - 31 (8 bit)
access : read-write
No Description
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RXMASK : Receive Enable Mask
bits : 0 - 15 (16 bit)
access : read-only
FORCESTATEACTIVE : FSM state force active
bits : 19 - 19 (1 bit)
access : read-only
Enumeration:
0 : X0
No special state transition is currently in progress
1 : X1
A forced state transition is currently in progress
End of enumeration elements list.
TXAFTERFRAMEPEND : TX After Frame Pending
bits : 20 - 20 (1 bit)
access : read-only
Enumeration:
0 : X0
A transmit after frame operation is currently not pending.
1 : X1
A transmit after frame operation is currently pending.
End of enumeration elements list.
TXAFTERFRAMEACTIVE : TX After Frame Active
bits : 21 - 21 (1 bit)
access : read-only
Enumeration:
0 : X0
The currently ongoing TX was not initiated by a TXAFTERFRAME command.
1 : X1
The currently ongoing TX was initiated by a TXAFTERFRAME command.
End of enumeration elements list.
SEQSLEEPING : SEQ in sleeping
bits : 22 - 22 (1 bit)
access : read-only
SEQSLEEPDEEP : SEQ in deep sleep
bits : 23 - 23 (1 bit)
access : read-only
STATE : Radio State
bits : 24 - 27 (4 bit)
access : read-only
Enumeration:
0 : OFF
Radio is off
1 : RXWARM
Radio is enabling receiver
2 : RXSEARCH
Radio is listening for incoming frames
3 : RXFRAME
Radio is receiving a frame
4 : RXPD
Radio is powering down receiver and going to OFF state
5 : RX2RX
Radio remains in receive mode after frame reception is completed
6 : RXOVERFLOW
Received data was lost due to full receive buffer
7 : RX2TX
Radio is disabling receiver and enabling transmitter
8 : TXWARM
Radio is enabling transmitter
9 : TX
Radio is transmitting data
10 : TXPD
Radio is powering down transmitter and going to OFF state
11 : TX2RX
Radio is disabling transmitter and enabling reception
12 : TX2TX
Radio is preparing for a transmission after the previous transmission was ended
13 : SHUTDOWN
Radio is powering down receiver and going to OFF state
14 : POR
Radio power-on-reset state
End of enumeration elements list.
SEQACTIVE : SEQ active
bits : 28 - 28 (1 bit)
access : read-only
TXENS : TXEN Status
bits : 30 - 30 (1 bit)
access : read-only
Enumeration:
0 : X0
TXEN is not set.
1 : X1
TXEN is set.
End of enumeration elements list.
RXENS : RXEN Status
bits : 31 - 31 (1 bit)
access : read-only
Enumeration:
0 : X0
RXEN is not set.
1 : X1
RXEN is set.
End of enumeration elements list.
No Description
address_offset : 0xC0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTDIVLNAMIXEN0 : INTDIVLNAMIXEN0
bits : 0 - 0 (1 bit)
access : read-write
INTDIVLNAMIXENAMP0 : INTDIVLNAMIXENAMP0
bits : 1 - 1 (1 bit)
access : read-write
INTDIVLNAMIXRFATTDCEN0 : INTDIVLNAMIXRFATTDCEN0
bits : 2 - 2 (1 bit)
access : read-write
INTDIVLNAMIXRFPKDENRF0 : INTDIVLNAMIXRFPKDENRF0
bits : 3 - 3 (1 bit)
access : read-write
INTDIVSYLODIVRLO0SUBGEN : INTDIVSYLODIVRLO0SUBGEN
bits : 4 - 4 (1 bit)
access : read-write
INTDIVLNAMIXEN1 : INTDIVLNAMIXEN1
bits : 5 - 5 (1 bit)
access : read-write
INTDIVLNAMIXENAMP1 : INTDIVLNAMIXENAMP1
bits : 6 - 6 (1 bit)
access : read-write
INTDIVLNAMIXRFATTDCEN1 : INTDIVLNAMIXRFATTDCEN1
bits : 7 - 7 (1 bit)
access : read-write
INTDIVLNAMIXRFPKDENRF1 : INTDIVLNAMIXRFPKDENRF1
bits : 8 - 8 (1 bit)
access : read-write
INTDIVSYLODIVRLO1SUBGEN : INTDIVSYLODIVRLO1SUBGEN
bits : 9 - 9 (1 bit)
access : read-write
ANTDIVSTATUS : ANTDIVSTATUS
bits : 10 - 11 (2 bit)
access : read-only
Enumeration:
0 : OFF
Both antenna disabled
1 : ANT1
Antenna 0 enabled
2 : ANT2
Antenna 1 enabled
3 : BOTH
Both Antenna enabled
End of enumeration elements list.
address_offset : 0xC4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AUXADCCLKINVERT : AUXADCCLKINVERT
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Disable_Invert
1 : Enable_Invert
End of enumeration elements list.
AUXADCLDOVREFTRIM : AUXADCLDOVREFTRIM
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : TRIM1p27
1 : TRIM1p3
2 : TRIM1p35
3 : TRIM1p4
End of enumeration elements list.
AUXADCOUTPUTINVERT : AUXADCOUTPUTINVERT
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : Disabled
1 : Enabled
End of enumeration elements list.
AUXADCRCTUNE : AUXADCRCTUNE
bits : 4 - 8 (5 bit)
access : read-write
AUXADCTRIMADCINPUTRES : AUXADCTRIMADCINPUTRES
bits : 9 - 10 (2 bit)
access : read-write
Enumeration:
0 : RES200k
1 : RES250k
2 : RES300k
3 : RES350k
End of enumeration elements list.
AUXADCTRIMCURRINPUTBUF : AUXADCTRIMCURRINPUTBUF
bits : 11 - 12 (2 bit)
access : read-write
Enumeration:
0 : Typ_minus_40pct
1 : Typ_minus_20pct
2 : Typ
3 : Typ_plus_20pct
End of enumeration elements list.
AUXADCTRIMCURROPA1 : AUXADCTRIMCURROPA1
bits : 13 - 14 (2 bit)
access : read-write
Enumeration:
0 : Typ_minus_40pct
1 : Typ_minus_20pct
2 : Typ
3 : Typ_plus_20pct
End of enumeration elements list.
AUXADCTRIMCURROPA2 : AUXADCTRIMCURROPA2
bits : 15 - 16 (2 bit)
access : read-write
Enumeration:
0 : Typ_minus_40pct
1 : Typ_minus_20pct
2 : Typ
3 : Typ_plus_20pct
End of enumeration elements list.
AUXADCTRIMCURRREFBUF : AUXADCTRIMCURRREFBUF
bits : 17 - 18 (2 bit)
access : read-write
Enumeration:
0 : Typ_minus_40pct
1 : Typ_minus_20pct
2 : Typ
3 : Typ_plus_20pct
End of enumeration elements list.
AUXADCTRIMCURRTSENSE : AUXADCTRIMCURRTSENSE
bits : 19 - 20 (2 bit)
access : read-write
Enumeration:
0 : Typ_minus_40pct
1 : Typ_minus_20pct
2 : Typ
3 : Typ_plus_20pct
End of enumeration elements list.
AUXADCTRIMCURRVCMBUF : AUXADCTRIMCURRVCMBUF
bits : 21 - 22 (2 bit)
access : read-write
Enumeration:
0 : Typ_minus_40pct
1 : Typ_minus_20pct
2 : Typ
3 : Typ_plus_20pct
End of enumeration elements list.
AUXADCTRIMLDOHIGHCURRENT : AUXADCTRIMLDOHIGHCURRENT
bits : 23 - 23 (1 bit)
access : read-write
Enumeration:
0 : LowCurrentMode
1 : HighCurrentMode
End of enumeration elements list.
AUXADCTRIMREFP : AUXADCTRIMREFP
bits : 24 - 25 (2 bit)
access : read-write
Enumeration:
0 : REF1p05
1 : REF1p16
2 : REF1p2
3 : REF1p25
End of enumeration elements list.
AUXADCTRIMVREFVCM : AUXADCTRIMVREFVCM
bits : 26 - 27 (2 bit)
access : read-write
Enumeration:
0 : Trim0p6
1 : Trim0p65
2 : Trim0p7
3 : Trim0p75
End of enumeration elements list.
AUXADCTSENSETRIMVBE2 : AUXADCTSENSETRIMVBE2
bits : 28 - 28 (1 bit)
access : read-write
Enumeration:
0 : VBE_16uA
1 : VBE_32uA
End of enumeration elements list.
address_offset : 0xC8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AUXADCENAUXADC : AUXADCENAUXADC
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Disabled
1 : Enabled
End of enumeration elements list.
AUXADCENINPUTBUFFER : AUXADCENINPUTBUFFER
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : Disabled
1 : Enabled
End of enumeration elements list.
AUXADCENLDO : AUXADCENLDO
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : Disabled
1 : Enabled
End of enumeration elements list.
AUXADCENOUTPUTDRV : AUXADCENOUTPUTDRV
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : Disabled
1 : Enabled
End of enumeration elements list.
AUXADCENPMON : AUXADCENPMON
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : Disabled
1 : Enabled
End of enumeration elements list.
AUXADCENRESONDIAGA : AUXADCENRESONDIAGA
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : Disabled
1 : Enabled
End of enumeration elements list.
AUXADCENTSENSE : AUXADCENTSENSE
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : Disabled
1 : Enabled
End of enumeration elements list.
AUXADCENTSENSECAL : AUXADCENTSENSECAL
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
0 : Disabled
1 : Enabled
End of enumeration elements list.
AUXADCINPUTBUFFERBYPASS : AUXADCINPUTBUFFERBYPASS
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0 : Not_Bypassed
1 : Bypassed
End of enumeration elements list.
AUXADCENMEASTHERMISTOR : AUXADCENMEASTHERMISTOR
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
0 : Disabled
1 : Enabled
End of enumeration elements list.
No Description
address_offset : 0xCC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CYCLES : Cycle number to run
bits : 0 - 9 (10 bit)
access : read-write
MUXSEL : Select accumulator
bits : 10 - 11 (2 bit)
access : read-write
CLRCOUNTER : Clear counter
bits : 12 - 12 (1 bit)
access : read-write
CLRFILTER : Clear accumulators
bits : 13 - 13 (1 bit)
access : read-write
address_offset : 0xD0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AUXADCINPUTRESSEL : AUXADCINPUTRESSEL
bits : 0 - 3 (4 bit)
access : read-write
Enumeration:
0 : RES640kOhm
1 : RES320kOhm
2 : RES160kOhm
3 : RES80kOhm
4 : RES40kOhm
5 : RES20kOhm
6 : RES10kOhm
7 : RES5kOhm
8 : RES2p5kOhm
9 : RES1p25kOhm
10 : RES0p6kOhm
11 : RES_switch
End of enumeration elements list.
AUXADCINPUTSELECT : AUXADCINPUTSELECT
bits : 4 - 7 (4 bit)
access : read-write
Enumeration:
0 : SEL0
1 : SEL1
2 : SEL2
3 : SEL3
4 : SEL4
5 : SEL5
6 : SEL6
7 : SEL7
8 : SEL8
9 : SEL9
End of enumeration elements list.
AUXADCPMONSELECT : AUXADCPMONSELECT
bits : 8 - 11 (4 bit)
access : read-write
AUXADCTSENSESELCURR : AUXADCTSENSESELCURR
bits : 16 - 20 (5 bit)
access : read-write
AUXADCRESET : AUXADCRESET
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
0 : Reset_Enabled
1 : Reset_Disabled
End of enumeration elements list.
AUXADCTSENSESELVBE : AUXADCTSENSESELVBE
bits : 25 - 25 (1 bit)
access : read-write
Enumeration:
0 : VBE1
1 : VBE2
End of enumeration elements list.
AUXADCTHERMISTORFREQSEL : AUXADCTHERMISTORFREQSEL
bits : 28 - 31 (4 bit)
access : read-write
Enumeration:
0 : DIV1
1 : DIV2
2 : DIV4
3 : DIV8
4 : DIV16
5 : DIV32
6 : DIV64
7 : DIV128
8 : DIV256
9 : DIV512
10 : DIV1024
End of enumeration elements list.
No Description
address_offset : 0xD4 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AUXADCOUT : AUXADC output
bits : 0 - 27 (28 bit)
access : read-only
address_offset : 0xD8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLKMULTBWCAL : CLKMULTBWCAL
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : bw_1lsb
1 : bw_2lsb
2 : bw_3lsb
3 : bw_4lsb
End of enumeration elements list.
CLKMULTDISICO : CLKMULTDISICO
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : enable
1 : disable
End of enumeration elements list.
CLKMULTENBBDET : CLKMULTENBBDET
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
CLKMULTENBBXLDET : CLKMULTENBBXLDET
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
CLKMULTENBBXMDET : CLKMULTENBBXMDET
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
CLKMULTENCFDET : CLKMULTENCFDET
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
CLKMULTENDITHER : CLKMULTENDITHER
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
CLKMULTENDRVADC : CLKMULTENDRVADC
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
CLKMULTENDRVN : CLKMULTENDRVN
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
CLKMULTENDRVP : CLKMULTENDRVP
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
CLKMULTENDRVRX2P4G : CLKMULTENDRVRX2P4G
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
CLKMULTENFBDIV : CLKMULTENFBDIV
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
CLKMULTENREFDIV : CLKMULTENREFDIV
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
CLKMULTENREG1 : CLKMULTENREG1
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
CLKMULTENREG2 : CLKMULTENREG2
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
CLKMULTENREG3 : CLKMULTENREG3
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
CLKMULTENROTDET : CLKMULTENROTDET
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
CLKMULTENBYPASS40MHZ : CLKMULTENBYPASS40MHZ
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
CLKMULTFREQCAL : CLKMULTFREQCAL
bits : 22 - 23 (2 bit)
access : read-write
Enumeration:
0 : pedes_14uA
1 : pedes_22uA
2 : pedes_30uA
3 : pedes_38uA
End of enumeration elements list.
CLKMULTREG2ADJI : CLKMULTREG2ADJI
bits : 24 - 25 (2 bit)
access : read-write
Enumeration:
0 : I_80uA
1 : I_100uA
2 : I_120uA
3 : I_140uA
End of enumeration elements list.
CLKMULTREG1ADJV : CLKMULTREG1ADJV
bits : 26 - 27 (2 bit)
access : read-write
Enumeration:
0 : v1p28
1 : v1p32
2 : v1p33
3 : v1p38
End of enumeration elements list.
CLKMULTREG2ADJV : CLKMULTREG2ADJV
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0 : v1p03
1 : v1p09
2 : v1p10
3 : v1p16
End of enumeration elements list.
CLKMULTREG3ADJV : CLKMULTREG3ADJV
bits : 30 - 31 (2 bit)
access : read-write
Enumeration:
0 : v1p03
1 : v1p06
2 : v1p07
3 : v1p09
End of enumeration elements list.
address_offset : 0xDC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLKMULTINNIBBLE : CLKMULTINNIBBLE
bits : 0 - 3 (4 bit)
access : read-write
CLKMULTLDFNIB : CLKMULTLDFNIB
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
CLKMULTLDMNIB : CLKMULTLDMNIB
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
CLKMULTRDNIBBLE : CLKMULTRDNIBBLE
bits : 7 - 8 (2 bit)
access : read-write
Enumeration:
0 : quarter_nibble
1 : fine_nibble
2 : moderate_nibble
3 : coarse_nibble
End of enumeration elements list.
CLKMULTLDCNIB : CLKMULTLDCNIB
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
CLKMULTDRVAMPSEL : CLKMULTDRVAMPSEL
bits : 11 - 16 (6 bit)
access : read-write
Enumeration:
0 : off
1 : slide_x1
3 : slide_x2
7 : slide_x3
15 : slide_x4
31 : slide_x5
63 : slide_x6
End of enumeration elements list.
address_offset : 0xE0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLKMULTDIVN : CLKMULTDIVN
bits : 0 - 6 (7 bit)
access : read-write
CLKMULTDIVR : CLKMULTDIVR
bits : 7 - 9 (3 bit)
access : read-write
CLKMULTDIVX : CLKMULTDIVX
bits : 10 - 12 (3 bit)
access : read-write
Enumeration:
0 : div_1
1 : div_2
2 : div_4
3 : div_6
4 : div_8
5 : div10
6 : div12
7 : div14
End of enumeration elements list.
CLKMULTENRESYNC : CLKMULTENRESYNC
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
0 : disable_sync
1 : enable_sync
End of enumeration elements list.
CLKMULTVALID : CLKMULTVALID
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
0 : invalid
1 : valid
End of enumeration elements list.
address_offset : 0xE4 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CLKMULTOUTNIBBLE : CLKMULTOUTNIBBLE
bits : 0 - 3 (4 bit)
access : read-only
CLKMULTACKVALID : CLKMULTACKVALID
bits : 4 - 4 (1 bit)
access : read-only
Enumeration:
0 : invalid
1 : valid
End of enumeration elements list.
address_offset : 0xEC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IFADCCLKSEL : IFADCCLKSEL
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : clk_synth
1 : clk_adcpll
End of enumeration elements list.
IFADCLDOSERIESAMPLVL : IFADCLDOSERIESAMPLVL
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : v1p225
1 : v1p250
2 : v1p275
3 : v1p300
4 : v1p325
5 : v1p350
6 : v1p375
7 : v1p400
End of enumeration elements list.
IFADCLDOSHUNTAMPLVL1 : IFADCLDOSHUNTAMPLVL1
bits : 5 - 7 (3 bit)
access : read-write
Enumeration:
0 : v1p125
1 : v1p150
2 : v1p175
3 : v1p200
4 : v1p225
5 : v1p250
6 : v1p275
7 : v1p300
End of enumeration elements list.
IFADCLDOSHUNTAMPLVL2 : IFADCLDOSHUNTAMPLVL2
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
IFADCLDOSHUNTCURLVL1 : IFADCLDOSHUNTCURLVL1
bits : 9 - 11 (3 bit)
access : read-write
Enumeration:
0 : i55u
1 : i65u
2 : i70u
3 : i85u
4 : i85u2
5 : i95u
6 : i100u
7 : i110u
End of enumeration elements list.
IFADCLDOSHUNTCURLVL2 : IFADCLDOSHUNTCURLVL2
bits : 12 - 14 (3 bit)
access : read-write
Enumeration:
0 : i4u
1 : i4p5u
2 : i5u
3 : i5p5u
4 : i5u2
5 : i5p5u2
6 : i6u
7 : i6p5u
End of enumeration elements list.
IFADCOTACURRENT : IFADCOTACURRENT
bits : 15 - 17 (3 bit)
access : read-write
Enumeration:
0 : i3u
1 : i3p5u
2 : i4u
3 : i4p5u
4 : i4u2
5 : i4p5u2
6 : i5u
7 : i5p5u
End of enumeration elements list.
IFADCREFBUFAMPLVL : IFADCREFBUFAMPLVL
bits : 18 - 20 (3 bit)
access : read-write
Enumeration:
0 : v0p88
1 : v0p91
2 : v0p94
3 : v0p97
4 : v1p00
5 : v1p03
6 : v1p06
7 : v1p09
End of enumeration elements list.
IFADCREFBUFCURLVL : IFADCREFBUFCURLVL
bits : 21 - 23 (3 bit)
access : read-write
Enumeration:
0 : i4u
1 : i4p5u
2 : i5u
3 : i5p5u
4 : i5u2
5 : i5p5u2
6 : i6u
7 : i6p5u
End of enumeration elements list.
IFADCSIDETONEAMP : IFADCSIDETONEAMP
bits : 24 - 26 (3 bit)
access : read-write
Enumeration:
0 : diff_5p68mV
1 : diff_29p1mV
2 : diff_9p73mV
3 : diff_76p9mV
4 : diff_9p68_mV
5 : diff_51_mV
6 : diff_17p2_mV
7 : disable
End of enumeration elements list.
IFADCSIDETONEFREQ : IFADCSIDETONEFREQ
bits : 27 - 29 (3 bit)
access : read-write
Enumeration:
0 : na0
1 : div_128
2 : div_64
3 : div_32
4 : div_16
5 : div_8
6 : div_4
7 : na7
End of enumeration elements list.
IFADCENHALFMODE : IFADCENHALFMODE
bits : 30 - 30 (1 bit)
access : read-write
Enumeration:
0 : full_speed_mode
1 : half_speed_mode
End of enumeration elements list.
address_offset : 0xF0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IFADCVCMLVL : IFADCVCMLVL
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0 : vcm_475mV
1 : vcm_500mV
2 : vcm_525mV
3 : vcm_550mV
4 : vcm_575mV
5 : vcm_600mV
6 : vcm_625mV
7 : cm_650mV
End of enumeration elements list.
IFADCENNEGRES : IFADCENNEGRES
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : disable
1 : enable
End of enumeration elements list.
IFADCNEGRESCURRENT : IFADCNEGRESCURRENT
bits : 4 - 6 (3 bit)
access : read-write
Enumeration:
0 : i1p0u
1 : i1p5u
2 : i2p0u
3 : i2p5u
4 : i2p0u2
5 : i2p5u2
6 : i3p0u
7 : i3p5u
End of enumeration elements list.
IFADCNEGRESVCM : IFADCNEGRESVCM
bits : 7 - 8 (2 bit)
access : read-write
Enumeration:
0 : r210k_x_1uA
1 : r210k_x_1uA2
2 : r100k_x_2uA
3 : r50k_x_3uA
End of enumeration elements list.
IFADCENSUBGMODE : IFADCENSUBGMODELV
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
0 : fullspeed_mode
1 : subg_mode
End of enumeration elements list.
IFADCTZ : IFADCTZ
bits : 10 - 12 (3 bit)
access : read-write
Enumeration:
0 : default_zero
1 : illegal_mode
2 : half_zero
3 : illegal_mode2
4 : quarter_zero
5 : illegal_mode3
6 : illegal_mode4
7 : illegal_mode5
End of enumeration elements list.
IFADCENXOBYPASS : IFADCENXOBYPASS
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
0 : disable_bypass
1 : enable_bypass
End of enumeration elements list.
address_offset : 0xF4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IFADCENRCCAL : IFADCENRCCAL
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : rccal_disable
1 : rccal_enable
End of enumeration elements list.
IFADCTUNERCCALMODE : IFADCTUNERCCALMODE
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : SYmode
1 : ADCmode
End of enumeration elements list.
IFADCTUNERC : IFADCTUNERC
bits : 8 - 12 (5 bit)
access : read-write
IFADCRCCALCOUNTERSTARTVAL : IFADCRCCALCOUNTERSTARTVAL
bits : 16 - 23 (8 bit)
access : read-write
address_offset : 0xF8 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IFADCRCCALOUT : IFADCRCCALOUT
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
0 : lo
1 : hi
End of enumeration elements list.
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