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LESENSE_NS

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :

Registers

IPVERSION

TIMCTRL

CH0_TIMING

CH0_INTERACT

CH0_EVALCFG

CH0_EVALTHRES

CH1_TIMING

CH1_INTERACT

CH1_EVALCFG

CH1_EVALTHRES

CH2_TIMING

CH2_INTERACT

CH2_EVALCFG

CH2_EVALTHRES

CH3_TIMING

CH3_INTERACT

CH3_EVALCFG

CH3_EVALTHRES

PERCTRL

CH4_TIMING

CH4_INTERACT

CH4_EVALCFG

CH4_EVALTHRES

CH5_TIMING

CH5_INTERACT

CH5_EVALCFG

CH5_EVALTHRES

CH6_TIMING

CH6_INTERACT

CH6_EVALCFG

CH6_EVALTHRES

CH7_TIMING

CH7_INTERACT

CH7_EVALCFG

CH7_EVALTHRES

DECCTRL

CH8_TIMING

CH8_INTERACT

CH8_EVALCFG

CH8_EVALTHRES

CH9_TIMING

CH9_INTERACT

CH9_EVALCFG

CH9_EVALTHRES

CH10_TIMING

CH10_INTERACT

CH10_EVALCFG

CH10_EVALTHRES

CH11_TIMING

CH11_INTERACT

CH11_EVALCFG

CH11_EVALTHRES

EVALCTRL

CH12_TIMING

CH12_INTERACT

CH12_EVALCFG

CH12_EVALTHRES

CH13_TIMING

CH13_INTERACT

CH13_EVALCFG

CH13_EVALTHRES

CH14_TIMING

CH14_INTERACT

CH14_EVALCFG

CH14_EVALTHRES

CH15_TIMING

CH15_INTERACT

CH15_EVALCFG

CH15_EVALTHRES

PRSCTRL

ST0_ARC

ST1_ARC

ST2_ARC

ST3_ARC

ST4_ARC

ST5_ARC

ST6_ARC

ST7_ARC

ST8_ARC

ST9_ARC

ST10_ARC

ST11_ARC

ST12_ARC

ST13_ARC

ST14_ARC

ST15_ARC

CMD

ST16_ARC

ST17_ARC

ST18_ARC

ST19_ARC

ST20_ARC

ST21_ARC

ST22_ARC

ST23_ARC

ST24_ARC

ST25_ARC

ST26_ARC

ST27_ARC

ST28_ARC

ST29_ARC

ST30_ARC

ST31_ARC

CHEN

ST32_ARC

ST33_ARC

ST34_ARC

ST35_ARC

ST36_ARC

ST37_ARC

ST38_ARC

ST39_ARC

ST40_ARC

ST41_ARC

ST42_ARC

ST43_ARC

ST44_ARC

ST45_ARC

ST46_ARC

ST47_ARC

SCANRES

ST48_ARC

ST49_ARC

ST50_ARC

ST51_ARC

ST52_ARC

ST53_ARC

ST54_ARC

ST55_ARC

ST56_ARC

ST57_ARC

ST58_ARC

ST59_ARC

ST60_ARC

ST61_ARC

ST62_ARC

ST63_ARC

STATUS

RESCOUNT

RESFIFO

CURCH

EN

DECSTATE

SENSORSTATE

IDLECONF

SYNCBUSY

IF

IEN

SWRST

CFG


IPVERSION

IPVERSION
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IPVERSION IPVERSION read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPVERSION

IPVERSION : IPVERSION
bits : 0 - 31 (32 bit)
access : read-only


TIMCTRL

Timing Control Register
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMCTRL TIMCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AUXPRESC LFPRESC PCPRESC PCTOP STARTDLY AUXSTARTUP

AUXPRESC : Prescaling factor for high frequency tim
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DIV1

High frequency timer is clocked at LESENSEHFCLK/1

1 : DIV2

High frequency timer is clocked at LESENSEHFCLK/2

2 : DIV4

High frequency timer is clocked at LESENSEHFCLK/4

3 : DIV8

High frequency timer is clocked at LESENSEHFCLK/8

End of enumeration elements list.

LFPRESC : Prescaling factor for low frequency time
bits : 4 - 6 (3 bit)
access : read-write

Enumeration:

0 : DIV1

Low frequency timer is clocked with LESENSECLK/1

1 : DIV2

Low frequency timer is clocked with LESENSECLK/2

2 : DIV4

Low frequency timer is clocked with LESENSECLK/4

3 : DIV8

Low frequency timer is clocked with LESENSECLK/8

4 : DIV16

Low frequency timer is clocked with LESENSECLK/16

5 : DIV32

Low frequency timer is clocked with LESENSECLK/32

6 : DIV64

Low frequency timer is clocked with LESENSECLK/64

7 : DIV128

Low frequency timer is clocked with LESENSECLK/128

End of enumeration elements list.

PCPRESC : Period counter prescaling
bits : 8 - 10 (3 bit)
access : read-write

Enumeration:

0 : DIV1

The period counter clock frequency is LESENSECLK/1

1 : DIV2

The period counter clock frequency is LESENSECLK/2

2 : DIV4

The period counter clock frequency is LESENSECLK/4

3 : DIV8

The period counter clock frequency is LESENSECLK/8

4 : DIV16

The period counter clock frequency is LESENSECLK/16

5 : DIV32

The period counter clock frequency is LESENSECLK/32

6 : DIV64

The period counter clock frequency is LESENSECLK/64

7 : DIV128

The period counter clock frequency is LESENSECLK/128

End of enumeration elements list.

PCTOP : Period counter top value
bits : 12 - 19 (8 bit)
access : read-write

STARTDLY : Start delay configuration
bits : 22 - 23 (2 bit)
access : read-write

AUXSTARTUP : AUX startup config
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

0 : PREDEMAND

Request oscillator .5 LESENSECLK cycle before sensing starts

1 : ONDEMAND

Request oscillator at sensing time

End of enumeration elements list.


CH0_TIMING

No Description
address_offset : 0x100 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH0_TIMING CH0_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 13 (8 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 14 - 23 (10 bit)
access : read-write


CH0_INTERACT

No Description
address_offset : 0x104 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH0_INTERACT CH0_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRES EXMODE ALTEX SAMPLECLK EXCLK SETIF OFFSET SAMPLE

THRES : ACMP threshold or DAC data
bits : 0 - 11 (12 bit)
access : read-write

EXMODE : Set GPIO mode
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Disabled

1 : HIGH

Push Pull, GPIO is driven high

2 : LOW

Push Pull, GPIO is driven low

3 : DACOUT

DAC output

End of enumeration elements list.

ALTEX : Use alternative excite pin
bits : 18 - 18 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample d
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

SETIF : Enable interrupt generation
bits : 21 - 23 (3 bit)
access : read-write

Enumeration:

0 : NONE

No interrupt is generated

1 : LEVEL

Set interrupt flag if the sensor triggers.

2 : POSEDGE

Set interrupt flag on positive edge of the sensor state

3 : NEGEDGE

Set interrupt flag on negative edge of the sensor state

4 : BOTHEDGES

Set interrupt flag on both edges of the sensor state

End of enumeration elements list.

OFFSET : OFFSET for IADC/ACMP interaction
bits : 24 - 27 (4 bit)
access : read-write

SAMPLE : Sample mode Selection
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : ACMPCOUNT


1 : ACMP


2 : ADC


3 : ADCDIFF


End of enumeration elements list.


CH0_EVALCFG

No Description
address_offset : 0x108 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH0_EVALCFG CH0_EVALCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECODE COMP STRSAMPLE SCANRESINV MODE

DECODE : Send result to decoder
bits : 2 - 2 (1 bit)
access : read-write

COMP : Select mode for threshold comparison
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : LESS

Comparison evaluates to 1 if sensor data is less than CTRTHRESHOLD, or if the ACMP output is 0

1 : GE

Comparison evaluates to 1 if sensor data is greater than, or equal to CTRTHRESHOLD, or if the ACMP output is 1

End of enumeration elements list.

STRSAMPLE : Enable storing of sensor sample in resul
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Nothing will be stored in the result buffer.

1 : DATA

The sensor sample data will be stored in the result buffer.

2 : DATASRC

The data source, i.e. the channel, will be stored alongside the sensor sample data.

End of enumeration elements list.

SCANRESINV : Enable inversion of result
bits : 6 - 6 (1 bit)
access : read-write

MODE : Configure evaluation mode
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : THRES

Threshold comparison is used to evaluate sensor result

1 : SLIDINGWIN

Sliding window is used to evaluate sensor result

2 : STEPDET

Step detection is used to evaluate sensor result

End of enumeration elements list.


CH0_EVALTHRES

No Description
address_offset : 0x10C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH0_EVALTHRES CH0_EVALTHRES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EVALTHRES

EVALTHRES : Threshold
bits : 0 - 15 (16 bit)
access : read-write


CH1_TIMING

No Description
address_offset : 0x110 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH1_TIMING CH1_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 13 (8 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 14 - 23 (10 bit)
access : read-write


CH1_INTERACT

No Description
address_offset : 0x114 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH1_INTERACT CH1_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRES EXMODE ALTEX SAMPLECLK EXCLK SETIF OFFSET SAMPLE

THRES : ACMP threshold or DAC data
bits : 0 - 11 (12 bit)
access : read-write

EXMODE : Set GPIO mode
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Disabled

1 : HIGH

Push Pull, GPIO is driven high

2 : LOW

Push Pull, GPIO is driven low

3 : DACOUT

DAC output

End of enumeration elements list.

ALTEX : Use alternative excite pin
bits : 18 - 18 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample d
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

SETIF : Enable interrupt generation
bits : 21 - 23 (3 bit)
access : read-write

Enumeration:

0 : NONE

No interrupt is generated

1 : LEVEL

Set interrupt flag if the sensor triggers.

2 : POSEDGE

Set interrupt flag on positive edge of the sensor state

3 : NEGEDGE

Set interrupt flag on negative edge of the sensor state

4 : BOTHEDGES

Set interrupt flag on both edges of the sensor state

End of enumeration elements list.

OFFSET : OFFSET for IADC/ACMP interaction
bits : 24 - 27 (4 bit)
access : read-write

SAMPLE : Sample mode Selection
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : ACMPCOUNT


1 : ACMP


2 : ADC


3 : ADCDIFF


End of enumeration elements list.


CH1_EVALCFG

No Description
address_offset : 0x118 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH1_EVALCFG CH1_EVALCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECODE COMP STRSAMPLE SCANRESINV MODE

DECODE : Send result to decoder
bits : 2 - 2 (1 bit)
access : read-write

COMP : Select mode for threshold comparison
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : LESS

Comparison evaluates to 1 if sensor data is less than CTRTHRESHOLD, or if the ACMP output is 0

1 : GE

Comparison evaluates to 1 if sensor data is greater than, or equal to CTRTHRESHOLD, or if the ACMP output is 1

End of enumeration elements list.

STRSAMPLE : Enable storing of sensor sample in resul
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Nothing will be stored in the result buffer.

1 : DATA

The sensor sample data will be stored in the result buffer.

2 : DATASRC

The data source, i.e. the channel, will be stored alongside the sensor sample data.

End of enumeration elements list.

SCANRESINV : Enable inversion of result
bits : 6 - 6 (1 bit)
access : read-write

MODE : Configure evaluation mode
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : THRES

Threshold comparison is used to evaluate sensor result

1 : SLIDINGWIN

Sliding window is used to evaluate sensor result

2 : STEPDET

Step detection is used to evaluate sensor result

End of enumeration elements list.


CH1_EVALTHRES

No Description
address_offset : 0x11C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH1_EVALTHRES CH1_EVALTHRES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EVALTHRES

EVALTHRES : Threshold
bits : 0 - 15 (16 bit)
access : read-write


CH2_TIMING

No Description
address_offset : 0x120 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH2_TIMING CH2_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 13 (8 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 14 - 23 (10 bit)
access : read-write


CH2_INTERACT

No Description
address_offset : 0x124 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH2_INTERACT CH2_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRES EXMODE ALTEX SAMPLECLK EXCLK SETIF OFFSET SAMPLE

THRES : ACMP threshold or DAC data
bits : 0 - 11 (12 bit)
access : read-write

EXMODE : Set GPIO mode
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Disabled

1 : HIGH

Push Pull, GPIO is driven high

2 : LOW

Push Pull, GPIO is driven low

3 : DACOUT

DAC output

End of enumeration elements list.

ALTEX : Use alternative excite pin
bits : 18 - 18 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample d
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

SETIF : Enable interrupt generation
bits : 21 - 23 (3 bit)
access : read-write

Enumeration:

0 : NONE

No interrupt is generated

1 : LEVEL

Set interrupt flag if the sensor triggers.

2 : POSEDGE

Set interrupt flag on positive edge of the sensor state

3 : NEGEDGE

Set interrupt flag on negative edge of the sensor state

4 : BOTHEDGES

Set interrupt flag on both edges of the sensor state

End of enumeration elements list.

OFFSET : OFFSET for IADC/ACMP interaction
bits : 24 - 27 (4 bit)
access : read-write

SAMPLE : Sample mode Selection
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : ACMPCOUNT


1 : ACMP


2 : ADC


3 : ADCDIFF


End of enumeration elements list.


CH2_EVALCFG

No Description
address_offset : 0x128 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH2_EVALCFG CH2_EVALCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECODE COMP STRSAMPLE SCANRESINV MODE

DECODE : Send result to decoder
bits : 2 - 2 (1 bit)
access : read-write

COMP : Select mode for threshold comparison
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : LESS

Comparison evaluates to 1 if sensor data is less than CTRTHRESHOLD, or if the ACMP output is 0

1 : GE

Comparison evaluates to 1 if sensor data is greater than, or equal to CTRTHRESHOLD, or if the ACMP output is 1

End of enumeration elements list.

STRSAMPLE : Enable storing of sensor sample in resul
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Nothing will be stored in the result buffer.

1 : DATA

The sensor sample data will be stored in the result buffer.

2 : DATASRC

The data source, i.e. the channel, will be stored alongside the sensor sample data.

End of enumeration elements list.

SCANRESINV : Enable inversion of result
bits : 6 - 6 (1 bit)
access : read-write

MODE : Configure evaluation mode
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : THRES

Threshold comparison is used to evaluate sensor result

1 : SLIDINGWIN

Sliding window is used to evaluate sensor result

2 : STEPDET

Step detection is used to evaluate sensor result

End of enumeration elements list.


CH2_EVALTHRES

No Description
address_offset : 0x12C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH2_EVALTHRES CH2_EVALTHRES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EVALTHRES

EVALTHRES : Threshold
bits : 0 - 15 (16 bit)
access : read-write


CH3_TIMING

No Description
address_offset : 0x130 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH3_TIMING CH3_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 13 (8 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 14 - 23 (10 bit)
access : read-write


CH3_INTERACT

No Description
address_offset : 0x134 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH3_INTERACT CH3_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRES EXMODE ALTEX SAMPLECLK EXCLK SETIF OFFSET SAMPLE

THRES : ACMP threshold or DAC data
bits : 0 - 11 (12 bit)
access : read-write

EXMODE : Set GPIO mode
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Disabled

1 : HIGH

Push Pull, GPIO is driven high

2 : LOW

Push Pull, GPIO is driven low

3 : DACOUT

DAC output

End of enumeration elements list.

ALTEX : Use alternative excite pin
bits : 18 - 18 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample d
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

SETIF : Enable interrupt generation
bits : 21 - 23 (3 bit)
access : read-write

Enumeration:

0 : NONE

No interrupt is generated

1 : LEVEL

Set interrupt flag if the sensor triggers.

2 : POSEDGE

Set interrupt flag on positive edge of the sensor state

3 : NEGEDGE

Set interrupt flag on negative edge of the sensor state

4 : BOTHEDGES

Set interrupt flag on both edges of the sensor state

End of enumeration elements list.

OFFSET : OFFSET for IADC/ACMP interaction
bits : 24 - 27 (4 bit)
access : read-write

SAMPLE : Sample mode Selection
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : ACMPCOUNT


1 : ACMP


2 : ADC


3 : ADCDIFF


End of enumeration elements list.


CH3_EVALCFG

No Description
address_offset : 0x138 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH3_EVALCFG CH3_EVALCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECODE COMP STRSAMPLE SCANRESINV MODE

DECODE : Send result to decoder
bits : 2 - 2 (1 bit)
access : read-write

COMP : Select mode for threshold comparison
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : LESS

Comparison evaluates to 1 if sensor data is less than CTRTHRESHOLD, or if the ACMP output is 0

1 : GE

Comparison evaluates to 1 if sensor data is greater than, or equal to CTRTHRESHOLD, or if the ACMP output is 1

End of enumeration elements list.

STRSAMPLE : Enable storing of sensor sample in resul
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Nothing will be stored in the result buffer.

1 : DATA

The sensor sample data will be stored in the result buffer.

2 : DATASRC

The data source, i.e. the channel, will be stored alongside the sensor sample data.

End of enumeration elements list.

SCANRESINV : Enable inversion of result
bits : 6 - 6 (1 bit)
access : read-write

MODE : Configure evaluation mode
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : THRES

Threshold comparison is used to evaluate sensor result

1 : SLIDINGWIN

Sliding window is used to evaluate sensor result

2 : STEPDET

Step detection is used to evaluate sensor result

End of enumeration elements list.


CH3_EVALTHRES

No Description
address_offset : 0x13C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH3_EVALTHRES CH3_EVALTHRES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EVALTHRES

EVALTHRES : Threshold
bits : 0 - 15 (16 bit)
access : read-write


PERCTRL

Peripheral Control Register
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PERCTRL PERCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DACCH0DATA DACSTARTUP DACCONVTRIG ACMP0MODE ACMP1MODE ACMP0INV ACMP1INV

DACCH0DATA : DAC CH0 data selection.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : DACDATA

DAC data is defined by CH0DATA in the DAC interface.

1 : THRES

DAC data is defined by THRES in CHx_INTERACT.

End of enumeration elements list.

DACSTARTUP : DAC startup configuration
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : FULLCYCLE

DAC is started a full LESENSECLK before sensor interaction starts.

1 : HALFCYCLE

DAC is started half a LESENSECLK cycle before sensor interaction starts.

End of enumeration elements list.

DACCONVTRIG : DAC conversion trigger configuration
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

0 : CHANNELSTART

DAC is enabled before every LESENSE channle measurement.

1 : SCANSTART

DAC is only enabled once per scan.

End of enumeration elements list.

ACMP0MODE : ACMP0 mode
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

0 : MUX

LESENSE controls POSSEL of ACMP0

1 : MUXTHRES

LESENSE controls POSSEL and reference divider of ACMP0

End of enumeration elements list.

ACMP1MODE : ACMP1 mode
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

0 : MUX

LESENSE controls the POSSEL of ACMP1

1 : MUXTHRES

LESENSE POSSEL and reference divider of ACMP1

End of enumeration elements list.

ACMP0INV : Invert analog comparator 0 output
bits : 24 - 24 (1 bit)
access : read-write

ACMP1INV : Invert analog comparator 1 output
bits : 25 - 25 (1 bit)
access : read-write


CH4_TIMING

No Description
address_offset : 0x140 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH4_TIMING CH4_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 13 (8 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 14 - 23 (10 bit)
access : read-write


CH4_INTERACT

No Description
address_offset : 0x144 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH4_INTERACT CH4_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRES EXMODE ALTEX SAMPLECLK EXCLK SETIF OFFSET SAMPLE

THRES : ACMP threshold or DAC data
bits : 0 - 11 (12 bit)
access : read-write

EXMODE : Set GPIO mode
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Disabled

1 : HIGH

Push Pull, GPIO is driven high

2 : LOW

Push Pull, GPIO is driven low

3 : DACOUT

DAC output

End of enumeration elements list.

ALTEX : Use alternative excite pin
bits : 18 - 18 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample d
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

SETIF : Enable interrupt generation
bits : 21 - 23 (3 bit)
access : read-write

Enumeration:

0 : NONE

No interrupt is generated

1 : LEVEL

Set interrupt flag if the sensor triggers.

2 : POSEDGE

Set interrupt flag on positive edge of the sensor state

3 : NEGEDGE

Set interrupt flag on negative edge of the sensor state

4 : BOTHEDGES

Set interrupt flag on both edges of the sensor state

End of enumeration elements list.

OFFSET : OFFSET for IADC/ACMP interaction
bits : 24 - 27 (4 bit)
access : read-write

SAMPLE : Sample mode Selection
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : ACMPCOUNT


1 : ACMP


2 : ADC


3 : ADCDIFF


End of enumeration elements list.


CH4_EVALCFG

No Description
address_offset : 0x148 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH4_EVALCFG CH4_EVALCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECODE COMP STRSAMPLE SCANRESINV MODE

DECODE : Send result to decoder
bits : 2 - 2 (1 bit)
access : read-write

COMP : Select mode for threshold comparison
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : LESS

Comparison evaluates to 1 if sensor data is less than CTRTHRESHOLD, or if the ACMP output is 0

1 : GE

Comparison evaluates to 1 if sensor data is greater than, or equal to CTRTHRESHOLD, or if the ACMP output is 1

End of enumeration elements list.

STRSAMPLE : Enable storing of sensor sample in resul
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Nothing will be stored in the result buffer.

1 : DATA

The sensor sample data will be stored in the result buffer.

2 : DATASRC

The data source, i.e. the channel, will be stored alongside the sensor sample data.

End of enumeration elements list.

SCANRESINV : Enable inversion of result
bits : 6 - 6 (1 bit)
access : read-write

MODE : Configure evaluation mode
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : THRES

Threshold comparison is used to evaluate sensor result

1 : SLIDINGWIN

Sliding window is used to evaluate sensor result

2 : STEPDET

Step detection is used to evaluate sensor result

End of enumeration elements list.


CH4_EVALTHRES

No Description
address_offset : 0x14C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH4_EVALTHRES CH4_EVALTHRES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EVALTHRES

EVALTHRES : Threshold
bits : 0 - 15 (16 bit)
access : read-write


CH5_TIMING

No Description
address_offset : 0x150 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH5_TIMING CH5_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 13 (8 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 14 - 23 (10 bit)
access : read-write


CH5_INTERACT

No Description
address_offset : 0x154 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH5_INTERACT CH5_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRES EXMODE ALTEX SAMPLECLK EXCLK SETIF OFFSET SAMPLE

THRES : ACMP threshold or DAC data
bits : 0 - 11 (12 bit)
access : read-write

EXMODE : Set GPIO mode
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Disabled

1 : HIGH

Push Pull, GPIO is driven high

2 : LOW

Push Pull, GPIO is driven low

3 : DACOUT

DAC output

End of enumeration elements list.

ALTEX : Use alternative excite pin
bits : 18 - 18 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample d
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

SETIF : Enable interrupt generation
bits : 21 - 23 (3 bit)
access : read-write

Enumeration:

0 : NONE

No interrupt is generated

1 : LEVEL

Set interrupt flag if the sensor triggers.

2 : POSEDGE

Set interrupt flag on positive edge of the sensor state

3 : NEGEDGE

Set interrupt flag on negative edge of the sensor state

4 : BOTHEDGES

Set interrupt flag on both edges of the sensor state

End of enumeration elements list.

OFFSET : OFFSET for IADC/ACMP interaction
bits : 24 - 27 (4 bit)
access : read-write

SAMPLE : Sample mode Selection
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : ACMPCOUNT


1 : ACMP


2 : ADC


3 : ADCDIFF


End of enumeration elements list.


CH5_EVALCFG

No Description
address_offset : 0x158 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH5_EVALCFG CH5_EVALCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECODE COMP STRSAMPLE SCANRESINV MODE

DECODE : Send result to decoder
bits : 2 - 2 (1 bit)
access : read-write

COMP : Select mode for threshold comparison
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : LESS

Comparison evaluates to 1 if sensor data is less than CTRTHRESHOLD, or if the ACMP output is 0

1 : GE

Comparison evaluates to 1 if sensor data is greater than, or equal to CTRTHRESHOLD, or if the ACMP output is 1

End of enumeration elements list.

STRSAMPLE : Enable storing of sensor sample in resul
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Nothing will be stored in the result buffer.

1 : DATA

The sensor sample data will be stored in the result buffer.

2 : DATASRC

The data source, i.e. the channel, will be stored alongside the sensor sample data.

End of enumeration elements list.

SCANRESINV : Enable inversion of result
bits : 6 - 6 (1 bit)
access : read-write

MODE : Configure evaluation mode
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : THRES

Threshold comparison is used to evaluate sensor result

1 : SLIDINGWIN

Sliding window is used to evaluate sensor result

2 : STEPDET

Step detection is used to evaluate sensor result

End of enumeration elements list.


CH5_EVALTHRES

No Description
address_offset : 0x15C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH5_EVALTHRES CH5_EVALTHRES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EVALTHRES

EVALTHRES : Threshold
bits : 0 - 15 (16 bit)
access : read-write


CH6_TIMING

No Description
address_offset : 0x160 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH6_TIMING CH6_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 13 (8 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 14 - 23 (10 bit)
access : read-write


CH6_INTERACT

No Description
address_offset : 0x164 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH6_INTERACT CH6_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRES EXMODE ALTEX SAMPLECLK EXCLK SETIF OFFSET SAMPLE

THRES : ACMP threshold or DAC data
bits : 0 - 11 (12 bit)
access : read-write

EXMODE : Set GPIO mode
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Disabled

1 : HIGH

Push Pull, GPIO is driven high

2 : LOW

Push Pull, GPIO is driven low

3 : DACOUT

DAC output

End of enumeration elements list.

ALTEX : Use alternative excite pin
bits : 18 - 18 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample d
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

SETIF : Enable interrupt generation
bits : 21 - 23 (3 bit)
access : read-write

Enumeration:

0 : NONE

No interrupt is generated

1 : LEVEL

Set interrupt flag if the sensor triggers.

2 : POSEDGE

Set interrupt flag on positive edge of the sensor state

3 : NEGEDGE

Set interrupt flag on negative edge of the sensor state

4 : BOTHEDGES

Set interrupt flag on both edges of the sensor state

End of enumeration elements list.

OFFSET : OFFSET for IADC/ACMP interaction
bits : 24 - 27 (4 bit)
access : read-write

SAMPLE : Sample mode Selection
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : ACMPCOUNT


1 : ACMP


2 : ADC


3 : ADCDIFF


End of enumeration elements list.


CH6_EVALCFG

No Description
address_offset : 0x168 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH6_EVALCFG CH6_EVALCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECODE COMP STRSAMPLE SCANRESINV MODE

DECODE : Send result to decoder
bits : 2 - 2 (1 bit)
access : read-write

COMP : Select mode for threshold comparison
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : LESS

Comparison evaluates to 1 if sensor data is less than CTRTHRESHOLD, or if the ACMP output is 0

1 : GE

Comparison evaluates to 1 if sensor data is greater than, or equal to CTRTHRESHOLD, or if the ACMP output is 1

End of enumeration elements list.

STRSAMPLE : Enable storing of sensor sample in resul
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Nothing will be stored in the result buffer.

1 : DATA

The sensor sample data will be stored in the result buffer.

2 : DATASRC

The data source, i.e. the channel, will be stored alongside the sensor sample data.

End of enumeration elements list.

SCANRESINV : Enable inversion of result
bits : 6 - 6 (1 bit)
access : read-write

MODE : Configure evaluation mode
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : THRES

Threshold comparison is used to evaluate sensor result

1 : SLIDINGWIN

Sliding window is used to evaluate sensor result

2 : STEPDET

Step detection is used to evaluate sensor result

End of enumeration elements list.


CH6_EVALTHRES

No Description
address_offset : 0x16C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH6_EVALTHRES CH6_EVALTHRES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EVALTHRES

EVALTHRES : Threshold
bits : 0 - 15 (16 bit)
access : read-write


CH7_TIMING

No Description
address_offset : 0x170 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH7_TIMING CH7_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 13 (8 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 14 - 23 (10 bit)
access : read-write


CH7_INTERACT

No Description
address_offset : 0x174 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH7_INTERACT CH7_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRES EXMODE ALTEX SAMPLECLK EXCLK SETIF OFFSET SAMPLE

THRES : ACMP threshold or DAC data
bits : 0 - 11 (12 bit)
access : read-write

EXMODE : Set GPIO mode
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Disabled

1 : HIGH

Push Pull, GPIO is driven high

2 : LOW

Push Pull, GPIO is driven low

3 : DACOUT

DAC output

End of enumeration elements list.

ALTEX : Use alternative excite pin
bits : 18 - 18 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample d
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

SETIF : Enable interrupt generation
bits : 21 - 23 (3 bit)
access : read-write

Enumeration:

0 : NONE

No interrupt is generated

1 : LEVEL

Set interrupt flag if the sensor triggers.

2 : POSEDGE

Set interrupt flag on positive edge of the sensor state

3 : NEGEDGE

Set interrupt flag on negative edge of the sensor state

4 : BOTHEDGES

Set interrupt flag on both edges of the sensor state

End of enumeration elements list.

OFFSET : OFFSET for IADC/ACMP interaction
bits : 24 - 27 (4 bit)
access : read-write

SAMPLE : Sample mode Selection
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : ACMPCOUNT


1 : ACMP


2 : ADC


3 : ADCDIFF


End of enumeration elements list.


CH7_EVALCFG

No Description
address_offset : 0x178 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH7_EVALCFG CH7_EVALCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECODE COMP STRSAMPLE SCANRESINV MODE

DECODE : Send result to decoder
bits : 2 - 2 (1 bit)
access : read-write

COMP : Select mode for threshold comparison
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : LESS

Comparison evaluates to 1 if sensor data is less than CTRTHRESHOLD, or if the ACMP output is 0

1 : GE

Comparison evaluates to 1 if sensor data is greater than, or equal to CTRTHRESHOLD, or if the ACMP output is 1

End of enumeration elements list.

STRSAMPLE : Enable storing of sensor sample in resul
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Nothing will be stored in the result buffer.

1 : DATA

The sensor sample data will be stored in the result buffer.

2 : DATASRC

The data source, i.e. the channel, will be stored alongside the sensor sample data.

End of enumeration elements list.

SCANRESINV : Enable inversion of result
bits : 6 - 6 (1 bit)
access : read-write

MODE : Configure evaluation mode
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : THRES

Threshold comparison is used to evaluate sensor result

1 : SLIDINGWIN

Sliding window is used to evaluate sensor result

2 : STEPDET

Step detection is used to evaluate sensor result

End of enumeration elements list.


CH7_EVALTHRES

No Description
address_offset : 0x17C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH7_EVALTHRES CH7_EVALTHRES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EVALTHRES

EVALTHRES : Threshold
bits : 0 - 15 (16 bit)
access : read-write


DECCTRL

Decoder control Register
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DECCTRL DECCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECDIS INTMAP HYSTPRS0 HYSTPRS1 HYSTPRS2 HYSTIRQ PRSCNT

DECDIS : Disable the decoder
bits : 0 - 0 (1 bit)
access : read-write

INTMAP : Enable decoder to channel interrupt map
bits : 2 - 2 (1 bit)
access : read-write

HYSTPRS0 : Enable decoder hysteresis on PRS0 output
bits : 3 - 3 (1 bit)
access : read-write

HYSTPRS1 : Enable decoder hysteresis on PRS1 output
bits : 4 - 4 (1 bit)
access : read-write

HYSTPRS2 : Enable decoder hysteresis on PRS2 output
bits : 5 - 5 (1 bit)
access : read-write

HYSTIRQ : Enable decoder hysteresis on interrupt r
bits : 6 - 6 (1 bit)
access : read-write

PRSCNT : Enable count mode on decoder PRS channel
bits : 7 - 7 (1 bit)
access : read-write


CH8_TIMING

No Description
address_offset : 0x180 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH8_TIMING CH8_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 13 (8 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 14 - 23 (10 bit)
access : read-write


CH8_INTERACT

No Description
address_offset : 0x184 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH8_INTERACT CH8_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRES EXMODE ALTEX SAMPLECLK EXCLK SETIF OFFSET SAMPLE

THRES : ACMP threshold or DAC data
bits : 0 - 11 (12 bit)
access : read-write

EXMODE : Set GPIO mode
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Disabled

1 : HIGH

Push Pull, GPIO is driven high

2 : LOW

Push Pull, GPIO is driven low

3 : DACOUT

DAC output

End of enumeration elements list.

ALTEX : Use alternative excite pin
bits : 18 - 18 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample d
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

SETIF : Enable interrupt generation
bits : 21 - 23 (3 bit)
access : read-write

Enumeration:

0 : NONE

No interrupt is generated

1 : LEVEL

Set interrupt flag if the sensor triggers.

2 : POSEDGE

Set interrupt flag on positive edge of the sensor state

3 : NEGEDGE

Set interrupt flag on negative edge of the sensor state

4 : BOTHEDGES

Set interrupt flag on both edges of the sensor state

End of enumeration elements list.

OFFSET : OFFSET for IADC/ACMP interaction
bits : 24 - 27 (4 bit)
access : read-write

SAMPLE : Sample mode Selection
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : ACMPCOUNT


1 : ACMP


2 : ADC


3 : ADCDIFF


End of enumeration elements list.


CH8_EVALCFG

No Description
address_offset : 0x188 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH8_EVALCFG CH8_EVALCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECODE COMP STRSAMPLE SCANRESINV MODE

DECODE : Send result to decoder
bits : 2 - 2 (1 bit)
access : read-write

COMP : Select mode for threshold comparison
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : LESS

Comparison evaluates to 1 if sensor data is less than CTRTHRESHOLD, or if the ACMP output is 0

1 : GE

Comparison evaluates to 1 if sensor data is greater than, or equal to CTRTHRESHOLD, or if the ACMP output is 1

End of enumeration elements list.

STRSAMPLE : Enable storing of sensor sample in resul
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Nothing will be stored in the result buffer.

1 : DATA

The sensor sample data will be stored in the result buffer.

2 : DATASRC

The data source, i.e. the channel, will be stored alongside the sensor sample data.

End of enumeration elements list.

SCANRESINV : Enable inversion of result
bits : 6 - 6 (1 bit)
access : read-write

MODE : Configure evaluation mode
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : THRES

Threshold comparison is used to evaluate sensor result

1 : SLIDINGWIN

Sliding window is used to evaluate sensor result

2 : STEPDET

Step detection is used to evaluate sensor result

End of enumeration elements list.


CH8_EVALTHRES

No Description
address_offset : 0x18C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH8_EVALTHRES CH8_EVALTHRES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EVALTHRES

EVALTHRES : Threshold
bits : 0 - 15 (16 bit)
access : read-write


CH9_TIMING

No Description
address_offset : 0x190 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH9_TIMING CH9_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 13 (8 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 14 - 23 (10 bit)
access : read-write


CH9_INTERACT

No Description
address_offset : 0x194 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH9_INTERACT CH9_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRES EXMODE ALTEX SAMPLECLK EXCLK SETIF OFFSET SAMPLE

THRES : ACMP threshold or DAC data
bits : 0 - 11 (12 bit)
access : read-write

EXMODE : Set GPIO mode
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Disabled

1 : HIGH

Push Pull, GPIO is driven high

2 : LOW

Push Pull, GPIO is driven low

3 : DACOUT

DAC output

End of enumeration elements list.

ALTEX : Use alternative excite pin
bits : 18 - 18 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample d
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

SETIF : Enable interrupt generation
bits : 21 - 23 (3 bit)
access : read-write

Enumeration:

0 : NONE

No interrupt is generated

1 : LEVEL

Set interrupt flag if the sensor triggers.

2 : POSEDGE

Set interrupt flag on positive edge of the sensor state

3 : NEGEDGE

Set interrupt flag on negative edge of the sensor state

4 : BOTHEDGES

Set interrupt flag on both edges of the sensor state

End of enumeration elements list.

OFFSET : OFFSET for IADC/ACMP interaction
bits : 24 - 27 (4 bit)
access : read-write

SAMPLE : Sample mode Selection
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : ACMPCOUNT


1 : ACMP


2 : ADC


3 : ADCDIFF


End of enumeration elements list.


CH9_EVALCFG

No Description
address_offset : 0x198 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH9_EVALCFG CH9_EVALCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECODE COMP STRSAMPLE SCANRESINV MODE

DECODE : Send result to decoder
bits : 2 - 2 (1 bit)
access : read-write

COMP : Select mode for threshold comparison
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : LESS

Comparison evaluates to 1 if sensor data is less than CTRTHRESHOLD, or if the ACMP output is 0

1 : GE

Comparison evaluates to 1 if sensor data is greater than, or equal to CTRTHRESHOLD, or if the ACMP output is 1

End of enumeration elements list.

STRSAMPLE : Enable storing of sensor sample in resul
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Nothing will be stored in the result buffer.

1 : DATA

The sensor sample data will be stored in the result buffer.

2 : DATASRC

The data source, i.e. the channel, will be stored alongside the sensor sample data.

End of enumeration elements list.

SCANRESINV : Enable inversion of result
bits : 6 - 6 (1 bit)
access : read-write

MODE : Configure evaluation mode
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : THRES

Threshold comparison is used to evaluate sensor result

1 : SLIDINGWIN

Sliding window is used to evaluate sensor result

2 : STEPDET

Step detection is used to evaluate sensor result

End of enumeration elements list.


CH9_EVALTHRES

No Description
address_offset : 0x19C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH9_EVALTHRES CH9_EVALTHRES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EVALTHRES

EVALTHRES : Threshold
bits : 0 - 15 (16 bit)
access : read-write


CH10_TIMING

No Description
address_offset : 0x1A0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH10_TIMING CH10_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 13 (8 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 14 - 23 (10 bit)
access : read-write


CH10_INTERACT

No Description
address_offset : 0x1A4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH10_INTERACT CH10_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRES EXMODE ALTEX SAMPLECLK EXCLK SETIF OFFSET SAMPLE

THRES : ACMP threshold or DAC data
bits : 0 - 11 (12 bit)
access : read-write

EXMODE : Set GPIO mode
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Disabled

1 : HIGH

Push Pull, GPIO is driven high

2 : LOW

Push Pull, GPIO is driven low

3 : DACOUT

DAC output

End of enumeration elements list.

ALTEX : Use alternative excite pin
bits : 18 - 18 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample d
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

SETIF : Enable interrupt generation
bits : 21 - 23 (3 bit)
access : read-write

Enumeration:

0 : NONE

No interrupt is generated

1 : LEVEL

Set interrupt flag if the sensor triggers.

2 : POSEDGE

Set interrupt flag on positive edge of the sensor state

3 : NEGEDGE

Set interrupt flag on negative edge of the sensor state

4 : BOTHEDGES

Set interrupt flag on both edges of the sensor state

End of enumeration elements list.

OFFSET : OFFSET for IADC/ACMP interaction
bits : 24 - 27 (4 bit)
access : read-write

SAMPLE : Sample mode Selection
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : ACMPCOUNT


1 : ACMP


2 : ADC


3 : ADCDIFF


End of enumeration elements list.


CH10_EVALCFG

No Description
address_offset : 0x1A8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH10_EVALCFG CH10_EVALCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECODE COMP STRSAMPLE SCANRESINV MODE

DECODE : Send result to decoder
bits : 2 - 2 (1 bit)
access : read-write

COMP : Select mode for threshold comparison
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : LESS

Comparison evaluates to 1 if sensor data is less than CTRTHRESHOLD, or if the ACMP output is 0

1 : GE

Comparison evaluates to 1 if sensor data is greater than, or equal to CTRTHRESHOLD, or if the ACMP output is 1

End of enumeration elements list.

STRSAMPLE : Enable storing of sensor sample in resul
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Nothing will be stored in the result buffer.

1 : DATA

The sensor sample data will be stored in the result buffer.

2 : DATASRC

The data source, i.e. the channel, will be stored alongside the sensor sample data.

End of enumeration elements list.

SCANRESINV : Enable inversion of result
bits : 6 - 6 (1 bit)
access : read-write

MODE : Configure evaluation mode
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : THRES

Threshold comparison is used to evaluate sensor result

1 : SLIDINGWIN

Sliding window is used to evaluate sensor result

2 : STEPDET

Step detection is used to evaluate sensor result

End of enumeration elements list.


CH10_EVALTHRES

No Description
address_offset : 0x1AC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH10_EVALTHRES CH10_EVALTHRES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EVALTHRES

EVALTHRES : Threshold
bits : 0 - 15 (16 bit)
access : read-write


CH11_TIMING

No Description
address_offset : 0x1B0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH11_TIMING CH11_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 13 (8 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 14 - 23 (10 bit)
access : read-write


CH11_INTERACT

No Description
address_offset : 0x1B4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH11_INTERACT CH11_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRES EXMODE ALTEX SAMPLECLK EXCLK SETIF OFFSET SAMPLE

THRES : ACMP threshold or DAC data
bits : 0 - 11 (12 bit)
access : read-write

EXMODE : Set GPIO mode
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Disabled

1 : HIGH

Push Pull, GPIO is driven high

2 : LOW

Push Pull, GPIO is driven low

3 : DACOUT

DAC output

End of enumeration elements list.

ALTEX : Use alternative excite pin
bits : 18 - 18 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample d
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

SETIF : Enable interrupt generation
bits : 21 - 23 (3 bit)
access : read-write

Enumeration:

0 : NONE

No interrupt is generated

1 : LEVEL

Set interrupt flag if the sensor triggers.

2 : POSEDGE

Set interrupt flag on positive edge of the sensor state

3 : NEGEDGE

Set interrupt flag on negative edge of the sensor state

4 : BOTHEDGES

Set interrupt flag on both edges of the sensor state

End of enumeration elements list.

OFFSET : OFFSET for IADC/ACMP interaction
bits : 24 - 27 (4 bit)
access : read-write

SAMPLE : Sample mode Selection
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : ACMPCOUNT


1 : ACMP


2 : ADC


3 : ADCDIFF


End of enumeration elements list.


CH11_EVALCFG

No Description
address_offset : 0x1B8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH11_EVALCFG CH11_EVALCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECODE COMP STRSAMPLE SCANRESINV MODE

DECODE : Send result to decoder
bits : 2 - 2 (1 bit)
access : read-write

COMP : Select mode for threshold comparison
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : LESS

Comparison evaluates to 1 if sensor data is less than CTRTHRESHOLD, or if the ACMP output is 0

1 : GE

Comparison evaluates to 1 if sensor data is greater than, or equal to CTRTHRESHOLD, or if the ACMP output is 1

End of enumeration elements list.

STRSAMPLE : Enable storing of sensor sample in resul
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Nothing will be stored in the result buffer.

1 : DATA

The sensor sample data will be stored in the result buffer.

2 : DATASRC

The data source, i.e. the channel, will be stored alongside the sensor sample data.

End of enumeration elements list.

SCANRESINV : Enable inversion of result
bits : 6 - 6 (1 bit)
access : read-write

MODE : Configure evaluation mode
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : THRES

Threshold comparison is used to evaluate sensor result

1 : SLIDINGWIN

Sliding window is used to evaluate sensor result

2 : STEPDET

Step detection is used to evaluate sensor result

End of enumeration elements list.


CH11_EVALTHRES

No Description
address_offset : 0x1BC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH11_EVALTHRES CH11_EVALTHRES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EVALTHRES

EVALTHRES : Threshold
bits : 0 - 15 (16 bit)
access : read-write


EVALCTRL

LESENSE evaluation control
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVALCTRL EVALCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WINSIZE

WINSIZE : Sliding window and step detection size
bits : 0 - 15 (16 bit)
access : read-write


CH12_TIMING

No Description
address_offset : 0x1C0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH12_TIMING CH12_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 13 (8 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 14 - 23 (10 bit)
access : read-write


CH12_INTERACT

No Description
address_offset : 0x1C4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH12_INTERACT CH12_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRES EXMODE ALTEX SAMPLECLK EXCLK SETIF OFFSET SAMPLE

THRES : ACMP threshold or DAC data
bits : 0 - 11 (12 bit)
access : read-write

EXMODE : Set GPIO mode
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Disabled

1 : HIGH

Push Pull, GPIO is driven high

2 : LOW

Push Pull, GPIO is driven low

3 : DACOUT

DAC output

End of enumeration elements list.

ALTEX : Use alternative excite pin
bits : 18 - 18 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample d
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

SETIF : Enable interrupt generation
bits : 21 - 23 (3 bit)
access : read-write

Enumeration:

0 : NONE

No interrupt is generated

1 : LEVEL

Set interrupt flag if the sensor triggers.

2 : POSEDGE

Set interrupt flag on positive edge of the sensor state

3 : NEGEDGE

Set interrupt flag on negative edge of the sensor state

4 : BOTHEDGES

Set interrupt flag on both edges of the sensor state

End of enumeration elements list.

OFFSET : OFFSET for IADC/ACMP interaction
bits : 24 - 27 (4 bit)
access : read-write

SAMPLE : Sample mode Selection
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : ACMPCOUNT


1 : ACMP


2 : ADC


3 : ADCDIFF


End of enumeration elements list.


CH12_EVALCFG

No Description
address_offset : 0x1C8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH12_EVALCFG CH12_EVALCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECODE COMP STRSAMPLE SCANRESINV MODE

DECODE : Send result to decoder
bits : 2 - 2 (1 bit)
access : read-write

COMP : Select mode for threshold comparison
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : LESS

Comparison evaluates to 1 if sensor data is less than CTRTHRESHOLD, or if the ACMP output is 0

1 : GE

Comparison evaluates to 1 if sensor data is greater than, or equal to CTRTHRESHOLD, or if the ACMP output is 1

End of enumeration elements list.

STRSAMPLE : Enable storing of sensor sample in resul
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Nothing will be stored in the result buffer.

1 : DATA

The sensor sample data will be stored in the result buffer.

2 : DATASRC

The data source, i.e. the channel, will be stored alongside the sensor sample data.

End of enumeration elements list.

SCANRESINV : Enable inversion of result
bits : 6 - 6 (1 bit)
access : read-write

MODE : Configure evaluation mode
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : THRES

Threshold comparison is used to evaluate sensor result

1 : SLIDINGWIN

Sliding window is used to evaluate sensor result

2 : STEPDET

Step detection is used to evaluate sensor result

End of enumeration elements list.


CH12_EVALTHRES

No Description
address_offset : 0x1CC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH12_EVALTHRES CH12_EVALTHRES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EVALTHRES

EVALTHRES : Threshold
bits : 0 - 15 (16 bit)
access : read-write


CH13_TIMING

No Description
address_offset : 0x1D0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH13_TIMING CH13_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 13 (8 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 14 - 23 (10 bit)
access : read-write


CH13_INTERACT

No Description
address_offset : 0x1D4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH13_INTERACT CH13_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRES EXMODE ALTEX SAMPLECLK EXCLK SETIF OFFSET SAMPLE

THRES : ACMP threshold or DAC data
bits : 0 - 11 (12 bit)
access : read-write

EXMODE : Set GPIO mode
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Disabled

1 : HIGH

Push Pull, GPIO is driven high

2 : LOW

Push Pull, GPIO is driven low

3 : DACOUT

DAC output

End of enumeration elements list.

ALTEX : Use alternative excite pin
bits : 18 - 18 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample d
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

SETIF : Enable interrupt generation
bits : 21 - 23 (3 bit)
access : read-write

Enumeration:

0 : NONE

No interrupt is generated

1 : LEVEL

Set interrupt flag if the sensor triggers.

2 : POSEDGE

Set interrupt flag on positive edge of the sensor state

3 : NEGEDGE

Set interrupt flag on negative edge of the sensor state

4 : BOTHEDGES

Set interrupt flag on both edges of the sensor state

End of enumeration elements list.

OFFSET : OFFSET for IADC/ACMP interaction
bits : 24 - 27 (4 bit)
access : read-write

SAMPLE : Sample mode Selection
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : ACMPCOUNT


1 : ACMP


2 : ADC


3 : ADCDIFF


End of enumeration elements list.


CH13_EVALCFG

No Description
address_offset : 0x1D8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH13_EVALCFG CH13_EVALCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECODE COMP STRSAMPLE SCANRESINV MODE

DECODE : Send result to decoder
bits : 2 - 2 (1 bit)
access : read-write

COMP : Select mode for threshold comparison
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : LESS

Comparison evaluates to 1 if sensor data is less than CTRTHRESHOLD, or if the ACMP output is 0

1 : GE

Comparison evaluates to 1 if sensor data is greater than, or equal to CTRTHRESHOLD, or if the ACMP output is 1

End of enumeration elements list.

STRSAMPLE : Enable storing of sensor sample in resul
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Nothing will be stored in the result buffer.

1 : DATA

The sensor sample data will be stored in the result buffer.

2 : DATASRC

The data source, i.e. the channel, will be stored alongside the sensor sample data.

End of enumeration elements list.

SCANRESINV : Enable inversion of result
bits : 6 - 6 (1 bit)
access : read-write

MODE : Configure evaluation mode
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : THRES

Threshold comparison is used to evaluate sensor result

1 : SLIDINGWIN

Sliding window is used to evaluate sensor result

2 : STEPDET

Step detection is used to evaluate sensor result

End of enumeration elements list.


CH13_EVALTHRES

No Description
address_offset : 0x1DC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH13_EVALTHRES CH13_EVALTHRES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EVALTHRES

EVALTHRES : Threshold
bits : 0 - 15 (16 bit)
access : read-write


CH14_TIMING

No Description
address_offset : 0x1E0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH14_TIMING CH14_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 13 (8 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 14 - 23 (10 bit)
access : read-write


CH14_INTERACT

No Description
address_offset : 0x1E4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH14_INTERACT CH14_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRES EXMODE ALTEX SAMPLECLK EXCLK SETIF OFFSET SAMPLE

THRES : ACMP threshold or DAC data
bits : 0 - 11 (12 bit)
access : read-write

EXMODE : Set GPIO mode
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Disabled

1 : HIGH

Push Pull, GPIO is driven high

2 : LOW

Push Pull, GPIO is driven low

3 : DACOUT

DAC output

End of enumeration elements list.

ALTEX : Use alternative excite pin
bits : 18 - 18 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample d
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

SETIF : Enable interrupt generation
bits : 21 - 23 (3 bit)
access : read-write

Enumeration:

0 : NONE

No interrupt is generated

1 : LEVEL

Set interrupt flag if the sensor triggers.

2 : POSEDGE

Set interrupt flag on positive edge of the sensor state

3 : NEGEDGE

Set interrupt flag on negative edge of the sensor state

4 : BOTHEDGES

Set interrupt flag on both edges of the sensor state

End of enumeration elements list.

OFFSET : OFFSET for IADC/ACMP interaction
bits : 24 - 27 (4 bit)
access : read-write

SAMPLE : Sample mode Selection
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : ACMPCOUNT


1 : ACMP


2 : ADC


3 : ADCDIFF


End of enumeration elements list.


CH14_EVALCFG

No Description
address_offset : 0x1E8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH14_EVALCFG CH14_EVALCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECODE COMP STRSAMPLE SCANRESINV MODE

DECODE : Send result to decoder
bits : 2 - 2 (1 bit)
access : read-write

COMP : Select mode for threshold comparison
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : LESS

Comparison evaluates to 1 if sensor data is less than CTRTHRESHOLD, or if the ACMP output is 0

1 : GE

Comparison evaluates to 1 if sensor data is greater than, or equal to CTRTHRESHOLD, or if the ACMP output is 1

End of enumeration elements list.

STRSAMPLE : Enable storing of sensor sample in resul
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Nothing will be stored in the result buffer.

1 : DATA

The sensor sample data will be stored in the result buffer.

2 : DATASRC

The data source, i.e. the channel, will be stored alongside the sensor sample data.

End of enumeration elements list.

SCANRESINV : Enable inversion of result
bits : 6 - 6 (1 bit)
access : read-write

MODE : Configure evaluation mode
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : THRES

Threshold comparison is used to evaluate sensor result

1 : SLIDINGWIN

Sliding window is used to evaluate sensor result

2 : STEPDET

Step detection is used to evaluate sensor result

End of enumeration elements list.


CH14_EVALTHRES

No Description
address_offset : 0x1EC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH14_EVALTHRES CH14_EVALTHRES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EVALTHRES

EVALTHRES : Threshold
bits : 0 - 15 (16 bit)
access : read-write


CH15_TIMING

No Description
address_offset : 0x1F0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH15_TIMING CH15_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 13 (8 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 14 - 23 (10 bit)
access : read-write


CH15_INTERACT

No Description
address_offset : 0x1F4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH15_INTERACT CH15_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRES EXMODE ALTEX SAMPLECLK EXCLK SETIF OFFSET SAMPLE

THRES : ACMP threshold or DAC data
bits : 0 - 11 (12 bit)
access : read-write

EXMODE : Set GPIO mode
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Disabled

1 : HIGH

Push Pull, GPIO is driven high

2 : LOW

Push Pull, GPIO is driven low

3 : DACOUT

DAC output

End of enumeration elements list.

ALTEX : Use alternative excite pin
bits : 18 - 18 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample d
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

0 : LFACLK

LFACLK will be used for timing

1 : AUXHFRCO

AUXHFRCO will be used for timing

End of enumeration elements list.

SETIF : Enable interrupt generation
bits : 21 - 23 (3 bit)
access : read-write

Enumeration:

0 : NONE

No interrupt is generated

1 : LEVEL

Set interrupt flag if the sensor triggers.

2 : POSEDGE

Set interrupt flag on positive edge of the sensor state

3 : NEGEDGE

Set interrupt flag on negative edge of the sensor state

4 : BOTHEDGES

Set interrupt flag on both edges of the sensor state

End of enumeration elements list.

OFFSET : OFFSET for IADC/ACMP interaction
bits : 24 - 27 (4 bit)
access : read-write

SAMPLE : Sample mode Selection
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : ACMPCOUNT


1 : ACMP


2 : ADC


3 : ADCDIFF


End of enumeration elements list.


CH15_EVALCFG

No Description
address_offset : 0x1F8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH15_EVALCFG CH15_EVALCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECODE COMP STRSAMPLE SCANRESINV MODE

DECODE : Send result to decoder
bits : 2 - 2 (1 bit)
access : read-write

COMP : Select mode for threshold comparison
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : LESS

Comparison evaluates to 1 if sensor data is less than CTRTHRESHOLD, or if the ACMP output is 0

1 : GE

Comparison evaluates to 1 if sensor data is greater than, or equal to CTRTHRESHOLD, or if the ACMP output is 1

End of enumeration elements list.

STRSAMPLE : Enable storing of sensor sample in resul
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

Nothing will be stored in the result buffer.

1 : DATA

The sensor sample data will be stored in the result buffer.

2 : DATASRC

The data source, i.e. the channel, will be stored alongside the sensor sample data.

End of enumeration elements list.

SCANRESINV : Enable inversion of result
bits : 6 - 6 (1 bit)
access : read-write

MODE : Configure evaluation mode
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : THRES

Threshold comparison is used to evaluate sensor result

1 : SLIDINGWIN

Sliding window is used to evaluate sensor result

2 : STEPDET

Step detection is used to evaluate sensor result

End of enumeration elements list.


CH15_EVALTHRES

No Description
address_offset : 0x1FC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH15_EVALTHRES CH15_EVALTHRES read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EVALTHRES

EVALTHRES : Threshold
bits : 0 - 15 (16 bit)
access : read-write


PRSCTRL

PRS control register
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRSCTRL PRSCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECCMPVAL DECCMPMASK DECCMPEN

DECCMPVAL : Decoder state compare value
bits : 0 - 4 (5 bit)
access : read-write

DECCMPMASK : Decoder state compare value mask
bits : 8 - 12 (5 bit)
access : read-write

DECCMPEN : Enable PRS output DECCMP
bits : 16 - 16 (1 bit)
access : read-write


ST0_ARC

No Description
address_offset : 0x200 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST0_ARC ST0_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST1_ARC

No Description
address_offset : 0x204 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST1_ARC ST1_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST2_ARC

No Description
address_offset : 0x208 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST2_ARC ST2_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST3_ARC

No Description
address_offset : 0x20C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST3_ARC ST3_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST4_ARC

No Description
address_offset : 0x210 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST4_ARC ST4_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST5_ARC

No Description
address_offset : 0x214 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST5_ARC ST5_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST6_ARC

No Description
address_offset : 0x218 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST6_ARC ST6_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST7_ARC

No Description
address_offset : 0x21C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST7_ARC ST7_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST8_ARC

No Description
address_offset : 0x220 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST8_ARC ST8_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST9_ARC

No Description
address_offset : 0x224 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST9_ARC ST9_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST10_ARC

No Description
address_offset : 0x228 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST10_ARC ST10_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST11_ARC

No Description
address_offset : 0x22C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST11_ARC ST11_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST12_ARC

No Description
address_offset : 0x230 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST12_ARC ST12_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST13_ARC

No Description
address_offset : 0x234 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST13_ARC ST13_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST14_ARC

No Description
address_offset : 0x238 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST14_ARC ST14_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST15_ARC

No Description
address_offset : 0x23C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST15_ARC ST15_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


CMD

Command Register
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CMD CMD write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 START STOP DECODE CLEARBUF

START : Start scanning of sensors.
bits : 0 - 0 (1 bit)
access : write-only

STOP : Stop scanning of sensors
bits : 1 - 1 (1 bit)
access : write-only

DECODE : Start decoder
bits : 2 - 2 (1 bit)
access : write-only

CLEARBUF : Clear result buffer
bits : 3 - 3 (1 bit)
access : write-only


ST16_ARC

No Description
address_offset : 0x240 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST16_ARC ST16_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST17_ARC

No Description
address_offset : 0x244 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST17_ARC ST17_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST18_ARC

No Description
address_offset : 0x248 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST18_ARC ST18_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST19_ARC

No Description
address_offset : 0x24C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST19_ARC ST19_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST20_ARC

No Description
address_offset : 0x250 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST20_ARC ST20_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST21_ARC

No Description
address_offset : 0x254 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST21_ARC ST21_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST22_ARC

No Description
address_offset : 0x258 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST22_ARC ST22_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST23_ARC

No Description
address_offset : 0x25C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST23_ARC ST23_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST24_ARC

No Description
address_offset : 0x260 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST24_ARC ST24_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST25_ARC

No Description
address_offset : 0x264 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST25_ARC ST25_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST26_ARC

No Description
address_offset : 0x268 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST26_ARC ST26_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST27_ARC

No Description
address_offset : 0x26C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST27_ARC ST27_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST28_ARC

No Description
address_offset : 0x270 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST28_ARC ST28_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST29_ARC

No Description
address_offset : 0x274 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST29_ARC ST29_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST30_ARC

No Description
address_offset : 0x278 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST30_ARC ST30_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST31_ARC

No Description
address_offset : 0x27C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST31_ARC ST31_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


CHEN

Channel enable Register
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CHEN CHEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CHEN

CHEN : Enable scan channel
bits : 0 - 15 (16 bit)
access : read-write


ST32_ARC

No Description
address_offset : 0x280 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST32_ARC ST32_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST33_ARC

No Description
address_offset : 0x284 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST33_ARC ST33_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST34_ARC

No Description
address_offset : 0x288 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST34_ARC ST34_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST35_ARC

No Description
address_offset : 0x28C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST35_ARC ST35_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST36_ARC

No Description
address_offset : 0x290 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST36_ARC ST36_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST37_ARC

No Description
address_offset : 0x294 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST37_ARC ST37_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST38_ARC

No Description
address_offset : 0x298 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST38_ARC ST38_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST39_ARC

No Description
address_offset : 0x29C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST39_ARC ST39_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST40_ARC

No Description
address_offset : 0x2A0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST40_ARC ST40_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST41_ARC

No Description
address_offset : 0x2A4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST41_ARC ST41_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST42_ARC

No Description
address_offset : 0x2A8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST42_ARC ST42_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST43_ARC

No Description
address_offset : 0x2AC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST43_ARC ST43_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST44_ARC

No Description
address_offset : 0x2B0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST44_ARC ST44_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST45_ARC

No Description
address_offset : 0x2B4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST45_ARC ST45_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST46_ARC

No Description
address_offset : 0x2B8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST46_ARC ST46_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST47_ARC

No Description
address_offset : 0x2BC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST47_ARC ST47_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


SCANRES

Scan result register
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SCANRES SCANRES read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCANRES STEPDIR

SCANRES : Scan results
bits : 0 - 15 (16 bit)
access : read-only

STEPDIR : Direction of previous step detection
bits : 16 - 31 (16 bit)
access : read-only


ST48_ARC

No Description
address_offset : 0x2C0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST48_ARC ST48_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST49_ARC

No Description
address_offset : 0x2C4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST49_ARC ST49_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST50_ARC

No Description
address_offset : 0x2C8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST50_ARC ST50_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST51_ARC

No Description
address_offset : 0x2CC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST51_ARC ST51_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST52_ARC

No Description
address_offset : 0x2D0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST52_ARC ST52_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST53_ARC

No Description
address_offset : 0x2D4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST53_ARC ST53_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST54_ARC

No Description
address_offset : 0x2D8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST54_ARC ST54_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST55_ARC

No Description
address_offset : 0x2DC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST55_ARC ST55_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST56_ARC

No Description
address_offset : 0x2E0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST56_ARC ST56_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST57_ARC

No Description
address_offset : 0x2E4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST57_ARC ST57_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST58_ARC

No Description
address_offset : 0x2E8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST58_ARC ST58_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST59_ARC

No Description
address_offset : 0x2EC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST59_ARC ST59_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST60_ARC

No Description
address_offset : 0x2F0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST60_ARC ST60_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST61_ARC

No Description
address_offset : 0x2F4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST61_ARC ST61_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST62_ARC

No Description
address_offset : 0x2F8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST62_ARC ST62_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


ST63_ARC

No Description
address_offset : 0x2FC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST63_ARC ST63_ARC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCOMP SMASK CURSTATE PRSACT NEXTSTATE SETIF

SCOMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

SMASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

CURSTATE : Current State
bits : 8 - 12 (5 bit)
access : read-write

PRSACT : Configure transition action in normal mode
bits : 13 - 15 (3 bit)
access : read-write

Enumeration:

0 : NONE

No PRS output generated (if PRSCOUNT == 0), or do not count (if PRSCOUNT == 1).

1 : PRS0

Pulse generated on LESENSE PRS output 0 (if PRSCOUNT == 0).

1 : UP

Count Up (if PRSCOUNT == 1).

2 : PRS1

Pulse generated on LESENSE PRS output 1 (if PRSCOUNT == 0).

2 : DOWN

Count Down (if PRSCOUNT == 1).

3 : PRS01

Pulse generated on LESENSE PRS output 0 and 1 (if PRSCOUNT == 0).

4 : PRS2

Pulse generated on LESENSE PRS output 2. (PRSCOUNT == 0 OR 1).

5 : PRS02

Pulse generated on LESENSE PRS output 0 and 2 (if PRSCOUNT == 0).

5 : UPANDPRS2

Count Up and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

6 : PRS12

Pulse generated on LESENSE PRS output 1 and 2 (if PRSCOUNT == 0).

6 : DOWNANDPRS2

Count Down and Pulse generated on LESENSE PRS output 2 (if PRSCOUNT == 1).

7 : PRS012

Pulse generated on LESENSE PRS output 0, 1 and 2 (if PRSCOUNT == 0).

End of enumeration elements list.

NEXTSTATE : Next state index
bits : 16 - 20 (5 bit)
access : read-write

SETIF : Set interrupt flag
bits : 21 - 21 (1 bit)
access : read-write


STATUS

Status Register
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STATUS STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESFIFOV RESFIFOFULL SCANACTIVE RUNNING READBUSY FLUSHING

RESFIFOV : Result fifo valid
bits : 0 - 0 (1 bit)
access : read-only

RESFIFOFULL : Result fifo full
bits : 1 - 1 (1 bit)
access : read-only

SCANACTIVE : LESENSE scan active
bits : 3 - 3 (1 bit)
access : read-only

RUNNING : LESENSE periodic counter running
bits : 4 - 4 (1 bit)
access : read-only

READBUSY : FIFO Read Busy
bits : 5 - 5 (1 bit)
access : read-only

FLUSHING : FIFO Flushing
bits : 6 - 6 (1 bit)
access : read-only


RESCOUNT

Result FIFO Count
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RESCOUNT RESCOUNT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COUNT

COUNT : Result Fifo Count
bits : 0 - 4 (5 bit)
access : read-only


RESFIFO

Result Fifo
address_offset : 0x38 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RESFIFO RESFIFO read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUFDATASRC

BUFDATASRC : Result data and source
bits : 0 - 19 (20 bit)
access : read-only


CURCH

Current channel index
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CURCH CURCH read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CURCH

CURCH : Shows the index of the current channel
bits : 0 - 3 (4 bit)
access : read-only


EN

Global Enable of LESENSE functions
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EN EN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EN DISABLING

EN : Enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DISABLE

Disable

1 : ENABLE

Enable

End of enumeration elements list.

DISABLING : Disabling
bits : 1 - 1 (1 bit)
access : read-only


DECSTATE

Current decoder state
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

DECSTATE DECSTATE read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECSTATE

DECSTATE : Shows the current decoder state
bits : 0 - 4 (5 bit)
access : read-only


SENSORSTATE

Decoder input register
address_offset : 0x44 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SENSORSTATE SENSORSTATE read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SENSORSTATE

SENSORSTATE : Sensor State
bits : 0 - 3 (4 bit)
access : read-only


IDLECONF

GPIO Idle phase configuration
address_offset : 0x48 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IDLECONF IDLECONF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CHIDLE0 CHIDLE1 CHIDLE2 CHIDLE3 CHIDLE4 CHIDLE5 CHIDLE6 CHIDLE7 CHIDLE8 CHIDLE9 CHIDLE10 CHIDLE11 CHIDLE12 CHIDLE13 CHIDLE14 CHIDLE15

CHIDLE0 : Channel IDLE configuration
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

CH0 output is disabled in idle phase

1 : HIGH

CH0 output is high in idle phase

2 : LOW

CH0 output is low in idle phase

3 : DAC

CH0 output is connected to DAC output in idle phase

End of enumeration elements list.

CHIDLE1 : Channel IDLE configuration
bits : 2 - 3 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

CH0 output is disabled in idle phase

1 : HIGH

CH0 output is high in idle phase

2 : LOW

CH0 output is low in idle phase

3 : DAC

CH0 output is connected to DAC output in idle phase

End of enumeration elements list.

CHIDLE2 : Channel IDLE configuration
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

CH0 output is disabled in idle phase

1 : HIGH

CH0 output is high in idle phase

2 : LOW

CH0 output is low in idle phase

3 : DAC

CH0 output is connected to DAC output in idle phase

End of enumeration elements list.

CHIDLE3 : Channel IDLE configuration
bits : 6 - 7 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

CH0 output is disabled in idle phase

1 : HIGH

CH0 output is high in idle phase

2 : LOW

CH0 output is low in idle phase

3 : DAC

CH0 output is connected to DAC output in idle phase

End of enumeration elements list.

CHIDLE4 : Channel IDLE configuration
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

CH0 output is disabled in idle phase

1 : HIGH

CH0 output is high in idle phase

2 : LOW

CH0 output is low in idle phase

3 : DAC

CH0 output is connected to DAC output in idle phase

End of enumeration elements list.

CHIDLE5 : Channel IDLE configuration
bits : 10 - 11 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

CH0 output is disabled in idle phase

1 : HIGH

CH0 output is high in idle phase

2 : LOW

CH0 output is low in idle phase

3 : DAC

CH0 output is connected to DAC output in idle phase

End of enumeration elements list.

CHIDLE6 : Channel IDLE configuration
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

CH0 output is disabled in idle phase

1 : HIGH

CH0 output is high in idle phase

2 : LOW

CH0 output is low in idle phase

3 : DAC

CH0 output is connected to DAC output in idle phase

End of enumeration elements list.

CHIDLE7 : Channel IDLE configuration
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

CH0 output is disabled in idle phase

1 : HIGH

CH0 output is high in idle phase

2 : LOW

CH0 output is low in idle phase

3 : DAC

CH0 output is connected to DAC output in idle phase

End of enumeration elements list.

CHIDLE8 : Channel IDLE configuration
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

CH0 output is disabled in idle phase

1 : HIGH

CH0 output is high in idle phase

2 : LOW

CH0 output is low in idle phase

3 : DAC

CH0 output is connected to DAC output in idle phase

End of enumeration elements list.

CHIDLE9 : Channel IDLE configuration
bits : 18 - 19 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

CH0 output is disabled in idle phase

1 : HIGH

CH0 output is high in idle phase

2 : LOW

CH0 output is low in idle phase

3 : DAC

CH0 output is connected to DAC output in idle phase

End of enumeration elements list.

CHIDLE10 : Channel IDLE configuration
bits : 20 - 21 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

CH0 output is disabled in idle phase

1 : HIGH

CH0 output is high in idle phase

2 : LOW

CH0 output is low in idle phase

3 : DAC

CH0 output is connected to DAC output in idle phase

End of enumeration elements list.

CHIDLE11 : Channel IDLE configuration
bits : 22 - 23 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

CH0 output is disabled in idle phase

1 : HIGH

CH0 output is high in idle phase

2 : LOW

CH0 output is low in idle phase

3 : DAC

CH0 output is connected to DAC output in idle phase

End of enumeration elements list.

CHIDLE12 : Channel IDLE configuration
bits : 24 - 25 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

CH0 output is disabled in idle phase

1 : HIGH

CH0 output is high in idle phase

2 : LOW

CH0 output is low in idle phase

3 : DAC

CH0 output is connected to DAC output in idle phase

End of enumeration elements list.

CHIDLE13 : Channel IDLE configuration
bits : 26 - 27 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

CH0 output is disabled in idle phase

1 : HIGH

CH0 output is high in idle phase

2 : LOW

CH0 output is low in idle phase

3 : DAC

CH0 output is connected to DAC output in idle phase

End of enumeration elements list.

CHIDLE14 : Channel IDLE configuration
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

CH0 output is disabled in idle phase

1 : HIGH

CH0 output is high in idle phase

2 : LOW

CH0 output is low in idle phase

3 : DAC

CH0 output is connected to DAC output in idle phase

End of enumeration elements list.

CHIDLE15 : Channel IDLE configuration
bits : 30 - 31 (2 bit)
access : read-write

Enumeration:

0 : DISABLE

CH0 output is disabled in idle phase

1 : HIGH

CH0 output is high in idle phase

2 : LOW

CH0 output is low in idle phase

3 : DAC

CH0 output is connected to DAC output in idle phase

End of enumeration elements list.


SYNCBUSY

Synchronization Busy Register
address_offset : 0x50 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SYNCBUSY SYNCBUSY read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMD

CMD : Command
bits : 0 - 0 (1 bit)
access : read-only


IF

Interrupt Flags
address_offset : 0x60 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IF IF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15 SCANDONE DEC RESWL RESOF CNTOF RESUF

CH0 : Channel
bits : 0 - 0 (1 bit)
access : read-write

CH1 : Channel
bits : 1 - 1 (1 bit)
access : read-write

CH2 : Channel
bits : 2 - 2 (1 bit)
access : read-write

CH3 : Channel
bits : 3 - 3 (1 bit)
access : read-write

CH4 : Channel
bits : 4 - 4 (1 bit)
access : read-write

CH5 : Channel
bits : 5 - 5 (1 bit)
access : read-write

CH6 : Channel
bits : 6 - 6 (1 bit)
access : read-write

CH7 : Channel
bits : 7 - 7 (1 bit)
access : read-write

CH8 : Channel
bits : 8 - 8 (1 bit)
access : read-write

CH9 : Channel
bits : 9 - 9 (1 bit)
access : read-write

CH10 : Channel
bits : 10 - 10 (1 bit)
access : read-write

CH11 : Channel
bits : 11 - 11 (1 bit)
access : read-write

CH12 : Channel
bits : 12 - 12 (1 bit)
access : read-write

CH13 : Channel
bits : 13 - 13 (1 bit)
access : read-write

CH14 : Channel
bits : 14 - 14 (1 bit)
access : read-write

CH15 : Channel
bits : 15 - 15 (1 bit)
access : read-write

SCANDONE : Scan Done
bits : 16 - 16 (1 bit)
access : read-write

DEC : Decoder
bits : 17 - 17 (1 bit)
access : read-write

RESWL : Result Watermark Level
bits : 18 - 18 (1 bit)
access : read-write

RESOF : Result Overflow
bits : 19 - 19 (1 bit)
access : read-write

CNTOF : Counter Overflow
bits : 20 - 20 (1 bit)
access : read-write

RESUF : Result Underflow
bits : 21 - 21 (1 bit)
access : read-write


IEN

Interrupt Enables
address_offset : 0x64 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IEN IEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15 SCANDONE DEC RESWL RESOF CNTOF RESUF

CH0 : Channel
bits : 0 - 0 (1 bit)
access : read-write

CH1 : Channel
bits : 1 - 1 (1 bit)
access : read-write

CH2 : Channel
bits : 2 - 2 (1 bit)
access : read-write

CH3 : Channel
bits : 3 - 3 (1 bit)
access : read-write

CH4 : Channel
bits : 4 - 4 (1 bit)
access : read-write

CH5 : Channel
bits : 5 - 5 (1 bit)
access : read-write

CH6 : Channel
bits : 6 - 6 (1 bit)
access : read-write

CH7 : Channel
bits : 7 - 7 (1 bit)
access : read-write

CH8 : Channel
bits : 8 - 8 (1 bit)
access : read-write

CH9 : Channel
bits : 9 - 9 (1 bit)
access : read-write

CH10 : Channel
bits : 10 - 10 (1 bit)
access : read-write

CH11 : Channel
bits : 11 - 11 (1 bit)
access : read-write

CH12 : Channel
bits : 12 - 12 (1 bit)
access : read-write

CH13 : Channel
bits : 13 - 13 (1 bit)
access : read-write

CH14 : Channel
bits : 14 - 14 (1 bit)
access : read-write

CH15 : Channel
bits : 15 - 15 (1 bit)
access : read-write

SCANDONE : Scan Complete
bits : 16 - 16 (1 bit)
access : read-write

DEC : Decoder
bits : 17 - 17 (1 bit)
access : read-write

RESWL : Result Watermark Level
bits : 18 - 18 (1 bit)
access : read-write

RESOF : Result Overflow
bits : 19 - 19 (1 bit)
access : read-write

CNTOF : Counter Overflow
bits : 20 - 20 (1 bit)
access : read-write

RESUF : Result Underflow
bits : 21 - 21 (1 bit)
access : read-write


SWRST

No Description
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SWRST SWRST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SWRST RESETTING

SWRST : Software reset command
bits : 0 - 0 (1 bit)
access : write-only

RESETTING : Software reset busy status
bits : 1 - 1 (1 bit)
access : read-only


CFG

Configuration Register
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCANMODE SCANCONF DUALSAMPLE STRSCANRES DMAWU RESFIDL DEBUGRUN

SCANMODE : Configure scan mode
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : PERIODIC

A new scan is started each time the period counter overflows

1 : ONESHOT

A single scan is performed when START in CMD is set

2 : PRS

Pulse on PRS channel

End of enumeration elements list.

SCANCONF : Select scan configuration
bits : 2 - 3 (2 bit)
access : read-write

Enumeration:

0 : DIRMAP

The channel configuration register registers used are directly mapped to the channel number.

1 : INVMAP

The channel configuration register registers used are CHX+8_CONF for channels 0-7 and CHX-8_CONF for channels 8-15.

2 : TOGGLE

The channel configuration register registers used toggles between CHX_CONF and CHX+8_CONF when channel x triggers

3 : DECDEF

The decoder state defines the CONF registers to be used.

End of enumeration elements list.

DUALSAMPLE : Enable dual sample mode
bits : 5 - 5 (1 bit)
access : read-write

STRSCANRES : Enable storing of SCANRES
bits : 6 - 6 (1 bit)
access : read-write

DMAWU : DMA wake-up from EM2
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

0 : DISABLE

No DMA wake-up from EM2

1 : ENABLE

DMA wake-up from EM2 when FIFO count is greater or equal to RESFIDL

End of enumeration elements list.

RESFIDL : Result FIFO level
bits : 8 - 11 (4 bit)
access : read-write

DEBUGRUN : Debug Mode Run Enable
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : X0

LESENSE can not start new scans in debug mode

1 : X1

LESENSE can start new scans in debug mode

End of enumeration elements list.



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