\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :
No Description
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IPVERSION : IP version ID
bits : 0 - 31 (32 bit)
access : read-only
No Description
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
OVERFLOW : Capture Overflow
bits : 0 - 0 (1 bit)
access : read-only
No Description
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : IFADC Debug Enable
bits : 0 - 0 (1 bit)
access : read-write
No Description
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MODE : Mode
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : MP
Magnitude + Phase +AGC
1 : IQ
I + Q + AGC
End of enumeration elements list.
IQSEL : IQ selection
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : NA
Not used
1 : IONLY
Only sample I values
2 : QONLY
Only sample Q values
3 : IANDQ
Sample I and Q values
End of enumeration elements list.
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