\n

MVP_S

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :

Registers

IPVERSION

STATUS

LOOP5RST

LOOP6CFG

LOOP6RST

LOOP7CFG

LOOP7RST

INSTR0CFG0

INSTR0CFG1

INSTR0CFG2

INSTR1CFG0

INSTR1CFG1

INSTR1CFG2

INSTR2CFG0

INSTR2CFG1

INSTR2CFG2

INSTR3CFG0

INSTR3CFG1

PERF0CNT

INSTR3CFG2

INSTR4CFG0

INSTR4CFG1

INSTR4CFG2

INSTR5CFG0

INSTR5CFG1

INSTR5CFG2

INSTR6CFG0

INSTR6CFG1

INSTR6CFG2

INSTR7CFG0

INSTR7CFG1

INSTR7CFG2

CMD

PERF1CNT

IF

IEN

DEBUGEN

DEBUGSTEPCNT

FAULTSTATUS

FAULTADDR

PROGRAMSTATE

ARRAY0INDEXSTATE

ARRAY1INDEXSTATE

ARRAY2INDEXSTATE

ARRAY3INDEXSTATE

EN

ARRAY4INDEXSTATE

LOOP0STATE

LOOP1STATE

LOOP2STATE

LOOP3STATE

LOOP4STATE

LOOP5STATE

LOOP6STATE

LOOP7STATE

ALU0REGSTATE

ALU1REGSTATE

ALU2REGSTATE

ALU3REGSTATE

ALU4REGSTATE

ALU5REGSTATE

ALU6REGSTATE

SWRST

ALU7REGSTATE

ARRAY0ADDRCFG

ARRAY0DIM0CFG

ARRAY0DIM1CFG

ARRAY0DIM2CFG

ARRAY1ADDRCFG

ARRAY1DIM0CFG

ARRAY1DIM1CFG

ARRAY1DIM2CFG

ARRAY2ADDRCFG

ARRAY2DIM0CFG

ARRAY2DIM1CFG

ARRAY2DIM2CFG

ARRAY3ADDRCFG

ARRAY3DIM0CFG

ARRAY3DIM1CFG

CFG

ARRAY3DIM2CFG

ARRAY4ADDRCFG

ARRAY4DIM0CFG

ARRAY4DIM1CFG

ARRAY4DIM2CFG

LOOP0CFG

LOOP0RST

LOOP1CFG

LOOP1RST

LOOP2CFG

LOOP2RST

LOOP3CFG

LOOP3RST

LOOP4CFG

LOOP4RST

LOOP5CFG


IPVERSION

IP Version Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IPVERSION IPVERSION read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPVERSION

IPVERSION : IP Version ID
bits : 0 - 31 (32 bit)
access : read-only


STATUS

Status Register
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STATUS STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RUNNING PAUSED IDLE

RUNNING : Running Status
bits : 0 - 0 (1 bit)
access : read-only

PAUSED : Paused Status
bits : 1 - 1 (1 bit)
access : read-only

IDLE : Idle Status
bits : 2 - 2 (1 bit)
access : read-only


LOOP5RST

Loop N Reset Configuration Register
address_offset : 0x100 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP5RST LOOP5RST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ARRAY0RESETDIM0 ARRAY0RESETDIM1 ARRAY0RESETDIM2 ARRAY1RESETDIM0 ARRAY1RESETDIM1 ARRAY1RESETDIM2 ARRAY2RESETDIM0 ARRAY2RESETDIM1 ARRAY2RESETDIM2 ARRAY3RESETDIM0 ARRAY3RESETDIM1 ARRAY3RESETDIM2 ARRAY4RESETDIM0 ARRAY4RESETDIM1 ARRAY4RESETDIM2

ARRAY0RESETDIM0 : Reset Dimension 0
bits : 12 - 12 (1 bit)
access : read-write

ARRAY0RESETDIM1 : Reset Dimension 1
bits : 13 - 13 (1 bit)
access : read-write

ARRAY0RESETDIM2 : Reset Dimension 2
bits : 14 - 14 (1 bit)
access : read-write

ARRAY1RESETDIM0 : Reset Dimension 0
bits : 16 - 16 (1 bit)
access : read-write

ARRAY1RESETDIM1 : Reset Dimension 1
bits : 17 - 17 (1 bit)
access : read-write

ARRAY1RESETDIM2 : Reset Dimension 2
bits : 18 - 18 (1 bit)
access : read-write

ARRAY2RESETDIM0 : Reset Dimension 0
bits : 20 - 20 (1 bit)
access : read-write

ARRAY2RESETDIM1 : Reset Dimension 1
bits : 21 - 21 (1 bit)
access : read-write

ARRAY2RESETDIM2 : Reset Dimension 2
bits : 22 - 22 (1 bit)
access : read-write

ARRAY3RESETDIM0 : Reset Dimension 0
bits : 24 - 24 (1 bit)
access : read-write

ARRAY3RESETDIM1 : Reset Dimension 1
bits : 25 - 25 (1 bit)
access : read-write

ARRAY3RESETDIM2 : Reset Dimension 2
bits : 26 - 26 (1 bit)
access : read-write

ARRAY4RESETDIM0 : Reset Dimension 0
bits : 28 - 28 (1 bit)
access : read-write

ARRAY4RESETDIM1 : Reset Dimension 1
bits : 29 - 29 (1 bit)
access : read-write

ARRAY4RESETDIM2 : Reset Dimension 2
bits : 30 - 30 (1 bit)
access : read-write


LOOP6CFG

Loop N Configuration Register
address_offset : 0x104 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP6CFG LOOP6CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NUMITERS ARRAY0INCRDIM0 ARRAY0INCRDIM1 ARRAY0INCRDIM2 ARRAY1INCRDIM0 ARRAY1INCRDIM1 ARRAY1INCRDIM2 ARRAY2INCRDIM0 ARRAY2INCRDIM1 ARRAY2INCRDIM2 ARRAY3INCRDIM0 ARRAY3INCRDIM1 ARRAY3INCRDIM2 ARRAY4INCRDIM0 ARRAY4INCRDIM1 ARRAY4INCRDIM2

NUMITERS : Number of Iterations
bits : 0 - 9 (10 bit)
access : read-write

ARRAY0INCRDIM0 : Increment Dimension 0
bits : 12 - 12 (1 bit)
access : read-write

ARRAY0INCRDIM1 : Increment Dimension 1
bits : 13 - 13 (1 bit)
access : read-write

ARRAY0INCRDIM2 : Increment Dimension 2
bits : 14 - 14 (1 bit)
access : read-write

ARRAY1INCRDIM0 : Increment Dimension 0
bits : 16 - 16 (1 bit)
access : read-write

ARRAY1INCRDIM1 : Increment Dimension 1
bits : 17 - 17 (1 bit)
access : read-write

ARRAY1INCRDIM2 : Increment Dimension 2
bits : 18 - 18 (1 bit)
access : read-write

ARRAY2INCRDIM0 : Increment Dimension 0
bits : 20 - 20 (1 bit)
access : read-write

ARRAY2INCRDIM1 : Increment Dimension 1
bits : 21 - 21 (1 bit)
access : read-write

ARRAY2INCRDIM2 : Increment Dimension 2
bits : 22 - 22 (1 bit)
access : read-write

ARRAY3INCRDIM0 : Increment Dimension 0
bits : 24 - 24 (1 bit)
access : read-write

ARRAY3INCRDIM1 : Increment Dimension 1
bits : 25 - 25 (1 bit)
access : read-write

ARRAY3INCRDIM2 : Increment Dimension 2
bits : 26 - 26 (1 bit)
access : read-write

ARRAY4INCRDIM0 : Increment Dimension 0
bits : 28 - 28 (1 bit)
access : read-write

ARRAY4INCRDIM1 : Increment Dimension 1
bits : 29 - 29 (1 bit)
access : read-write

ARRAY4INCRDIM2 : Increment Dimension 2
bits : 30 - 30 (1 bit)
access : read-write


LOOP6RST

Loop N Reset Configuration Register
address_offset : 0x108 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP6RST LOOP6RST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ARRAY0RESETDIM0 ARRAY0RESETDIM1 ARRAY0RESETDIM2 ARRAY1RESETDIM0 ARRAY1RESETDIM1 ARRAY1RESETDIM2 ARRAY2RESETDIM0 ARRAY2RESETDIM1 ARRAY2RESETDIM2 ARRAY3RESETDIM0 ARRAY3RESETDIM1 ARRAY3RESETDIM2 ARRAY4RESETDIM0 ARRAY4RESETDIM1 ARRAY4RESETDIM2

ARRAY0RESETDIM0 : Reset Dimension 0
bits : 12 - 12 (1 bit)
access : read-write

ARRAY0RESETDIM1 : Reset Dimension 1
bits : 13 - 13 (1 bit)
access : read-write

ARRAY0RESETDIM2 : Reset Dimension 2
bits : 14 - 14 (1 bit)
access : read-write

ARRAY1RESETDIM0 : Reset Dimension 0
bits : 16 - 16 (1 bit)
access : read-write

ARRAY1RESETDIM1 : Reset Dimension 1
bits : 17 - 17 (1 bit)
access : read-write

ARRAY1RESETDIM2 : Reset Dimension 2
bits : 18 - 18 (1 bit)
access : read-write

ARRAY2RESETDIM0 : Reset Dimension 0
bits : 20 - 20 (1 bit)
access : read-write

ARRAY2RESETDIM1 : Reset Dimension 1
bits : 21 - 21 (1 bit)
access : read-write

ARRAY2RESETDIM2 : Reset Dimension 2
bits : 22 - 22 (1 bit)
access : read-write

ARRAY3RESETDIM0 : Reset Dimension 0
bits : 24 - 24 (1 bit)
access : read-write

ARRAY3RESETDIM1 : Reset Dimension 1
bits : 25 - 25 (1 bit)
access : read-write

ARRAY3RESETDIM2 : Reset Dimension 2
bits : 26 - 26 (1 bit)
access : read-write

ARRAY4RESETDIM0 : Reset Dimension 0
bits : 28 - 28 (1 bit)
access : read-write

ARRAY4RESETDIM1 : Reset Dimension 1
bits : 29 - 29 (1 bit)
access : read-write

ARRAY4RESETDIM2 : Reset Dimension 2
bits : 30 - 30 (1 bit)
access : read-write


LOOP7CFG

Loop N Configuration Register
address_offset : 0x10C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP7CFG LOOP7CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NUMITERS ARRAY0INCRDIM0 ARRAY0INCRDIM1 ARRAY0INCRDIM2 ARRAY1INCRDIM0 ARRAY1INCRDIM1 ARRAY1INCRDIM2 ARRAY2INCRDIM0 ARRAY2INCRDIM1 ARRAY2INCRDIM2 ARRAY3INCRDIM0 ARRAY3INCRDIM1 ARRAY3INCRDIM2 ARRAY4INCRDIM0 ARRAY4INCRDIM1 ARRAY4INCRDIM2

NUMITERS : Number of Iterations
bits : 0 - 9 (10 bit)
access : read-write

ARRAY0INCRDIM0 : Increment Dimension 0
bits : 12 - 12 (1 bit)
access : read-write

ARRAY0INCRDIM1 : Increment Dimension 1
bits : 13 - 13 (1 bit)
access : read-write

ARRAY0INCRDIM2 : Increment Dimension 2
bits : 14 - 14 (1 bit)
access : read-write

ARRAY1INCRDIM0 : Increment Dimension 0
bits : 16 - 16 (1 bit)
access : read-write

ARRAY1INCRDIM1 : Increment Dimension 1
bits : 17 - 17 (1 bit)
access : read-write

ARRAY1INCRDIM2 : Increment Dimension 2
bits : 18 - 18 (1 bit)
access : read-write

ARRAY2INCRDIM0 : Increment Dimension 0
bits : 20 - 20 (1 bit)
access : read-write

ARRAY2INCRDIM1 : Increment Dimension 1
bits : 21 - 21 (1 bit)
access : read-write

ARRAY2INCRDIM2 : Increment Dimension 2
bits : 22 - 22 (1 bit)
access : read-write

ARRAY3INCRDIM0 : Increment Dimension 0
bits : 24 - 24 (1 bit)
access : read-write

ARRAY3INCRDIM1 : Increment Dimension 1
bits : 25 - 25 (1 bit)
access : read-write

ARRAY3INCRDIM2 : Increment Dimension 2
bits : 26 - 26 (1 bit)
access : read-write

ARRAY4INCRDIM0 : Increment Dimension 0
bits : 28 - 28 (1 bit)
access : read-write

ARRAY4INCRDIM1 : Increment Dimension 1
bits : 29 - 29 (1 bit)
access : read-write

ARRAY4INCRDIM2 : Increment Dimension 2
bits : 30 - 30 (1 bit)
access : read-write


LOOP7RST

Loop N Reset Configuration Register
address_offset : 0x110 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP7RST LOOP7RST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ARRAY0RESETDIM0 ARRAY0RESETDIM1 ARRAY0RESETDIM2 ARRAY1RESETDIM0 ARRAY1RESETDIM1 ARRAY1RESETDIM2 ARRAY2RESETDIM0 ARRAY2RESETDIM1 ARRAY2RESETDIM2 ARRAY3RESETDIM0 ARRAY3RESETDIM1 ARRAY3RESETDIM2 ARRAY4RESETDIM0 ARRAY4RESETDIM1 ARRAY4RESETDIM2

ARRAY0RESETDIM0 : Reset Dimension 0
bits : 12 - 12 (1 bit)
access : read-write

ARRAY0RESETDIM1 : Reset Dimension 1
bits : 13 - 13 (1 bit)
access : read-write

ARRAY0RESETDIM2 : Reset Dimension 2
bits : 14 - 14 (1 bit)
access : read-write

ARRAY1RESETDIM0 : Reset Dimension 0
bits : 16 - 16 (1 bit)
access : read-write

ARRAY1RESETDIM1 : Reset Dimension 1
bits : 17 - 17 (1 bit)
access : read-write

ARRAY1RESETDIM2 : Reset Dimension 2
bits : 18 - 18 (1 bit)
access : read-write

ARRAY2RESETDIM0 : Reset Dimension 0
bits : 20 - 20 (1 bit)
access : read-write

ARRAY2RESETDIM1 : Reset Dimension 1
bits : 21 - 21 (1 bit)
access : read-write

ARRAY2RESETDIM2 : Reset Dimension 2
bits : 22 - 22 (1 bit)
access : read-write

ARRAY3RESETDIM0 : Reset Dimension 0
bits : 24 - 24 (1 bit)
access : read-write

ARRAY3RESETDIM1 : Reset Dimension 1
bits : 25 - 25 (1 bit)
access : read-write

ARRAY3RESETDIM2 : Reset Dimension 2
bits : 26 - 26 (1 bit)
access : read-write

ARRAY4RESETDIM0 : Reset Dimension 0
bits : 28 - 28 (1 bit)
access : read-write

ARRAY4RESETDIM1 : Reset Dimension 1
bits : 29 - 29 (1 bit)
access : read-write

ARRAY4RESETDIM2 : Reset Dimension 2
bits : 30 - 30 (1 bit)
access : read-write


INSTR0CFG0

Instruction N Word 0
address_offset : 0x114 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR0CFG0 INSTR0CFG0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ALUIN0REGID ALUIN0REALZERO ALUIN0REALNEGATE ALUIN0IMAGZERO ALUIN0IMAGNEGATE ALUIN1REGID ALUIN1REALZERO ALUIN1REALNEGATE ALUIN1IMAGZERO ALUIN1IMAGNEGATE ALUIN2REGID ALUIN2REALZERO ALUIN2REALNEGATE ALUIN2IMAGZERO ALUIN2IMAGNEGATE ALUOUTREGID

ALUIN0REGID : Register ID
bits : 0 - 2 (3 bit)
access : read-write

ALUIN0REALZERO : Real Zero
bits : 4 - 4 (1 bit)
access : read-write

ALUIN0REALNEGATE : Real Negate
bits : 5 - 5 (1 bit)
access : read-write

ALUIN0IMAGZERO : Imaginary Not Zero
bits : 6 - 6 (1 bit)
access : read-write

ALUIN0IMAGNEGATE : Imaginary Negate
bits : 7 - 7 (1 bit)
access : read-write

ALUIN1REGID : Register ID
bits : 8 - 10 (3 bit)
access : read-write

ALUIN1REALZERO : Real Zero
bits : 12 - 12 (1 bit)
access : read-write

ALUIN1REALNEGATE : Real Negate
bits : 13 - 13 (1 bit)
access : read-write

ALUIN1IMAGZERO : Imaginary Not Zero
bits : 14 - 14 (1 bit)
access : read-write

ALUIN1IMAGNEGATE : Imaginary Negate
bits : 15 - 15 (1 bit)
access : read-write

ALUIN2REGID : Register ID
bits : 16 - 18 (3 bit)
access : read-write

ALUIN2REALZERO : Real Zero
bits : 20 - 20 (1 bit)
access : read-write

ALUIN2REALNEGATE : Real Negate
bits : 21 - 21 (1 bit)
access : read-write

ALUIN2IMAGZERO : Imaginary Not Zero
bits : 22 - 22 (1 bit)
access : read-write

ALUIN2IMAGNEGATE : Imaginary Negate
bits : 23 - 23 (1 bit)
access : read-write

ALUOUTREGID : Register ID
bits : 28 - 30 (3 bit)
access : read-write


INSTR0CFG1

Instruction N word 1
address_offset : 0x118 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR0CFG1 INSTR0CFG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ISTREAM0REGID ISTREAM0LOAD ISTREAM0ARRAYID ISTREAM0ARRAYINCRDIM0 ISTREAM0ARRAYINCRDIM1 ISTREAM0ARRAYINCRDIM2 ISTREAM1REGID ISTREAM1LOAD ISTREAM1ARRAYID ISTREAM1ARRAYINCRDIM0 ISTREAM1ARRAYINCRDIM1 ISTREAM1ARRAYINCRDIM2 OSTREAMREGID OSTREAMSTORE OSTREAMARRAYID OSTREAMARRAYINCRDIM0 OSTREAMARRAYINCRDIM1 OSTREAMARRAYINCRDIM2

ISTREAM0REGID : Register ID
bits : 0 - 2 (3 bit)
access : read-write

ISTREAM0LOAD : Load register
bits : 3 - 3 (1 bit)
access : read-write

ISTREAM0ARRAYID : Array ID
bits : 4 - 6 (3 bit)
access : read-write

ISTREAM0ARRAYINCRDIM0 : Increment Array Dimension 0
bits : 7 - 7 (1 bit)
access : read-write

ISTREAM0ARRAYINCRDIM1 : Increment Array Dimension 1
bits : 8 - 8 (1 bit)
access : read-write

ISTREAM0ARRAYINCRDIM2 : Increment Array Dimension 2
bits : 9 - 9 (1 bit)
access : read-write

ISTREAM1REGID : Register ID
bits : 10 - 12 (3 bit)
access : read-write

ISTREAM1LOAD : Load register
bits : 13 - 13 (1 bit)
access : read-write

ISTREAM1ARRAYID : Array ID
bits : 14 - 16 (3 bit)
access : read-write

ISTREAM1ARRAYINCRDIM0 : Increment Array Dimension 0
bits : 17 - 17 (1 bit)
access : read-write

ISTREAM1ARRAYINCRDIM1 : Increment Array Dimension 1
bits : 18 - 18 (1 bit)
access : read-write

ISTREAM1ARRAYINCRDIM2 : Increment Array Dimension 2
bits : 19 - 19 (1 bit)
access : read-write

OSTREAMREGID : Register ID
bits : 20 - 22 (3 bit)
access : read-write

OSTREAMSTORE : Store to Register
bits : 23 - 23 (1 bit)
access : read-write

OSTREAMARRAYID : Array ID
bits : 24 - 26 (3 bit)
access : read-write

OSTREAMARRAYINCRDIM0 : Increment Array Dimension 0
bits : 27 - 27 (1 bit)
access : read-write

OSTREAMARRAYINCRDIM1 : Increment Array Dimension 1
bits : 28 - 28 (1 bit)
access : read-write

OSTREAMARRAYINCRDIM2 : Increment Array Dimension 2
bits : 29 - 29 (1 bit)
access : read-write


INSTR0CFG2

Instruction N word 2
address_offset : 0x11C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR0CFG2 INSTR0CFG2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOOP0BEGIN LOOP0END LOOP1BEGIN LOOP1END LOOP2BEGIN LOOP2END LOOP3BEGIN LOOP3END LOOP4BEGIN LOOP4END LOOP5BEGIN LOOP5END LOOP6BEGIN LOOP6END LOOP7BEGIN LOOP7END ALUOP ENDPROG

LOOP0BEGIN : Loop Begin
bits : 0 - 0 (1 bit)
access : read-write

LOOP0END : Loop End
bits : 1 - 1 (1 bit)
access : read-write

LOOP1BEGIN : Loop Begin
bits : 2 - 2 (1 bit)
access : read-write

LOOP1END : Loop End
bits : 3 - 3 (1 bit)
access : read-write

LOOP2BEGIN : Loop Begin
bits : 4 - 4 (1 bit)
access : read-write

LOOP2END : Loop End
bits : 5 - 5 (1 bit)
access : read-write

LOOP3BEGIN : Loop Begin
bits : 6 - 6 (1 bit)
access : read-write

LOOP3END : Loop End
bits : 7 - 7 (1 bit)
access : read-write

LOOP4BEGIN : Loop Begin
bits : 8 - 8 (1 bit)
access : read-write

LOOP4END : Loop End
bits : 9 - 9 (1 bit)
access : read-write

LOOP5BEGIN : Loop Begin
bits : 10 - 10 (1 bit)
access : read-write

LOOP5END : Loop End
bits : 11 - 11 (1 bit)
access : read-write

LOOP6BEGIN : Loop Begin
bits : 12 - 12 (1 bit)
access : read-write

LOOP6END : Loop End
bits : 13 - 13 (1 bit)
access : read-write

LOOP7BEGIN : Loop Begin
bits : 14 - 14 (1 bit)
access : read-write

LOOP7END : Loop End
bits : 15 - 15 (1 bit)
access : read-write

ALUOP : ALU opcode
bits : 20 - 28 (9 bit)
access : read-write

Enumeration:

0 : NOOP

No Operation

1 : CLEAR

Clear register (set to +0)

65 : COPY

Copy operation

66 : SWAP

Swap operation

67 : DBL

Double operation (multiply by 2)

68 : FANA

Load real and imag (form A)

69 : FANB

Load real and imag (form B)

70 : RELU2

ReLU of real (max of real and +0)

71 : NRELU2

Min of real and -0

72 : INC2

Increment by 1.0

73 : DEC2

Decrement by 1.0

74 : ADDR

Addition of 2 reals

75 : MAX

Maximum of 2 reals

76 : MIN

Minimum of 2 reals

292 : RSQR2B

Square of real (form B)

334 : ADDC

Add Complex

339 : MAX2A

Max of reals (form A)

340 : MIN2A

Min of reals (form A)

350 : XREALC2

Extract real from complex

351 : XIMAGC2

Extract imag from complex

353 : ADDR2B

Add reals (form B)

354 : MAX2B

Max of reals (form B)

355 : MIN2B

Min of reals (form B)

397 : MULC

Multiply Complex

407 : MULR2A

Multiply reals (form A)

408 : MULR2B

Multiply reals (form B)

410 : ADDR4

Add 4 reals

411 : MAX4

Max of 4 reals

412 : MIN4

Min of 4 reals

413 : SQRMAGC2

Squared magnitude Complex

416 : PRELU2B

Parametric ReLU (form B)

461 : MACC

Multiply Accumulate Complex

462 : AACC

Add Accumulate Complex

463 : ELU2A

part of ELU activation (form A)

464 : ELU2B

part of ELU activation (form B)

465 : IFR2A

If A then X else Y (form A)

466 : IFR2B

If A then X else Y (form B)

467 : MAXAC2

Max of reals and accumulator

468 : MINAC2

Min of reals and accumulators

469 : CLIP2A

Clipping activation (form A)

470 : CLIP2B

Clipping activation (form B)

471 : MACR2A

Multiply accumulate reals (form A)

472 : MACR2B

Multiply accumulate reals (form B)

473 : IFC

If A then X else Y (complex)

End of enumeration elements list.

ENDPROG : End of Program
bits : 31 - 31 (1 bit)
access : read-write


INSTR1CFG0

Instruction N Word 0
address_offset : 0x120 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR1CFG0 INSTR1CFG0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ALUIN0REGID ALUIN0REALZERO ALUIN0REALNEGATE ALUIN0IMAGZERO ALUIN0IMAGNEGATE ALUIN1REGID ALUIN1REALZERO ALUIN1REALNEGATE ALUIN1IMAGZERO ALUIN1IMAGNEGATE ALUIN2REGID ALUIN2REALZERO ALUIN2REALNEGATE ALUIN2IMAGZERO ALUIN2IMAGNEGATE ALUOUTREGID

ALUIN0REGID : Register ID
bits : 0 - 2 (3 bit)
access : read-write

ALUIN0REALZERO : Real Zero
bits : 4 - 4 (1 bit)
access : read-write

ALUIN0REALNEGATE : Real Negate
bits : 5 - 5 (1 bit)
access : read-write

ALUIN0IMAGZERO : Imaginary Not Zero
bits : 6 - 6 (1 bit)
access : read-write

ALUIN0IMAGNEGATE : Imaginary Negate
bits : 7 - 7 (1 bit)
access : read-write

ALUIN1REGID : Register ID
bits : 8 - 10 (3 bit)
access : read-write

ALUIN1REALZERO : Real Zero
bits : 12 - 12 (1 bit)
access : read-write

ALUIN1REALNEGATE : Real Negate
bits : 13 - 13 (1 bit)
access : read-write

ALUIN1IMAGZERO : Imaginary Not Zero
bits : 14 - 14 (1 bit)
access : read-write

ALUIN1IMAGNEGATE : Imaginary Negate
bits : 15 - 15 (1 bit)
access : read-write

ALUIN2REGID : Register ID
bits : 16 - 18 (3 bit)
access : read-write

ALUIN2REALZERO : Real Zero
bits : 20 - 20 (1 bit)
access : read-write

ALUIN2REALNEGATE : Real Negate
bits : 21 - 21 (1 bit)
access : read-write

ALUIN2IMAGZERO : Imaginary Not Zero
bits : 22 - 22 (1 bit)
access : read-write

ALUIN2IMAGNEGATE : Imaginary Negate
bits : 23 - 23 (1 bit)
access : read-write

ALUOUTREGID : Register ID
bits : 28 - 30 (3 bit)
access : read-write


INSTR1CFG1

Instruction N word 1
address_offset : 0x124 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR1CFG1 INSTR1CFG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ISTREAM0REGID ISTREAM0LOAD ISTREAM0ARRAYID ISTREAM0ARRAYINCRDIM0 ISTREAM0ARRAYINCRDIM1 ISTREAM0ARRAYINCRDIM2 ISTREAM1REGID ISTREAM1LOAD ISTREAM1ARRAYID ISTREAM1ARRAYINCRDIM0 ISTREAM1ARRAYINCRDIM1 ISTREAM1ARRAYINCRDIM2 OSTREAMREGID OSTREAMSTORE OSTREAMARRAYID OSTREAMARRAYINCRDIM0 OSTREAMARRAYINCRDIM1 OSTREAMARRAYINCRDIM2

ISTREAM0REGID : Register ID
bits : 0 - 2 (3 bit)
access : read-write

ISTREAM0LOAD : Load register
bits : 3 - 3 (1 bit)
access : read-write

ISTREAM0ARRAYID : Array ID
bits : 4 - 6 (3 bit)
access : read-write

ISTREAM0ARRAYINCRDIM0 : Increment Array Dimension 0
bits : 7 - 7 (1 bit)
access : read-write

ISTREAM0ARRAYINCRDIM1 : Increment Array Dimension 1
bits : 8 - 8 (1 bit)
access : read-write

ISTREAM0ARRAYINCRDIM2 : Increment Array Dimension 2
bits : 9 - 9 (1 bit)
access : read-write

ISTREAM1REGID : Register ID
bits : 10 - 12 (3 bit)
access : read-write

ISTREAM1LOAD : Load register
bits : 13 - 13 (1 bit)
access : read-write

ISTREAM1ARRAYID : Array ID
bits : 14 - 16 (3 bit)
access : read-write

ISTREAM1ARRAYINCRDIM0 : Increment Array Dimension 0
bits : 17 - 17 (1 bit)
access : read-write

ISTREAM1ARRAYINCRDIM1 : Increment Array Dimension 1
bits : 18 - 18 (1 bit)
access : read-write

ISTREAM1ARRAYINCRDIM2 : Increment Array Dimension 2
bits : 19 - 19 (1 bit)
access : read-write

OSTREAMREGID : Register ID
bits : 20 - 22 (3 bit)
access : read-write

OSTREAMSTORE : Store to Register
bits : 23 - 23 (1 bit)
access : read-write

OSTREAMARRAYID : Array ID
bits : 24 - 26 (3 bit)
access : read-write

OSTREAMARRAYINCRDIM0 : Increment Array Dimension 0
bits : 27 - 27 (1 bit)
access : read-write

OSTREAMARRAYINCRDIM1 : Increment Array Dimension 1
bits : 28 - 28 (1 bit)
access : read-write

OSTREAMARRAYINCRDIM2 : Increment Array Dimension 2
bits : 29 - 29 (1 bit)
access : read-write


INSTR1CFG2

Instruction N word 2
address_offset : 0x128 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR1CFG2 INSTR1CFG2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOOP0BEGIN LOOP0END LOOP1BEGIN LOOP1END LOOP2BEGIN LOOP2END LOOP3BEGIN LOOP3END LOOP4BEGIN LOOP4END LOOP5BEGIN LOOP5END LOOP6BEGIN LOOP6END LOOP7BEGIN LOOP7END ALUOP ENDPROG

LOOP0BEGIN : Loop Begin
bits : 0 - 0 (1 bit)
access : read-write

LOOP0END : Loop End
bits : 1 - 1 (1 bit)
access : read-write

LOOP1BEGIN : Loop Begin
bits : 2 - 2 (1 bit)
access : read-write

LOOP1END : Loop End
bits : 3 - 3 (1 bit)
access : read-write

LOOP2BEGIN : Loop Begin
bits : 4 - 4 (1 bit)
access : read-write

LOOP2END : Loop End
bits : 5 - 5 (1 bit)
access : read-write

LOOP3BEGIN : Loop Begin
bits : 6 - 6 (1 bit)
access : read-write

LOOP3END : Loop End
bits : 7 - 7 (1 bit)
access : read-write

LOOP4BEGIN : Loop Begin
bits : 8 - 8 (1 bit)
access : read-write

LOOP4END : Loop End
bits : 9 - 9 (1 bit)
access : read-write

LOOP5BEGIN : Loop Begin
bits : 10 - 10 (1 bit)
access : read-write

LOOP5END : Loop End
bits : 11 - 11 (1 bit)
access : read-write

LOOP6BEGIN : Loop Begin
bits : 12 - 12 (1 bit)
access : read-write

LOOP6END : Loop End
bits : 13 - 13 (1 bit)
access : read-write

LOOP7BEGIN : Loop Begin
bits : 14 - 14 (1 bit)
access : read-write

LOOP7END : Loop End
bits : 15 - 15 (1 bit)
access : read-write

ALUOP : ALU opcode
bits : 20 - 28 (9 bit)
access : read-write

Enumeration:

0 : NOOP

No Operation

1 : CLEAR

Clear register (set to +0)

65 : COPY

Copy operation

66 : SWAP

Swap operation

67 : DBL

Double operation (multiply by 2)

68 : FANA

Load real and imag (form A)

69 : FANB

Load real and imag (form B)

70 : RELU2

ReLU of real (max of real and +0)

71 : NRELU2

Min of real and -0

72 : INC2

Increment by 1.0

73 : DEC2

Decrement by 1.0

74 : ADDR

Addition of 2 reals

75 : MAX

Maximum of 2 reals

76 : MIN

Minimum of 2 reals

292 : RSQR2B

Square of real (form B)

334 : ADDC

Add Complex

339 : MAX2A

Max of reals (form A)

340 : MIN2A

Min of reals (form A)

350 : XREALC2

Extract real from complex

351 : XIMAGC2

Extract imag from complex

353 : ADDR2B

Add reals (form B)

354 : MAX2B

Max of reals (form B)

355 : MIN2B

Min of reals (form B)

397 : MULC

Multiply Complex

407 : MULR2A

Multiply reals (form A)

408 : MULR2B

Multiply reals (form B)

410 : ADDR4

Add 4 reals

411 : MAX4

Max of 4 reals

412 : MIN4

Min of 4 reals

413 : SQRMAGC2

Squared magnitude Complex

416 : PRELU2B

Parametric ReLU (form B)

461 : MACC

Multiply Accumulate Complex

462 : AACC

Add Accumulate Complex

463 : ELU2A

part of ELU activation (form A)

464 : ELU2B

part of ELU activation (form B)

465 : IFR2A

If A then X else Y (form A)

466 : IFR2B

If A then X else Y (form B)

467 : MAXAC2

Max of reals and accumulator

468 : MINAC2

Min of reals and accumulators

469 : CLIP2A

Clipping activation (form A)

470 : CLIP2B

Clipping activation (form B)

471 : MACR2A

Multiply accumulate reals (form A)

472 : MACR2B

Multiply accumulate reals (form B)

473 : IFC

If A then X else Y (complex)

End of enumeration elements list.

ENDPROG : End of Program
bits : 31 - 31 (1 bit)
access : read-write


INSTR2CFG0

Instruction N Word 0
address_offset : 0x12C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR2CFG0 INSTR2CFG0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ALUIN0REGID ALUIN0REALZERO ALUIN0REALNEGATE ALUIN0IMAGZERO ALUIN0IMAGNEGATE ALUIN1REGID ALUIN1REALZERO ALUIN1REALNEGATE ALUIN1IMAGZERO ALUIN1IMAGNEGATE ALUIN2REGID ALUIN2REALZERO ALUIN2REALNEGATE ALUIN2IMAGZERO ALUIN2IMAGNEGATE ALUOUTREGID

ALUIN0REGID : Register ID
bits : 0 - 2 (3 bit)
access : read-write

ALUIN0REALZERO : Real Zero
bits : 4 - 4 (1 bit)
access : read-write

ALUIN0REALNEGATE : Real Negate
bits : 5 - 5 (1 bit)
access : read-write

ALUIN0IMAGZERO : Imaginary Not Zero
bits : 6 - 6 (1 bit)
access : read-write

ALUIN0IMAGNEGATE : Imaginary Negate
bits : 7 - 7 (1 bit)
access : read-write

ALUIN1REGID : Register ID
bits : 8 - 10 (3 bit)
access : read-write

ALUIN1REALZERO : Real Zero
bits : 12 - 12 (1 bit)
access : read-write

ALUIN1REALNEGATE : Real Negate
bits : 13 - 13 (1 bit)
access : read-write

ALUIN1IMAGZERO : Imaginary Not Zero
bits : 14 - 14 (1 bit)
access : read-write

ALUIN1IMAGNEGATE : Imaginary Negate
bits : 15 - 15 (1 bit)
access : read-write

ALUIN2REGID : Register ID
bits : 16 - 18 (3 bit)
access : read-write

ALUIN2REALZERO : Real Zero
bits : 20 - 20 (1 bit)
access : read-write

ALUIN2REALNEGATE : Real Negate
bits : 21 - 21 (1 bit)
access : read-write

ALUIN2IMAGZERO : Imaginary Not Zero
bits : 22 - 22 (1 bit)
access : read-write

ALUIN2IMAGNEGATE : Imaginary Negate
bits : 23 - 23 (1 bit)
access : read-write

ALUOUTREGID : Register ID
bits : 28 - 30 (3 bit)
access : read-write


INSTR2CFG1

Instruction N word 1
address_offset : 0x130 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR2CFG1 INSTR2CFG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ISTREAM0REGID ISTREAM0LOAD ISTREAM0ARRAYID ISTREAM0ARRAYINCRDIM0 ISTREAM0ARRAYINCRDIM1 ISTREAM0ARRAYINCRDIM2 ISTREAM1REGID ISTREAM1LOAD ISTREAM1ARRAYID ISTREAM1ARRAYINCRDIM0 ISTREAM1ARRAYINCRDIM1 ISTREAM1ARRAYINCRDIM2 OSTREAMREGID OSTREAMSTORE OSTREAMARRAYID OSTREAMARRAYINCRDIM0 OSTREAMARRAYINCRDIM1 OSTREAMARRAYINCRDIM2

ISTREAM0REGID : Register ID
bits : 0 - 2 (3 bit)
access : read-write

ISTREAM0LOAD : Load register
bits : 3 - 3 (1 bit)
access : read-write

ISTREAM0ARRAYID : Array ID
bits : 4 - 6 (3 bit)
access : read-write

ISTREAM0ARRAYINCRDIM0 : Increment Array Dimension 0
bits : 7 - 7 (1 bit)
access : read-write

ISTREAM0ARRAYINCRDIM1 : Increment Array Dimension 1
bits : 8 - 8 (1 bit)
access : read-write

ISTREAM0ARRAYINCRDIM2 : Increment Array Dimension 2
bits : 9 - 9 (1 bit)
access : read-write

ISTREAM1REGID : Register ID
bits : 10 - 12 (3 bit)
access : read-write

ISTREAM1LOAD : Load register
bits : 13 - 13 (1 bit)
access : read-write

ISTREAM1ARRAYID : Array ID
bits : 14 - 16 (3 bit)
access : read-write

ISTREAM1ARRAYINCRDIM0 : Increment Array Dimension 0
bits : 17 - 17 (1 bit)
access : read-write

ISTREAM1ARRAYINCRDIM1 : Increment Array Dimension 1
bits : 18 - 18 (1 bit)
access : read-write

ISTREAM1ARRAYINCRDIM2 : Increment Array Dimension 2
bits : 19 - 19 (1 bit)
access : read-write

OSTREAMREGID : Register ID
bits : 20 - 22 (3 bit)
access : read-write

OSTREAMSTORE : Store to Register
bits : 23 - 23 (1 bit)
access : read-write

OSTREAMARRAYID : Array ID
bits : 24 - 26 (3 bit)
access : read-write

OSTREAMARRAYINCRDIM0 : Increment Array Dimension 0
bits : 27 - 27 (1 bit)
access : read-write

OSTREAMARRAYINCRDIM1 : Increment Array Dimension 1
bits : 28 - 28 (1 bit)
access : read-write

OSTREAMARRAYINCRDIM2 : Increment Array Dimension 2
bits : 29 - 29 (1 bit)
access : read-write


INSTR2CFG2

Instruction N word 2
address_offset : 0x134 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR2CFG2 INSTR2CFG2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOOP0BEGIN LOOP0END LOOP1BEGIN LOOP1END LOOP2BEGIN LOOP2END LOOP3BEGIN LOOP3END LOOP4BEGIN LOOP4END LOOP5BEGIN LOOP5END LOOP6BEGIN LOOP6END LOOP7BEGIN LOOP7END ALUOP ENDPROG

LOOP0BEGIN : Loop Begin
bits : 0 - 0 (1 bit)
access : read-write

LOOP0END : Loop End
bits : 1 - 1 (1 bit)
access : read-write

LOOP1BEGIN : Loop Begin
bits : 2 - 2 (1 bit)
access : read-write

LOOP1END : Loop End
bits : 3 - 3 (1 bit)
access : read-write

LOOP2BEGIN : Loop Begin
bits : 4 - 4 (1 bit)
access : read-write

LOOP2END : Loop End
bits : 5 - 5 (1 bit)
access : read-write

LOOP3BEGIN : Loop Begin
bits : 6 - 6 (1 bit)
access : read-write

LOOP3END : Loop End
bits : 7 - 7 (1 bit)
access : read-write

LOOP4BEGIN : Loop Begin
bits : 8 - 8 (1 bit)
access : read-write

LOOP4END : Loop End
bits : 9 - 9 (1 bit)
access : read-write

LOOP5BEGIN : Loop Begin
bits : 10 - 10 (1 bit)
access : read-write

LOOP5END : Loop End
bits : 11 - 11 (1 bit)
access : read-write

LOOP6BEGIN : Loop Begin
bits : 12 - 12 (1 bit)
access : read-write

LOOP6END : Loop End
bits : 13 - 13 (1 bit)
access : read-write

LOOP7BEGIN : Loop Begin
bits : 14 - 14 (1 bit)
access : read-write

LOOP7END : Loop End
bits : 15 - 15 (1 bit)
access : read-write

ALUOP : ALU opcode
bits : 20 - 28 (9 bit)
access : read-write

Enumeration:

0 : NOOP

No Operation

1 : CLEAR

Clear register (set to +0)

65 : COPY

Copy operation

66 : SWAP

Swap operation

67 : DBL

Double operation (multiply by 2)

68 : FANA

Load real and imag (form A)

69 : FANB

Load real and imag (form B)

70 : RELU2

ReLU of real (max of real and +0)

71 : NRELU2

Min of real and -0

72 : INC2

Increment by 1.0

73 : DEC2

Decrement by 1.0

74 : ADDR

Addition of 2 reals

75 : MAX

Maximum of 2 reals

76 : MIN

Minimum of 2 reals

292 : RSQR2B

Square of real (form B)

334 : ADDC

Add Complex

339 : MAX2A

Max of reals (form A)

340 : MIN2A

Min of reals (form A)

350 : XREALC2

Extract real from complex

351 : XIMAGC2

Extract imag from complex

353 : ADDR2B

Add reals (form B)

354 : MAX2B

Max of reals (form B)

355 : MIN2B

Min of reals (form B)

397 : MULC

Multiply Complex

407 : MULR2A

Multiply reals (form A)

408 : MULR2B

Multiply reals (form B)

410 : ADDR4

Add 4 reals

411 : MAX4

Max of 4 reals

412 : MIN4

Min of 4 reals

413 : SQRMAGC2

Squared magnitude Complex

416 : PRELU2B

Parametric ReLU (form B)

461 : MACC

Multiply Accumulate Complex

462 : AACC

Add Accumulate Complex

463 : ELU2A

part of ELU activation (form A)

464 : ELU2B

part of ELU activation (form B)

465 : IFR2A

If A then X else Y (form A)

466 : IFR2B

If A then X else Y (form B)

467 : MAXAC2

Max of reals and accumulator

468 : MINAC2

Min of reals and accumulators

469 : CLIP2A

Clipping activation (form A)

470 : CLIP2B

Clipping activation (form B)

471 : MACR2A

Multiply accumulate reals (form A)

472 : MACR2B

Multiply accumulate reals (form B)

473 : IFC

If A then X else Y (complex)

End of enumeration elements list.

ENDPROG : End of Program
bits : 31 - 31 (1 bit)
access : read-write


INSTR3CFG0

Instruction N Word 0
address_offset : 0x138 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR3CFG0 INSTR3CFG0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ALUIN0REGID ALUIN0REALZERO ALUIN0REALNEGATE ALUIN0IMAGZERO ALUIN0IMAGNEGATE ALUIN1REGID ALUIN1REALZERO ALUIN1REALNEGATE ALUIN1IMAGZERO ALUIN1IMAGNEGATE ALUIN2REGID ALUIN2REALZERO ALUIN2REALNEGATE ALUIN2IMAGZERO ALUIN2IMAGNEGATE ALUOUTREGID

ALUIN0REGID : Register ID
bits : 0 - 2 (3 bit)
access : read-write

ALUIN0REALZERO : Real Zero
bits : 4 - 4 (1 bit)
access : read-write

ALUIN0REALNEGATE : Real Negate
bits : 5 - 5 (1 bit)
access : read-write

ALUIN0IMAGZERO : Imaginary Not Zero
bits : 6 - 6 (1 bit)
access : read-write

ALUIN0IMAGNEGATE : Imaginary Negate
bits : 7 - 7 (1 bit)
access : read-write

ALUIN1REGID : Register ID
bits : 8 - 10 (3 bit)
access : read-write

ALUIN1REALZERO : Real Zero
bits : 12 - 12 (1 bit)
access : read-write

ALUIN1REALNEGATE : Real Negate
bits : 13 - 13 (1 bit)
access : read-write

ALUIN1IMAGZERO : Imaginary Not Zero
bits : 14 - 14 (1 bit)
access : read-write

ALUIN1IMAGNEGATE : Imaginary Negate
bits : 15 - 15 (1 bit)
access : read-write

ALUIN2REGID : Register ID
bits : 16 - 18 (3 bit)
access : read-write

ALUIN2REALZERO : Real Zero
bits : 20 - 20 (1 bit)
access : read-write

ALUIN2REALNEGATE : Real Negate
bits : 21 - 21 (1 bit)
access : read-write

ALUIN2IMAGZERO : Imaginary Not Zero
bits : 22 - 22 (1 bit)
access : read-write

ALUIN2IMAGNEGATE : Imaginary Negate
bits : 23 - 23 (1 bit)
access : read-write

ALUOUTREGID : Register ID
bits : 28 - 30 (3 bit)
access : read-write


INSTR3CFG1

Instruction N word 1
address_offset : 0x13C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR3CFG1 INSTR3CFG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ISTREAM0REGID ISTREAM0LOAD ISTREAM0ARRAYID ISTREAM0ARRAYINCRDIM0 ISTREAM0ARRAYINCRDIM1 ISTREAM0ARRAYINCRDIM2 ISTREAM1REGID ISTREAM1LOAD ISTREAM1ARRAYID ISTREAM1ARRAYINCRDIM0 ISTREAM1ARRAYINCRDIM1 ISTREAM1ARRAYINCRDIM2 OSTREAMREGID OSTREAMSTORE OSTREAMARRAYID OSTREAMARRAYINCRDIM0 OSTREAMARRAYINCRDIM1 OSTREAMARRAYINCRDIM2

ISTREAM0REGID : Register ID
bits : 0 - 2 (3 bit)
access : read-write

ISTREAM0LOAD : Load register
bits : 3 - 3 (1 bit)
access : read-write

ISTREAM0ARRAYID : Array ID
bits : 4 - 6 (3 bit)
access : read-write

ISTREAM0ARRAYINCRDIM0 : Increment Array Dimension 0
bits : 7 - 7 (1 bit)
access : read-write

ISTREAM0ARRAYINCRDIM1 : Increment Array Dimension 1
bits : 8 - 8 (1 bit)
access : read-write

ISTREAM0ARRAYINCRDIM2 : Increment Array Dimension 2
bits : 9 - 9 (1 bit)
access : read-write

ISTREAM1REGID : Register ID
bits : 10 - 12 (3 bit)
access : read-write

ISTREAM1LOAD : Load register
bits : 13 - 13 (1 bit)
access : read-write

ISTREAM1ARRAYID : Array ID
bits : 14 - 16 (3 bit)
access : read-write

ISTREAM1ARRAYINCRDIM0 : Increment Array Dimension 0
bits : 17 - 17 (1 bit)
access : read-write

ISTREAM1ARRAYINCRDIM1 : Increment Array Dimension 1
bits : 18 - 18 (1 bit)
access : read-write

ISTREAM1ARRAYINCRDIM2 : Increment Array Dimension 2
bits : 19 - 19 (1 bit)
access : read-write

OSTREAMREGID : Register ID
bits : 20 - 22 (3 bit)
access : read-write

OSTREAMSTORE : Store to Register
bits : 23 - 23 (1 bit)
access : read-write

OSTREAMARRAYID : Array ID
bits : 24 - 26 (3 bit)
access : read-write

OSTREAMARRAYINCRDIM0 : Increment Array Dimension 0
bits : 27 - 27 (1 bit)
access : read-write

OSTREAMARRAYINCRDIM1 : Increment Array Dimension 1
bits : 28 - 28 (1 bit)
access : read-write

OSTREAMARRAYINCRDIM2 : Increment Array Dimension 2
bits : 29 - 29 (1 bit)
access : read-write


PERF0CNT

Run Counter
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PERF0CNT PERF0CNT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COUNT

COUNT : Performance Counter
bits : 0 - 23 (24 bit)
access : read-only


INSTR3CFG2

Instruction N word 2
address_offset : 0x140 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR3CFG2 INSTR3CFG2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOOP0BEGIN LOOP0END LOOP1BEGIN LOOP1END LOOP2BEGIN LOOP2END LOOP3BEGIN LOOP3END LOOP4BEGIN LOOP4END LOOP5BEGIN LOOP5END LOOP6BEGIN LOOP6END LOOP7BEGIN LOOP7END ALUOP ENDPROG

LOOP0BEGIN : Loop Begin
bits : 0 - 0 (1 bit)
access : read-write

LOOP0END : Loop End
bits : 1 - 1 (1 bit)
access : read-write

LOOP1BEGIN : Loop Begin
bits : 2 - 2 (1 bit)
access : read-write

LOOP1END : Loop End
bits : 3 - 3 (1 bit)
access : read-write

LOOP2BEGIN : Loop Begin
bits : 4 - 4 (1 bit)
access : read-write

LOOP2END : Loop End
bits : 5 - 5 (1 bit)
access : read-write

LOOP3BEGIN : Loop Begin
bits : 6 - 6 (1 bit)
access : read-write

LOOP3END : Loop End
bits : 7 - 7 (1 bit)
access : read-write

LOOP4BEGIN : Loop Begin
bits : 8 - 8 (1 bit)
access : read-write

LOOP4END : Loop End
bits : 9 - 9 (1 bit)
access : read-write

LOOP5BEGIN : Loop Begin
bits : 10 - 10 (1 bit)
access : read-write

LOOP5END : Loop End
bits : 11 - 11 (1 bit)
access : read-write

LOOP6BEGIN : Loop Begin
bits : 12 - 12 (1 bit)
access : read-write

LOOP6END : Loop End
bits : 13 - 13 (1 bit)
access : read-write

LOOP7BEGIN : Loop Begin
bits : 14 - 14 (1 bit)
access : read-write

LOOP7END : Loop End
bits : 15 - 15 (1 bit)
access : read-write

ALUOP : ALU opcode
bits : 20 - 28 (9 bit)
access : read-write

Enumeration:

0 : NOOP

No Operation

1 : CLEAR

Clear register (set to +0)

65 : COPY

Copy operation

66 : SWAP

Swap operation

67 : DBL

Double operation (multiply by 2)

68 : FANA

Load real and imag (form A)

69 : FANB

Load real and imag (form B)

70 : RELU2

ReLU of real (max of real and +0)

71 : NRELU2

Min of real and -0

72 : INC2

Increment by 1.0

73 : DEC2

Decrement by 1.0

74 : ADDR

Addition of 2 reals

75 : MAX

Maximum of 2 reals

76 : MIN

Minimum of 2 reals

292 : RSQR2B

Square of real (form B)

334 : ADDC

Add Complex

339 : MAX2A

Max of reals (form A)

340 : MIN2A

Min of reals (form A)

350 : XREALC2

Extract real from complex

351 : XIMAGC2

Extract imag from complex

353 : ADDR2B

Add reals (form B)

354 : MAX2B

Max of reals (form B)

355 : MIN2B

Min of reals (form B)

397 : MULC

Multiply Complex

407 : MULR2A

Multiply reals (form A)

408 : MULR2B

Multiply reals (form B)

410 : ADDR4

Add 4 reals

411 : MAX4

Max of 4 reals

412 : MIN4

Min of 4 reals

413 : SQRMAGC2

Squared magnitude Complex

416 : PRELU2B

Parametric ReLU (form B)

461 : MACC

Multiply Accumulate Complex

462 : AACC

Add Accumulate Complex

463 : ELU2A

part of ELU activation (form A)

464 : ELU2B

part of ELU activation (form B)

465 : IFR2A

If A then X else Y (form A)

466 : IFR2B

If A then X else Y (form B)

467 : MAXAC2

Max of reals and accumulator

468 : MINAC2

Min of reals and accumulators

469 : CLIP2A

Clipping activation (form A)

470 : CLIP2B

Clipping activation (form B)

471 : MACR2A

Multiply accumulate reals (form A)

472 : MACR2B

Multiply accumulate reals (form B)

473 : IFC

If A then X else Y (complex)

End of enumeration elements list.

ENDPROG : End of Program
bits : 31 - 31 (1 bit)
access : read-write


INSTR4CFG0

Instruction N Word 0
address_offset : 0x144 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR4CFG0 INSTR4CFG0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ALUIN0REGID ALUIN0REALZERO ALUIN0REALNEGATE ALUIN0IMAGZERO ALUIN0IMAGNEGATE ALUIN1REGID ALUIN1REALZERO ALUIN1REALNEGATE ALUIN1IMAGZERO ALUIN1IMAGNEGATE ALUIN2REGID ALUIN2REALZERO ALUIN2REALNEGATE ALUIN2IMAGZERO ALUIN2IMAGNEGATE ALUOUTREGID

ALUIN0REGID : Register ID
bits : 0 - 2 (3 bit)
access : read-write

ALUIN0REALZERO : Real Zero
bits : 4 - 4 (1 bit)
access : read-write

ALUIN0REALNEGATE : Real Negate
bits : 5 - 5 (1 bit)
access : read-write

ALUIN0IMAGZERO : Imaginary Not Zero
bits : 6 - 6 (1 bit)
access : read-write

ALUIN0IMAGNEGATE : Imaginary Negate
bits : 7 - 7 (1 bit)
access : read-write

ALUIN1REGID : Register ID
bits : 8 - 10 (3 bit)
access : read-write

ALUIN1REALZERO : Real Zero
bits : 12 - 12 (1 bit)
access : read-write

ALUIN1REALNEGATE : Real Negate
bits : 13 - 13 (1 bit)
access : read-write

ALUIN1IMAGZERO : Imaginary Not Zero
bits : 14 - 14 (1 bit)
access : read-write

ALUIN1IMAGNEGATE : Imaginary Negate
bits : 15 - 15 (1 bit)
access : read-write

ALUIN2REGID : Register ID
bits : 16 - 18 (3 bit)
access : read-write

ALUIN2REALZERO : Real Zero
bits : 20 - 20 (1 bit)
access : read-write

ALUIN2REALNEGATE : Real Negate
bits : 21 - 21 (1 bit)
access : read-write

ALUIN2IMAGZERO : Imaginary Not Zero
bits : 22 - 22 (1 bit)
access : read-write

ALUIN2IMAGNEGATE : Imaginary Negate
bits : 23 - 23 (1 bit)
access : read-write

ALUOUTREGID : Register ID
bits : 28 - 30 (3 bit)
access : read-write


INSTR4CFG1

Instruction N word 1
address_offset : 0x148 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR4CFG1 INSTR4CFG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ISTREAM0REGID ISTREAM0LOAD ISTREAM0ARRAYID ISTREAM0ARRAYINCRDIM0 ISTREAM0ARRAYINCRDIM1 ISTREAM0ARRAYINCRDIM2 ISTREAM1REGID ISTREAM1LOAD ISTREAM1ARRAYID ISTREAM1ARRAYINCRDIM0 ISTREAM1ARRAYINCRDIM1 ISTREAM1ARRAYINCRDIM2 OSTREAMREGID OSTREAMSTORE OSTREAMARRAYID OSTREAMARRAYINCRDIM0 OSTREAMARRAYINCRDIM1 OSTREAMARRAYINCRDIM2

ISTREAM0REGID : Register ID
bits : 0 - 2 (3 bit)
access : read-write

ISTREAM0LOAD : Load register
bits : 3 - 3 (1 bit)
access : read-write

ISTREAM0ARRAYID : Array ID
bits : 4 - 6 (3 bit)
access : read-write

ISTREAM0ARRAYINCRDIM0 : Increment Array Dimension 0
bits : 7 - 7 (1 bit)
access : read-write

ISTREAM0ARRAYINCRDIM1 : Increment Array Dimension 1
bits : 8 - 8 (1 bit)
access : read-write

ISTREAM0ARRAYINCRDIM2 : Increment Array Dimension 2
bits : 9 - 9 (1 bit)
access : read-write

ISTREAM1REGID : Register ID
bits : 10 - 12 (3 bit)
access : read-write

ISTREAM1LOAD : Load register
bits : 13 - 13 (1 bit)
access : read-write

ISTREAM1ARRAYID : Array ID
bits : 14 - 16 (3 bit)
access : read-write

ISTREAM1ARRAYINCRDIM0 : Increment Array Dimension 0
bits : 17 - 17 (1 bit)
access : read-write

ISTREAM1ARRAYINCRDIM1 : Increment Array Dimension 1
bits : 18 - 18 (1 bit)
access : read-write

ISTREAM1ARRAYINCRDIM2 : Increment Array Dimension 2
bits : 19 - 19 (1 bit)
access : read-write

OSTREAMREGID : Register ID
bits : 20 - 22 (3 bit)
access : read-write

OSTREAMSTORE : Store to Register
bits : 23 - 23 (1 bit)
access : read-write

OSTREAMARRAYID : Array ID
bits : 24 - 26 (3 bit)
access : read-write

OSTREAMARRAYINCRDIM0 : Increment Array Dimension 0
bits : 27 - 27 (1 bit)
access : read-write

OSTREAMARRAYINCRDIM1 : Increment Array Dimension 1
bits : 28 - 28 (1 bit)
access : read-write

OSTREAMARRAYINCRDIM2 : Increment Array Dimension 2
bits : 29 - 29 (1 bit)
access : read-write


INSTR4CFG2

Instruction N word 2
address_offset : 0x14C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR4CFG2 INSTR4CFG2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOOP0BEGIN LOOP0END LOOP1BEGIN LOOP1END LOOP2BEGIN LOOP2END LOOP3BEGIN LOOP3END LOOP4BEGIN LOOP4END LOOP5BEGIN LOOP5END LOOP6BEGIN LOOP6END LOOP7BEGIN LOOP7END ALUOP ENDPROG

LOOP0BEGIN : Loop Begin
bits : 0 - 0 (1 bit)
access : read-write

LOOP0END : Loop End
bits : 1 - 1 (1 bit)
access : read-write

LOOP1BEGIN : Loop Begin
bits : 2 - 2 (1 bit)
access : read-write

LOOP1END : Loop End
bits : 3 - 3 (1 bit)
access : read-write

LOOP2BEGIN : Loop Begin
bits : 4 - 4 (1 bit)
access : read-write

LOOP2END : Loop End
bits : 5 - 5 (1 bit)
access : read-write

LOOP3BEGIN : Loop Begin
bits : 6 - 6 (1 bit)
access : read-write

LOOP3END : Loop End
bits : 7 - 7 (1 bit)
access : read-write

LOOP4BEGIN : Loop Begin
bits : 8 - 8 (1 bit)
access : read-write

LOOP4END : Loop End
bits : 9 - 9 (1 bit)
access : read-write

LOOP5BEGIN : Loop Begin
bits : 10 - 10 (1 bit)
access : read-write

LOOP5END : Loop End
bits : 11 - 11 (1 bit)
access : read-write

LOOP6BEGIN : Loop Begin
bits : 12 - 12 (1 bit)
access : read-write

LOOP6END : Loop End
bits : 13 - 13 (1 bit)
access : read-write

LOOP7BEGIN : Loop Begin
bits : 14 - 14 (1 bit)
access : read-write

LOOP7END : Loop End
bits : 15 - 15 (1 bit)
access : read-write

ALUOP : ALU opcode
bits : 20 - 28 (9 bit)
access : read-write

Enumeration:

0 : NOOP

No Operation

1 : CLEAR

Clear register (set to +0)

65 : COPY

Copy operation

66 : SWAP

Swap operation

67 : DBL

Double operation (multiply by 2)

68 : FANA

Load real and imag (form A)

69 : FANB

Load real and imag (form B)

70 : RELU2

ReLU of real (max of real and +0)

71 : NRELU2

Min of real and -0

72 : INC2

Increment by 1.0

73 : DEC2

Decrement by 1.0

74 : ADDR

Addition of 2 reals

75 : MAX

Maximum of 2 reals

76 : MIN

Minimum of 2 reals

292 : RSQR2B

Square of real (form B)

334 : ADDC

Add Complex

339 : MAX2A

Max of reals (form A)

340 : MIN2A

Min of reals (form A)

350 : XREALC2

Extract real from complex

351 : XIMAGC2

Extract imag from complex

353 : ADDR2B

Add reals (form B)

354 : MAX2B

Max of reals (form B)

355 : MIN2B

Min of reals (form B)

397 : MULC

Multiply Complex

407 : MULR2A

Multiply reals (form A)

408 : MULR2B

Multiply reals (form B)

410 : ADDR4

Add 4 reals

411 : MAX4

Max of 4 reals

412 : MIN4

Min of 4 reals

413 : SQRMAGC2

Squared magnitude Complex

416 : PRELU2B

Parametric ReLU (form B)

461 : MACC

Multiply Accumulate Complex

462 : AACC

Add Accumulate Complex

463 : ELU2A

part of ELU activation (form A)

464 : ELU2B

part of ELU activation (form B)

465 : IFR2A

If A then X else Y (form A)

466 : IFR2B

If A then X else Y (form B)

467 : MAXAC2

Max of reals and accumulator

468 : MINAC2

Min of reals and accumulators

469 : CLIP2A

Clipping activation (form A)

470 : CLIP2B

Clipping activation (form B)

471 : MACR2A

Multiply accumulate reals (form A)

472 : MACR2B

Multiply accumulate reals (form B)

473 : IFC

If A then X else Y (complex)

End of enumeration elements list.

ENDPROG : End of Program
bits : 31 - 31 (1 bit)
access : read-write


INSTR5CFG0

Instruction N Word 0
address_offset : 0x150 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR5CFG0 INSTR5CFG0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ALUIN0REGID ALUIN0REALZERO ALUIN0REALNEGATE ALUIN0IMAGZERO ALUIN0IMAGNEGATE ALUIN1REGID ALUIN1REALZERO ALUIN1REALNEGATE ALUIN1IMAGZERO ALUIN1IMAGNEGATE ALUIN2REGID ALUIN2REALZERO ALUIN2REALNEGATE ALUIN2IMAGZERO ALUIN2IMAGNEGATE ALUOUTREGID

ALUIN0REGID : Register ID
bits : 0 - 2 (3 bit)
access : read-write

ALUIN0REALZERO : Real Zero
bits : 4 - 4 (1 bit)
access : read-write

ALUIN0REALNEGATE : Real Negate
bits : 5 - 5 (1 bit)
access : read-write

ALUIN0IMAGZERO : Imaginary Not Zero
bits : 6 - 6 (1 bit)
access : read-write

ALUIN0IMAGNEGATE : Imaginary Negate
bits : 7 - 7 (1 bit)
access : read-write

ALUIN1REGID : Register ID
bits : 8 - 10 (3 bit)
access : read-write

ALUIN1REALZERO : Real Zero
bits : 12 - 12 (1 bit)
access : read-write

ALUIN1REALNEGATE : Real Negate
bits : 13 - 13 (1 bit)
access : read-write

ALUIN1IMAGZERO : Imaginary Not Zero
bits : 14 - 14 (1 bit)
access : read-write

ALUIN1IMAGNEGATE : Imaginary Negate
bits : 15 - 15 (1 bit)
access : read-write

ALUIN2REGID : Register ID
bits : 16 - 18 (3 bit)
access : read-write

ALUIN2REALZERO : Real Zero
bits : 20 - 20 (1 bit)
access : read-write

ALUIN2REALNEGATE : Real Negate
bits : 21 - 21 (1 bit)
access : read-write

ALUIN2IMAGZERO : Imaginary Not Zero
bits : 22 - 22 (1 bit)
access : read-write

ALUIN2IMAGNEGATE : Imaginary Negate
bits : 23 - 23 (1 bit)
access : read-write

ALUOUTREGID : Register ID
bits : 28 - 30 (3 bit)
access : read-write


INSTR5CFG1

Instruction N word 1
address_offset : 0x154 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR5CFG1 INSTR5CFG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ISTREAM0REGID ISTREAM0LOAD ISTREAM0ARRAYID ISTREAM0ARRAYINCRDIM0 ISTREAM0ARRAYINCRDIM1 ISTREAM0ARRAYINCRDIM2 ISTREAM1REGID ISTREAM1LOAD ISTREAM1ARRAYID ISTREAM1ARRAYINCRDIM0 ISTREAM1ARRAYINCRDIM1 ISTREAM1ARRAYINCRDIM2 OSTREAMREGID OSTREAMSTORE OSTREAMARRAYID OSTREAMARRAYINCRDIM0 OSTREAMARRAYINCRDIM1 OSTREAMARRAYINCRDIM2

ISTREAM0REGID : Register ID
bits : 0 - 2 (3 bit)
access : read-write

ISTREAM0LOAD : Load register
bits : 3 - 3 (1 bit)
access : read-write

ISTREAM0ARRAYID : Array ID
bits : 4 - 6 (3 bit)
access : read-write

ISTREAM0ARRAYINCRDIM0 : Increment Array Dimension 0
bits : 7 - 7 (1 bit)
access : read-write

ISTREAM0ARRAYINCRDIM1 : Increment Array Dimension 1
bits : 8 - 8 (1 bit)
access : read-write

ISTREAM0ARRAYINCRDIM2 : Increment Array Dimension 2
bits : 9 - 9 (1 bit)
access : read-write

ISTREAM1REGID : Register ID
bits : 10 - 12 (3 bit)
access : read-write

ISTREAM1LOAD : Load register
bits : 13 - 13 (1 bit)
access : read-write

ISTREAM1ARRAYID : Array ID
bits : 14 - 16 (3 bit)
access : read-write

ISTREAM1ARRAYINCRDIM0 : Increment Array Dimension 0
bits : 17 - 17 (1 bit)
access : read-write

ISTREAM1ARRAYINCRDIM1 : Increment Array Dimension 1
bits : 18 - 18 (1 bit)
access : read-write

ISTREAM1ARRAYINCRDIM2 : Increment Array Dimension 2
bits : 19 - 19 (1 bit)
access : read-write

OSTREAMREGID : Register ID
bits : 20 - 22 (3 bit)
access : read-write

OSTREAMSTORE : Store to Register
bits : 23 - 23 (1 bit)
access : read-write

OSTREAMARRAYID : Array ID
bits : 24 - 26 (3 bit)
access : read-write

OSTREAMARRAYINCRDIM0 : Increment Array Dimension 0
bits : 27 - 27 (1 bit)
access : read-write

OSTREAMARRAYINCRDIM1 : Increment Array Dimension 1
bits : 28 - 28 (1 bit)
access : read-write

OSTREAMARRAYINCRDIM2 : Increment Array Dimension 2
bits : 29 - 29 (1 bit)
access : read-write


INSTR5CFG2

Instruction N word 2
address_offset : 0x158 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR5CFG2 INSTR5CFG2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOOP0BEGIN LOOP0END LOOP1BEGIN LOOP1END LOOP2BEGIN LOOP2END LOOP3BEGIN LOOP3END LOOP4BEGIN LOOP4END LOOP5BEGIN LOOP5END LOOP6BEGIN LOOP6END LOOP7BEGIN LOOP7END ALUOP ENDPROG

LOOP0BEGIN : Loop Begin
bits : 0 - 0 (1 bit)
access : read-write

LOOP0END : Loop End
bits : 1 - 1 (1 bit)
access : read-write

LOOP1BEGIN : Loop Begin
bits : 2 - 2 (1 bit)
access : read-write

LOOP1END : Loop End
bits : 3 - 3 (1 bit)
access : read-write

LOOP2BEGIN : Loop Begin
bits : 4 - 4 (1 bit)
access : read-write

LOOP2END : Loop End
bits : 5 - 5 (1 bit)
access : read-write

LOOP3BEGIN : Loop Begin
bits : 6 - 6 (1 bit)
access : read-write

LOOP3END : Loop End
bits : 7 - 7 (1 bit)
access : read-write

LOOP4BEGIN : Loop Begin
bits : 8 - 8 (1 bit)
access : read-write

LOOP4END : Loop End
bits : 9 - 9 (1 bit)
access : read-write

LOOP5BEGIN : Loop Begin
bits : 10 - 10 (1 bit)
access : read-write

LOOP5END : Loop End
bits : 11 - 11 (1 bit)
access : read-write

LOOP6BEGIN : Loop Begin
bits : 12 - 12 (1 bit)
access : read-write

LOOP6END : Loop End
bits : 13 - 13 (1 bit)
access : read-write

LOOP7BEGIN : Loop Begin
bits : 14 - 14 (1 bit)
access : read-write

LOOP7END : Loop End
bits : 15 - 15 (1 bit)
access : read-write

ALUOP : ALU opcode
bits : 20 - 28 (9 bit)
access : read-write

Enumeration:

0 : NOOP

No Operation

1 : CLEAR

Clear register (set to +0)

65 : COPY

Copy operation

66 : SWAP

Swap operation

67 : DBL

Double operation (multiply by 2)

68 : FANA

Load real and imag (form A)

69 : FANB

Load real and imag (form B)

70 : RELU2

ReLU of real (max of real and +0)

71 : NRELU2

Min of real and -0

72 : INC2

Increment by 1.0

73 : DEC2

Decrement by 1.0

74 : ADDR

Addition of 2 reals

75 : MAX

Maximum of 2 reals

76 : MIN

Minimum of 2 reals

292 : RSQR2B

Square of real (form B)

334 : ADDC

Add Complex

339 : MAX2A

Max of reals (form A)

340 : MIN2A

Min of reals (form A)

350 : XREALC2

Extract real from complex

351 : XIMAGC2

Extract imag from complex

353 : ADDR2B

Add reals (form B)

354 : MAX2B

Max of reals (form B)

355 : MIN2B

Min of reals (form B)

397 : MULC

Multiply Complex

407 : MULR2A

Multiply reals (form A)

408 : MULR2B

Multiply reals (form B)

410 : ADDR4

Add 4 reals

411 : MAX4

Max of 4 reals

412 : MIN4

Min of 4 reals

413 : SQRMAGC2

Squared magnitude Complex

416 : PRELU2B

Parametric ReLU (form B)

461 : MACC

Multiply Accumulate Complex

462 : AACC

Add Accumulate Complex

463 : ELU2A

part of ELU activation (form A)

464 : ELU2B

part of ELU activation (form B)

465 : IFR2A

If A then X else Y (form A)

466 : IFR2B

If A then X else Y (form B)

467 : MAXAC2

Max of reals and accumulator

468 : MINAC2

Min of reals and accumulators

469 : CLIP2A

Clipping activation (form A)

470 : CLIP2B

Clipping activation (form B)

471 : MACR2A

Multiply accumulate reals (form A)

472 : MACR2B

Multiply accumulate reals (form B)

473 : IFC

If A then X else Y (complex)

End of enumeration elements list.

ENDPROG : End of Program
bits : 31 - 31 (1 bit)
access : read-write


INSTR6CFG0

Instruction N Word 0
address_offset : 0x15C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR6CFG0 INSTR6CFG0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ALUIN0REGID ALUIN0REALZERO ALUIN0REALNEGATE ALUIN0IMAGZERO ALUIN0IMAGNEGATE ALUIN1REGID ALUIN1REALZERO ALUIN1REALNEGATE ALUIN1IMAGZERO ALUIN1IMAGNEGATE ALUIN2REGID ALUIN2REALZERO ALUIN2REALNEGATE ALUIN2IMAGZERO ALUIN2IMAGNEGATE ALUOUTREGID

ALUIN0REGID : Register ID
bits : 0 - 2 (3 bit)
access : read-write

ALUIN0REALZERO : Real Zero
bits : 4 - 4 (1 bit)
access : read-write

ALUIN0REALNEGATE : Real Negate
bits : 5 - 5 (1 bit)
access : read-write

ALUIN0IMAGZERO : Imaginary Not Zero
bits : 6 - 6 (1 bit)
access : read-write

ALUIN0IMAGNEGATE : Imaginary Negate
bits : 7 - 7 (1 bit)
access : read-write

ALUIN1REGID : Register ID
bits : 8 - 10 (3 bit)
access : read-write

ALUIN1REALZERO : Real Zero
bits : 12 - 12 (1 bit)
access : read-write

ALUIN1REALNEGATE : Real Negate
bits : 13 - 13 (1 bit)
access : read-write

ALUIN1IMAGZERO : Imaginary Not Zero
bits : 14 - 14 (1 bit)
access : read-write

ALUIN1IMAGNEGATE : Imaginary Negate
bits : 15 - 15 (1 bit)
access : read-write

ALUIN2REGID : Register ID
bits : 16 - 18 (3 bit)
access : read-write

ALUIN2REALZERO : Real Zero
bits : 20 - 20 (1 bit)
access : read-write

ALUIN2REALNEGATE : Real Negate
bits : 21 - 21 (1 bit)
access : read-write

ALUIN2IMAGZERO : Imaginary Not Zero
bits : 22 - 22 (1 bit)
access : read-write

ALUIN2IMAGNEGATE : Imaginary Negate
bits : 23 - 23 (1 bit)
access : read-write

ALUOUTREGID : Register ID
bits : 28 - 30 (3 bit)
access : read-write


INSTR6CFG1

Instruction N word 1
address_offset : 0x160 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR6CFG1 INSTR6CFG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ISTREAM0REGID ISTREAM0LOAD ISTREAM0ARRAYID ISTREAM0ARRAYINCRDIM0 ISTREAM0ARRAYINCRDIM1 ISTREAM0ARRAYINCRDIM2 ISTREAM1REGID ISTREAM1LOAD ISTREAM1ARRAYID ISTREAM1ARRAYINCRDIM0 ISTREAM1ARRAYINCRDIM1 ISTREAM1ARRAYINCRDIM2 OSTREAMREGID OSTREAMSTORE OSTREAMARRAYID OSTREAMARRAYINCRDIM0 OSTREAMARRAYINCRDIM1 OSTREAMARRAYINCRDIM2

ISTREAM0REGID : Register ID
bits : 0 - 2 (3 bit)
access : read-write

ISTREAM0LOAD : Load register
bits : 3 - 3 (1 bit)
access : read-write

ISTREAM0ARRAYID : Array ID
bits : 4 - 6 (3 bit)
access : read-write

ISTREAM0ARRAYINCRDIM0 : Increment Array Dimension 0
bits : 7 - 7 (1 bit)
access : read-write

ISTREAM0ARRAYINCRDIM1 : Increment Array Dimension 1
bits : 8 - 8 (1 bit)
access : read-write

ISTREAM0ARRAYINCRDIM2 : Increment Array Dimension 2
bits : 9 - 9 (1 bit)
access : read-write

ISTREAM1REGID : Register ID
bits : 10 - 12 (3 bit)
access : read-write

ISTREAM1LOAD : Load register
bits : 13 - 13 (1 bit)
access : read-write

ISTREAM1ARRAYID : Array ID
bits : 14 - 16 (3 bit)
access : read-write

ISTREAM1ARRAYINCRDIM0 : Increment Array Dimension 0
bits : 17 - 17 (1 bit)
access : read-write

ISTREAM1ARRAYINCRDIM1 : Increment Array Dimension 1
bits : 18 - 18 (1 bit)
access : read-write

ISTREAM1ARRAYINCRDIM2 : Increment Array Dimension 2
bits : 19 - 19 (1 bit)
access : read-write

OSTREAMREGID : Register ID
bits : 20 - 22 (3 bit)
access : read-write

OSTREAMSTORE : Store to Register
bits : 23 - 23 (1 bit)
access : read-write

OSTREAMARRAYID : Array ID
bits : 24 - 26 (3 bit)
access : read-write

OSTREAMARRAYINCRDIM0 : Increment Array Dimension 0
bits : 27 - 27 (1 bit)
access : read-write

OSTREAMARRAYINCRDIM1 : Increment Array Dimension 1
bits : 28 - 28 (1 bit)
access : read-write

OSTREAMARRAYINCRDIM2 : Increment Array Dimension 2
bits : 29 - 29 (1 bit)
access : read-write


INSTR6CFG2

Instruction N word 2
address_offset : 0x164 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR6CFG2 INSTR6CFG2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOOP0BEGIN LOOP0END LOOP1BEGIN LOOP1END LOOP2BEGIN LOOP2END LOOP3BEGIN LOOP3END LOOP4BEGIN LOOP4END LOOP5BEGIN LOOP5END LOOP6BEGIN LOOP6END LOOP7BEGIN LOOP7END ALUOP ENDPROG

LOOP0BEGIN : Loop Begin
bits : 0 - 0 (1 bit)
access : read-write

LOOP0END : Loop End
bits : 1 - 1 (1 bit)
access : read-write

LOOP1BEGIN : Loop Begin
bits : 2 - 2 (1 bit)
access : read-write

LOOP1END : Loop End
bits : 3 - 3 (1 bit)
access : read-write

LOOP2BEGIN : Loop Begin
bits : 4 - 4 (1 bit)
access : read-write

LOOP2END : Loop End
bits : 5 - 5 (1 bit)
access : read-write

LOOP3BEGIN : Loop Begin
bits : 6 - 6 (1 bit)
access : read-write

LOOP3END : Loop End
bits : 7 - 7 (1 bit)
access : read-write

LOOP4BEGIN : Loop Begin
bits : 8 - 8 (1 bit)
access : read-write

LOOP4END : Loop End
bits : 9 - 9 (1 bit)
access : read-write

LOOP5BEGIN : Loop Begin
bits : 10 - 10 (1 bit)
access : read-write

LOOP5END : Loop End
bits : 11 - 11 (1 bit)
access : read-write

LOOP6BEGIN : Loop Begin
bits : 12 - 12 (1 bit)
access : read-write

LOOP6END : Loop End
bits : 13 - 13 (1 bit)
access : read-write

LOOP7BEGIN : Loop Begin
bits : 14 - 14 (1 bit)
access : read-write

LOOP7END : Loop End
bits : 15 - 15 (1 bit)
access : read-write

ALUOP : ALU opcode
bits : 20 - 28 (9 bit)
access : read-write

Enumeration:

0 : NOOP

No Operation

1 : CLEAR

Clear register (set to +0)

65 : COPY

Copy operation

66 : SWAP

Swap operation

67 : DBL

Double operation (multiply by 2)

68 : FANA

Load real and imag (form A)

69 : FANB

Load real and imag (form B)

70 : RELU2

ReLU of real (max of real and +0)

71 : NRELU2

Min of real and -0

72 : INC2

Increment by 1.0

73 : DEC2

Decrement by 1.0

74 : ADDR

Addition of 2 reals

75 : MAX

Maximum of 2 reals

76 : MIN

Minimum of 2 reals

292 : RSQR2B

Square of real (form B)

334 : ADDC

Add Complex

339 : MAX2A

Max of reals (form A)

340 : MIN2A

Min of reals (form A)

350 : XREALC2

Extract real from complex

351 : XIMAGC2

Extract imag from complex

353 : ADDR2B

Add reals (form B)

354 : MAX2B

Max of reals (form B)

355 : MIN2B

Min of reals (form B)

397 : MULC

Multiply Complex

407 : MULR2A

Multiply reals (form A)

408 : MULR2B

Multiply reals (form B)

410 : ADDR4

Add 4 reals

411 : MAX4

Max of 4 reals

412 : MIN4

Min of 4 reals

413 : SQRMAGC2

Squared magnitude Complex

416 : PRELU2B

Parametric ReLU (form B)

461 : MACC

Multiply Accumulate Complex

462 : AACC

Add Accumulate Complex

463 : ELU2A

part of ELU activation (form A)

464 : ELU2B

part of ELU activation (form B)

465 : IFR2A

If A then X else Y (form A)

466 : IFR2B

If A then X else Y (form B)

467 : MAXAC2

Max of reals and accumulator

468 : MINAC2

Min of reals and accumulators

469 : CLIP2A

Clipping activation (form A)

470 : CLIP2B

Clipping activation (form B)

471 : MACR2A

Multiply accumulate reals (form A)

472 : MACR2B

Multiply accumulate reals (form B)

473 : IFC

If A then X else Y (complex)

End of enumeration elements list.

ENDPROG : End of Program
bits : 31 - 31 (1 bit)
access : read-write


INSTR7CFG0

Instruction N Word 0
address_offset : 0x168 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR7CFG0 INSTR7CFG0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ALUIN0REGID ALUIN0REALZERO ALUIN0REALNEGATE ALUIN0IMAGZERO ALUIN0IMAGNEGATE ALUIN1REGID ALUIN1REALZERO ALUIN1REALNEGATE ALUIN1IMAGZERO ALUIN1IMAGNEGATE ALUIN2REGID ALUIN2REALZERO ALUIN2REALNEGATE ALUIN2IMAGZERO ALUIN2IMAGNEGATE ALUOUTREGID

ALUIN0REGID : Register ID
bits : 0 - 2 (3 bit)
access : read-write

ALUIN0REALZERO : Real Zero
bits : 4 - 4 (1 bit)
access : read-write

ALUIN0REALNEGATE : Real Negate
bits : 5 - 5 (1 bit)
access : read-write

ALUIN0IMAGZERO : Imaginary Not Zero
bits : 6 - 6 (1 bit)
access : read-write

ALUIN0IMAGNEGATE : Imaginary Negate
bits : 7 - 7 (1 bit)
access : read-write

ALUIN1REGID : Register ID
bits : 8 - 10 (3 bit)
access : read-write

ALUIN1REALZERO : Real Zero
bits : 12 - 12 (1 bit)
access : read-write

ALUIN1REALNEGATE : Real Negate
bits : 13 - 13 (1 bit)
access : read-write

ALUIN1IMAGZERO : Imaginary Not Zero
bits : 14 - 14 (1 bit)
access : read-write

ALUIN1IMAGNEGATE : Imaginary Negate
bits : 15 - 15 (1 bit)
access : read-write

ALUIN2REGID : Register ID
bits : 16 - 18 (3 bit)
access : read-write

ALUIN2REALZERO : Real Zero
bits : 20 - 20 (1 bit)
access : read-write

ALUIN2REALNEGATE : Real Negate
bits : 21 - 21 (1 bit)
access : read-write

ALUIN2IMAGZERO : Imaginary Not Zero
bits : 22 - 22 (1 bit)
access : read-write

ALUIN2IMAGNEGATE : Imaginary Negate
bits : 23 - 23 (1 bit)
access : read-write

ALUOUTREGID : Register ID
bits : 28 - 30 (3 bit)
access : read-write


INSTR7CFG1

Instruction N word 1
address_offset : 0x16C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR7CFG1 INSTR7CFG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ISTREAM0REGID ISTREAM0LOAD ISTREAM0ARRAYID ISTREAM0ARRAYINCRDIM0 ISTREAM0ARRAYINCRDIM1 ISTREAM0ARRAYINCRDIM2 ISTREAM1REGID ISTREAM1LOAD ISTREAM1ARRAYID ISTREAM1ARRAYINCRDIM0 ISTREAM1ARRAYINCRDIM1 ISTREAM1ARRAYINCRDIM2 OSTREAMREGID OSTREAMSTORE OSTREAMARRAYID OSTREAMARRAYINCRDIM0 OSTREAMARRAYINCRDIM1 OSTREAMARRAYINCRDIM2

ISTREAM0REGID : Register ID
bits : 0 - 2 (3 bit)
access : read-write

ISTREAM0LOAD : Load register
bits : 3 - 3 (1 bit)
access : read-write

ISTREAM0ARRAYID : Array ID
bits : 4 - 6 (3 bit)
access : read-write

ISTREAM0ARRAYINCRDIM0 : Increment Array Dimension 0
bits : 7 - 7 (1 bit)
access : read-write

ISTREAM0ARRAYINCRDIM1 : Increment Array Dimension 1
bits : 8 - 8 (1 bit)
access : read-write

ISTREAM0ARRAYINCRDIM2 : Increment Array Dimension 2
bits : 9 - 9 (1 bit)
access : read-write

ISTREAM1REGID : Register ID
bits : 10 - 12 (3 bit)
access : read-write

ISTREAM1LOAD : Load register
bits : 13 - 13 (1 bit)
access : read-write

ISTREAM1ARRAYID : Array ID
bits : 14 - 16 (3 bit)
access : read-write

ISTREAM1ARRAYINCRDIM0 : Increment Array Dimension 0
bits : 17 - 17 (1 bit)
access : read-write

ISTREAM1ARRAYINCRDIM1 : Increment Array Dimension 1
bits : 18 - 18 (1 bit)
access : read-write

ISTREAM1ARRAYINCRDIM2 : Increment Array Dimension 2
bits : 19 - 19 (1 bit)
access : read-write

OSTREAMREGID : Register ID
bits : 20 - 22 (3 bit)
access : read-write

OSTREAMSTORE : Store to Register
bits : 23 - 23 (1 bit)
access : read-write

OSTREAMARRAYID : Array ID
bits : 24 - 26 (3 bit)
access : read-write

OSTREAMARRAYINCRDIM0 : Increment Array Dimension 0
bits : 27 - 27 (1 bit)
access : read-write

OSTREAMARRAYINCRDIM1 : Increment Array Dimension 1
bits : 28 - 28 (1 bit)
access : read-write

OSTREAMARRAYINCRDIM2 : Increment Array Dimension 2
bits : 29 - 29 (1 bit)
access : read-write


INSTR7CFG2

Instruction N word 2
address_offset : 0x170 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INSTR7CFG2 INSTR7CFG2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOOP0BEGIN LOOP0END LOOP1BEGIN LOOP1END LOOP2BEGIN LOOP2END LOOP3BEGIN LOOP3END LOOP4BEGIN LOOP4END LOOP5BEGIN LOOP5END LOOP6BEGIN LOOP6END LOOP7BEGIN LOOP7END ALUOP ENDPROG

LOOP0BEGIN : Loop Begin
bits : 0 - 0 (1 bit)
access : read-write

LOOP0END : Loop End
bits : 1 - 1 (1 bit)
access : read-write

LOOP1BEGIN : Loop Begin
bits : 2 - 2 (1 bit)
access : read-write

LOOP1END : Loop End
bits : 3 - 3 (1 bit)
access : read-write

LOOP2BEGIN : Loop Begin
bits : 4 - 4 (1 bit)
access : read-write

LOOP2END : Loop End
bits : 5 - 5 (1 bit)
access : read-write

LOOP3BEGIN : Loop Begin
bits : 6 - 6 (1 bit)
access : read-write

LOOP3END : Loop End
bits : 7 - 7 (1 bit)
access : read-write

LOOP4BEGIN : Loop Begin
bits : 8 - 8 (1 bit)
access : read-write

LOOP4END : Loop End
bits : 9 - 9 (1 bit)
access : read-write

LOOP5BEGIN : Loop Begin
bits : 10 - 10 (1 bit)
access : read-write

LOOP5END : Loop End
bits : 11 - 11 (1 bit)
access : read-write

LOOP6BEGIN : Loop Begin
bits : 12 - 12 (1 bit)
access : read-write

LOOP6END : Loop End
bits : 13 - 13 (1 bit)
access : read-write

LOOP7BEGIN : Loop Begin
bits : 14 - 14 (1 bit)
access : read-write

LOOP7END : Loop End
bits : 15 - 15 (1 bit)
access : read-write

ALUOP : ALU opcode
bits : 20 - 28 (9 bit)
access : read-write

Enumeration:

0 : NOOP

No Operation

1 : CLEAR

Clear register (set to +0)

65 : COPY

Copy operation

66 : SWAP

Swap operation

67 : DBL

Double operation (multiply by 2)

68 : FANA

Load real and imag (form A)

69 : FANB

Load real and imag (form B)

70 : RELU2

ReLU of real (max of real and +0)

71 : NRELU2

Min of real and -0

72 : INC2

Increment by 1.0

73 : DEC2

Decrement by 1.0

74 : ADDR

Addition of 2 reals

75 : MAX

Maximum of 2 reals

76 : MIN

Minimum of 2 reals

292 : RSQR2B

Square of real (form B)

334 : ADDC

Add Complex

339 : MAX2A

Max of reals (form A)

340 : MIN2A

Min of reals (form A)

350 : XREALC2

Extract real from complex

351 : XIMAGC2

Extract imag from complex

353 : ADDR2B

Add reals (form B)

354 : MAX2B

Max of reals (form B)

355 : MIN2B

Min of reals (form B)

397 : MULC

Multiply Complex

407 : MULR2A

Multiply reals (form A)

408 : MULR2B

Multiply reals (form B)

410 : ADDR4

Add 4 reals

411 : MAX4

Max of 4 reals

412 : MIN4

Min of 4 reals

413 : SQRMAGC2

Squared magnitude Complex

416 : PRELU2B

Parametric ReLU (form B)

461 : MACC

Multiply Accumulate Complex

462 : AACC

Add Accumulate Complex

463 : ELU2A

part of ELU activation (form A)

464 : ELU2B

part of ELU activation (form B)

465 : IFR2A

If A then X else Y (form A)

466 : IFR2B

If A then X else Y (form B)

467 : MAXAC2

Max of reals and accumulator

468 : MINAC2

Min of reals and accumulators

469 : CLIP2A

Clipping activation (form A)

470 : CLIP2B

Clipping activation (form B)

471 : MACR2A

Multiply accumulate reals (form A)

472 : MACR2B

Multiply accumulate reals (form B)

473 : IFC

If A then X else Y (complex)

End of enumeration elements list.

ENDPROG : End of Program
bits : 31 - 31 (1 bit)
access : read-write


CMD

Command Register
address_offset : 0x174 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CMD CMD write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 START HALT STEP INIT

START : Start Command
bits : 0 - 0 (1 bit)
access : write-only

HALT : Halt Command
bits : 1 - 1 (1 bit)
access : write-only

STEP : Step Command
bits : 2 - 2 (1 bit)
access : write-only

INIT : Initialization Command/Qualifier
bits : 3 - 3 (1 bit)
access : write-only


PERF1CNT

Run Counter
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PERF1CNT PERF1CNT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COUNT

COUNT : Performance Counter
bits : 0 - 23 (24 bit)
access : read-only


IF

Interrupt Flags
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IF IF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PROGDONE LOOP0DONE LOOP1DONE LOOP2DONE LOOP3DONE LOOP4DONE LOOP5DONE LOOP6DONE LOOP7DONE ALUNAN R0POSREAL ALUOF ALUUF STORECONVERTOF STORECONVERTUF STORECONVERTINF STORECONVERTNAN PERFCNT0 PERFCNT1 LOOPFAULT BUSERRFAULT BUSALIGNFAULT ALUFAULT ARRAYFAULT

PROGDONE : Program Done Interrupt Flags
bits : 0 - 0 (1 bit)
access : read-write

LOOP0DONE : Loop Done Interrupt Flag
bits : 1 - 1 (1 bit)
access : read-write

LOOP1DONE : Loop Done Interrupt Flag
bits : 2 - 2 (1 bit)
access : read-write

LOOP2DONE : Loop Done Interrupt Flag
bits : 3 - 3 (1 bit)
access : read-write

LOOP3DONE : Loop Done Interrupt Flag
bits : 4 - 4 (1 bit)
access : read-write

LOOP4DONE : Loop Done Interrupt Flag
bits : 5 - 5 (1 bit)
access : read-write

LOOP5DONE : Loop Done Interrupt Flag
bits : 6 - 6 (1 bit)
access : read-write

LOOP6DONE : Loop Done Interrupt Flag
bits : 7 - 7 (1 bit)
access : read-write

LOOP7DONE : Loop Done Interrupt Flag
bits : 8 - 8 (1 bit)
access : read-write

ALUNAN : Not-a-Number Interrupt Flag
bits : 10 - 10 (1 bit)
access : read-write

R0POSREAL : R0 non-zero Interrupt Flag
bits : 11 - 11 (1 bit)
access : read-write

ALUOF : ALU Overflow on result
bits : 12 - 12 (1 bit)
access : read-write

ALUUF : ALU Underflow on result
bits : 13 - 13 (1 bit)
access : read-write

STORECONVERTOF : Overflow during array store
bits : 14 - 14 (1 bit)
access : read-write

STORECONVERTUF : Underflow during array store conversion
bits : 15 - 15 (1 bit)
access : read-write

STORECONVERTINF : Infinity encountered during array store conversion
bits : 16 - 16 (1 bit)
access : read-write

STORECONVERTNAN : NaN encountered during array store conversion
bits : 17 - 17 (1 bit)
access : read-write

PERFCNT0 : Run Count Overflow Interrupt Flag
bits : 18 - 18 (1 bit)
access : read-write

PERFCNT1 : Stall Count Overflow Interrupt Flag
bits : 19 - 19 (1 bit)
access : read-write

LOOPFAULT : Loop Fault Interrupt Flag
bits : 24 - 24 (1 bit)
access : read-write

BUSERRFAULT : Bus Error Fault Interrupt Flag
bits : 25 - 25 (1 bit)
access : read-write

BUSALIGNFAULT : Bus Alignment Fault Interrupt Flag
bits : 26 - 26 (1 bit)
access : read-write

ALUFAULT : ALU Fault Interrupt Flag
bits : 27 - 27 (1 bit)
access : read-write

ARRAYFAULT : Array Fault Interrupt Flag
bits : 28 - 28 (1 bit)
access : read-write


IEN

Interrupt Enable
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IEN IEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PROGDONE LOOP0DONE LOOP1DONE LOOP2DONE LOOP3DONE LOOP4DONE LOOP5DONE LOOP6DONE LOOP7DONE ALUNAN R0POSREAL ALUOF ALUUF STORECONVERTOF STORECONVERTUF STORECONVERTINF STORECONVERTNAN PERFCNT0 PERFCNT1 LOOPFAULT BUSERRFAULT BUSALIGNFAULT ALUFAULT ARRAYFAULT

PROGDONE : Program Done Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write

LOOP0DONE : Loop Done Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write

LOOP1DONE : Loop Done Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write

LOOP2DONE : Loop Done Interrupt Enable
bits : 3 - 3 (1 bit)
access : read-write

LOOP3DONE : Loop Done Interrupt Enable
bits : 4 - 4 (1 bit)
access : read-write

LOOP4DONE : Loop Done Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write

LOOP5DONE : Loop Done Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write

LOOP6DONE : Loop Done Interrupt Enable
bits : 7 - 7 (1 bit)
access : read-write

LOOP7DONE : Loop Done Interrupt Enable
bits : 8 - 8 (1 bit)
access : read-write

ALUNAN : Not-a-Number Interrupt Enable
bits : 10 - 10 (1 bit)
access : read-write

R0POSREAL : R0 Non-Zero Interrupt Enable
bits : 11 - 11 (1 bit)
access : read-write

ALUOF : ALU Overflow Interrupt Enable
bits : 12 - 12 (1 bit)
access : read-write

ALUUF : ALU Underflow Interrupt Enable
bits : 13 - 13 (1 bit)
access : read-write

STORECONVERTOF : Store conversion Overflow Interrupt Enable
bits : 14 - 14 (1 bit)
access : read-write

STORECONVERTUF : Store Conversion Underflow Interrupt Enable
bits : 15 - 15 (1 bit)
access : read-write

STORECONVERTINF : Store Conversion Infinity Interrupt Enable
bits : 16 - 16 (1 bit)
access : read-write

STORECONVERTNAN : Store Conversion NaN Interrupt Enable
bits : 17 - 17 (1 bit)
access : read-write

PERFCNT0 : Perf Counter 0 Overflow Interrupt Enable
bits : 18 - 18 (1 bit)
access : read-write

PERFCNT1 : Perf Counter 1 Overflow Interrupt Enable
bits : 19 - 19 (1 bit)
access : read-write

LOOPFAULT : Loop Fault Interrupt Enable
bits : 24 - 24 (1 bit)
access : read-write

BUSERRFAULT : Bus Error Fault Interrupt Enable
bits : 25 - 25 (1 bit)
access : read-write

BUSALIGNFAULT : Bus Alignment Fault Interrupt Enable
bits : 26 - 26 (1 bit)
access : read-write

ALUFAULT : ALU Input Fault Interrupt Enable
bits : 27 - 27 (1 bit)
access : read-write

ARRAYFAULT : Array Fault Interrupt Enable
bits : 28 - 28 (1 bit)
access : read-write


DEBUGEN

Debug Control Register
address_offset : 0x200 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DEBUGEN DEBUGEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKPTLOOP0DONE BKPTLOOP1DONE BKPTLOOP2DONE BKPTLOOP3DONE BKPTLOOP4DONE BKPTLOOP5DONE BKPTLOOP6DONE BKPTLOOP7DONE BKPTALUNAN BKPTR0POSREAL BKPTALUOF BKPTALUUF BKPTSTORECONVERTOF BKPTSTORECONVERTUF BKPTSTORECONVERTINF BKPTSTORECONVERTNAN DEBUGSTEPCNTEN DEBUGBKPTALLEN DEBUGBKPTANYEN

BKPTLOOP0DONE : Enable Breakpoint on Loop Done
bits : 1 - 1 (1 bit)
access : read-write

BKPTLOOP1DONE : Enable Breakpoint on Loop Done
bits : 2 - 2 (1 bit)
access : read-write

BKPTLOOP2DONE : Enable Breakpoint on Loop Done
bits : 3 - 3 (1 bit)
access : read-write

BKPTLOOP3DONE : Enable Breakpoint on Loop Done
bits : 4 - 4 (1 bit)
access : read-write

BKPTLOOP4DONE : Enable Breakpoint on Loop Done
bits : 5 - 5 (1 bit)
access : read-write

BKPTLOOP5DONE : Enable Breakpoint on Loop Done
bits : 6 - 6 (1 bit)
access : read-write

BKPTLOOP6DONE : Enable Breakpoint on Loop Done
bits : 7 - 7 (1 bit)
access : read-write

BKPTLOOP7DONE : Enable Breakpoint on Loop Done
bits : 8 - 8 (1 bit)
access : read-write

BKPTALUNAN : Enable Breakpoint on ALUNAN
bits : 10 - 10 (1 bit)
access : read-write

BKPTR0POSREAL : Enable Breakpoint on R0POSREAL
bits : 11 - 11 (1 bit)
access : read-write

BKPTALUOF : Enable Breakpoint on ALUOF
bits : 12 - 12 (1 bit)
access : read-write

BKPTALUUF : Enable Breakpoint on ALUUF
bits : 13 - 13 (1 bit)
access : read-write

BKPTSTORECONVERTOF : Enable Breakpoint on STORECONVERTOF
bits : 14 - 14 (1 bit)
access : read-write

BKPTSTORECONVERTUF : Enable Breakpoint on STORECONVERTUF
bits : 15 - 15 (1 bit)
access : read-write

BKPTSTORECONVERTINF : Enable Breakpoint on STORECONVERTINF
bits : 16 - 16 (1 bit)
access : read-write

BKPTSTORECONVERTNAN : Enable Breakpoint on STORECONVERTNAN
bits : 17 - 17 (1 bit)
access : read-write

DEBUGSTEPCNTEN : Debug Step Count Enable
bits : 28 - 28 (1 bit)
access : read-write

DEBUGBKPTALLEN : Trigger Breakpoint when ALL conditions match
bits : 29 - 29 (1 bit)
access : read-write

DEBUGBKPTANYEN : Enable Breakpoint when ANY conditions match
bits : 30 - 30 (1 bit)
access : read-write


DEBUGSTEPCNT

No Description
address_offset : 0x204 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DEBUGSTEPCNT DEBUGSTEPCNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DEBUGSTEPCNT

DEBUGSTEPCNT : Debug Step Counter
bits : 0 - 23 (24 bit)
access : read-write


FAULTSTATUS

Fault Status Register
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

FAULTSTATUS FAULTSTATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FAULTPC FAULTARRAY FAULTBUS FAULTLOOP

FAULTPC : PC when fault occurred
bits : 0 - 2 (3 bit)
access : read-only

FAULTARRAY : Array access that generated a fault
bits : 8 - 10 (3 bit)
access : read-only

FAULTBUS : Bus where fault occurred
bits : 12 - 13 (2 bit)
access : read-only

Enumeration:

0 : NONE


1 : LOAD0STREAM


2 : LOAD1STREAM


3 : STORESTREAM


End of enumeration elements list.

FAULTLOOP : Loop Fault Indicator
bits : 16 - 19 (4 bit)
access : read-only


FAULTADDR

Fault Address Register
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

FAULTADDR FAULTADDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FAULTADDR

FAULTADDR : Bus Fault Address Register
bits : 0 - 31 (32 bit)
access : read-only


PROGRAMSTATE

Program State Register
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PROGRAMSTATE PROGRAMSTATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PC

PC : Program Counter
bits : 0 - 2 (3 bit)
access : read-write


ARRAY0INDEXSTATE

Array N Index State Register
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY0INDEXSTATE ARRAY0INDEXSTATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DIM0INDEX DIM1INDEX DIM2INDEX

DIM0INDEX : Current Index
bits : 0 - 9 (10 bit)
access : read-write

DIM1INDEX : Current Index
bits : 10 - 19 (10 bit)
access : read-write

DIM2INDEX : Current Index
bits : 20 - 29 (10 bit)
access : read-write


ARRAY1INDEXSTATE

Array N Index State Register
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY1INDEXSTATE ARRAY1INDEXSTATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DIM0INDEX DIM1INDEX DIM2INDEX

DIM0INDEX : Current Index
bits : 0 - 9 (10 bit)
access : read-write

DIM1INDEX : Current Index
bits : 10 - 19 (10 bit)
access : read-write

DIM2INDEX : Current Index
bits : 20 - 29 (10 bit)
access : read-write


ARRAY2INDEXSTATE

Array N Index State Register
address_offset : 0x38 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY2INDEXSTATE ARRAY2INDEXSTATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DIM0INDEX DIM1INDEX DIM2INDEX

DIM0INDEX : Current Index
bits : 0 - 9 (10 bit)
access : read-write

DIM1INDEX : Current Index
bits : 10 - 19 (10 bit)
access : read-write

DIM2INDEX : Current Index
bits : 20 - 29 (10 bit)
access : read-write


ARRAY3INDEXSTATE

Array N Index State Register
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY3INDEXSTATE ARRAY3INDEXSTATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DIM0INDEX DIM1INDEX DIM2INDEX

DIM0INDEX : Current Index
bits : 0 - 9 (10 bit)
access : read-write

DIM1INDEX : Current Index
bits : 10 - 19 (10 bit)
access : read-write

DIM2INDEX : Current Index
bits : 20 - 29 (10 bit)
access : read-write


EN

Block Enable Register
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EN EN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EN DISABLING

EN : Enable
bits : 0 - 0 (1 bit)
access : read-write

DISABLING : Disablement Busy Status
bits : 1 - 1 (1 bit)
access : read-only


ARRAY4INDEXSTATE

Array N Index State Register
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY4INDEXSTATE ARRAY4INDEXSTATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DIM0INDEX DIM1INDEX DIM2INDEX

DIM0INDEX : Current Index
bits : 0 - 9 (10 bit)
access : read-write

DIM1INDEX : Current Index
bits : 10 - 19 (10 bit)
access : read-write

DIM2INDEX : Current Index
bits : 20 - 29 (10 bit)
access : read-write


LOOP0STATE

Loop N State Register
address_offset : 0x44 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP0STATE LOOP0STATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT ACTIVE PCBEGIN

CNT : Loop Counter
bits : 0 - 9 (10 bit)
access : read-write

ACTIVE : Loop Active
bits : 12 - 12 (1 bit)
access : read-write

PCBEGIN : Loop Start
bits : 16 - 18 (3 bit)
access : read-write


LOOP1STATE

Loop N State Register
address_offset : 0x48 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP1STATE LOOP1STATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT ACTIVE PCBEGIN

CNT : Loop Counter
bits : 0 - 9 (10 bit)
access : read-write

ACTIVE : Loop Active
bits : 12 - 12 (1 bit)
access : read-write

PCBEGIN : Loop Start
bits : 16 - 18 (3 bit)
access : read-write


LOOP2STATE

Loop N State Register
address_offset : 0x4C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP2STATE LOOP2STATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT ACTIVE PCBEGIN

CNT : Loop Counter
bits : 0 - 9 (10 bit)
access : read-write

ACTIVE : Loop Active
bits : 12 - 12 (1 bit)
access : read-write

PCBEGIN : Loop Start
bits : 16 - 18 (3 bit)
access : read-write


LOOP3STATE

Loop N State Register
address_offset : 0x50 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP3STATE LOOP3STATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT ACTIVE PCBEGIN

CNT : Loop Counter
bits : 0 - 9 (10 bit)
access : read-write

ACTIVE : Loop Active
bits : 12 - 12 (1 bit)
access : read-write

PCBEGIN : Loop Start
bits : 16 - 18 (3 bit)
access : read-write


LOOP4STATE

Loop N State Register
address_offset : 0x54 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP4STATE LOOP4STATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT ACTIVE PCBEGIN

CNT : Loop Counter
bits : 0 - 9 (10 bit)
access : read-write

ACTIVE : Loop Active
bits : 12 - 12 (1 bit)
access : read-write

PCBEGIN : Loop Start
bits : 16 - 18 (3 bit)
access : read-write


LOOP5STATE

Loop N State Register
address_offset : 0x58 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP5STATE LOOP5STATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT ACTIVE PCBEGIN

CNT : Loop Counter
bits : 0 - 9 (10 bit)
access : read-write

ACTIVE : Loop Active
bits : 12 - 12 (1 bit)
access : read-write

PCBEGIN : Loop Start
bits : 16 - 18 (3 bit)
access : read-write


LOOP6STATE

Loop N State Register
address_offset : 0x5C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP6STATE LOOP6STATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT ACTIVE PCBEGIN

CNT : Loop Counter
bits : 0 - 9 (10 bit)
access : read-write

ACTIVE : Loop Active
bits : 12 - 12 (1 bit)
access : read-write

PCBEGIN : Loop Start
bits : 16 - 18 (3 bit)
access : read-write


LOOP7STATE

Loop N State Register
address_offset : 0x60 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP7STATE LOOP7STATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT ACTIVE PCBEGIN

CNT : Loop Counter
bits : 0 - 9 (10 bit)
access : read-write

ACTIVE : Loop Active
bits : 12 - 12 (1 bit)
access : read-write

PCBEGIN : Loop Start
bits : 16 - 18 (3 bit)
access : read-write


ALU0REGSTATE

ALU Register
address_offset : 0x64 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALU0REGSTATE ALU0REGSTATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FREAL FIMAG

FREAL : Float Real Value
bits : 0 - 15 (16 bit)
access : read-write

FIMAG : Float Imaginary Value
bits : 16 - 31 (16 bit)
access : read-write


ALU1REGSTATE

ALU Register
address_offset : 0x68 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALU1REGSTATE ALU1REGSTATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FREAL FIMAG

FREAL : Float Real Value
bits : 0 - 15 (16 bit)
access : read-write

FIMAG : Float Imaginary Value
bits : 16 - 31 (16 bit)
access : read-write


ALU2REGSTATE

ALU Register
address_offset : 0x6C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALU2REGSTATE ALU2REGSTATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FREAL FIMAG

FREAL : Float Real Value
bits : 0 - 15 (16 bit)
access : read-write

FIMAG : Float Imaginary Value
bits : 16 - 31 (16 bit)
access : read-write


ALU3REGSTATE

ALU Register
address_offset : 0x70 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALU3REGSTATE ALU3REGSTATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FREAL FIMAG

FREAL : Float Real Value
bits : 0 - 15 (16 bit)
access : read-write

FIMAG : Float Imaginary Value
bits : 16 - 31 (16 bit)
access : read-write


ALU4REGSTATE

ALU Register
address_offset : 0x74 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALU4REGSTATE ALU4REGSTATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FREAL FIMAG

FREAL : Float Real Value
bits : 0 - 15 (16 bit)
access : read-write

FIMAG : Float Imaginary Value
bits : 16 - 31 (16 bit)
access : read-write


ALU5REGSTATE

ALU Register
address_offset : 0x78 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALU5REGSTATE ALU5REGSTATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FREAL FIMAG

FREAL : Float Real Value
bits : 0 - 15 (16 bit)
access : read-write

FIMAG : Float Imaginary Value
bits : 16 - 31 (16 bit)
access : read-write


ALU6REGSTATE

ALU Register
address_offset : 0x7C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALU6REGSTATE ALU6REGSTATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FREAL FIMAG

FREAL : Float Real Value
bits : 0 - 15 (16 bit)
access : read-write

FIMAG : Float Imaginary Value
bits : 16 - 31 (16 bit)
access : read-write


SWRST

Software Reset Register
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SWRST SWRST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SWRST RESETTING

SWRST : Software Reset Command
bits : 0 - 0 (1 bit)
access : write-only

RESETTING : Software Reset Busy Status
bits : 1 - 1 (1 bit)
access : read-only


ALU7REGSTATE

ALU Register
address_offset : 0x80 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALU7REGSTATE ALU7REGSTATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FREAL FIMAG

FREAL : Float Real Value
bits : 0 - 15 (16 bit)
access : read-write

FIMAG : Float Imaginary Value
bits : 16 - 31 (16 bit)
access : read-write


ARRAY0ADDRCFG

Array N Base Address Register
address_offset : 0x84 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY0ADDRCFG ARRAY0ADDRCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BASE

BASE : Array Base Address
bits : 0 - 31 (32 bit)
access : read-write


ARRAY0DIM0CFG

Array N Dimenion 0 Configuration
address_offset : 0x88 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY0DIM0CFG ARRAY0DIM0CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIZE BASETYPE COMPLEX STRIDE

SIZE : Array Dimension Size
bits : 0 - 9 (10 bit)
access : read-write

BASETYPE : Element Type
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : UINT8

Data is unsigned 8-bit integer (can only be used for loads)

1 : INT8

Data is signed 8-bit integer (can only be used for loads)

2 : BINARY16

Data is 16-bit float

3 : RESERVED

Reserved. Invalid data if this is specified.

End of enumeration elements list.

COMPLEX : Complex Data Type
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : SCALAR

Data represents a scalar number

1 : COMPLEX

Data represents a complex pair or packed pair of reals.

End of enumeration elements list.

STRIDE : Dimension Stride Step
bits : 16 - 27 (12 bit)
access : read-write


ARRAY0DIM1CFG

Array N Dimenion 1 Configuration
address_offset : 0x8C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY0DIM1CFG ARRAY0DIM1CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIZE STRIDE

SIZE : Array Dimension Size
bits : 0 - 9 (10 bit)
access : read-write

STRIDE : Dimension Stride Step
bits : 16 - 27 (12 bit)
access : read-write


ARRAY0DIM2CFG

Array N Dimenion 2 Configuration
address_offset : 0x90 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY0DIM2CFG ARRAY0DIM2CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIZE STRIDE

SIZE : Array Dimension Size
bits : 0 - 9 (10 bit)
access : read-write

STRIDE : Dimension Stride Step
bits : 16 - 27 (12 bit)
access : read-write


ARRAY1ADDRCFG

Array N Base Address Register
address_offset : 0x94 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY1ADDRCFG ARRAY1ADDRCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BASE

BASE : Array Base Address
bits : 0 - 31 (32 bit)
access : read-write


ARRAY1DIM0CFG

Array N Dimenion 0 Configuration
address_offset : 0x98 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY1DIM0CFG ARRAY1DIM0CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIZE BASETYPE COMPLEX STRIDE

SIZE : Array Dimension Size
bits : 0 - 9 (10 bit)
access : read-write

BASETYPE : Element Type
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : UINT8

Data is unsigned 8-bit integer (can only be used for loads)

1 : INT8

Data is signed 8-bit integer (can only be used for loads)

2 : BINARY16

Data is 16-bit float

3 : RESERVED

Reserved. Invalid data if this is specified.

End of enumeration elements list.

COMPLEX : Complex Data Type
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : SCALAR

Data represents a scalar number

1 : COMPLEX

Data represents a complex pair or packed pair of reals.

End of enumeration elements list.

STRIDE : Dimension Stride Step
bits : 16 - 27 (12 bit)
access : read-write


ARRAY1DIM1CFG

Array N Dimenion 1 Configuration
address_offset : 0x9C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY1DIM1CFG ARRAY1DIM1CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIZE STRIDE

SIZE : Array Dimension Size
bits : 0 - 9 (10 bit)
access : read-write

STRIDE : Dimension Stride Step
bits : 16 - 27 (12 bit)
access : read-write


ARRAY1DIM2CFG

Array N Dimenion 2 Configuration
address_offset : 0xA0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY1DIM2CFG ARRAY1DIM2CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIZE STRIDE

SIZE : Array Dimension Size
bits : 0 - 9 (10 bit)
access : read-write

STRIDE : Dimension Stride Step
bits : 16 - 27 (12 bit)
access : read-write


ARRAY2ADDRCFG

Array N Base Address Register
address_offset : 0xA4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY2ADDRCFG ARRAY2ADDRCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BASE

BASE : Array Base Address
bits : 0 - 31 (32 bit)
access : read-write


ARRAY2DIM0CFG

Array N Dimenion 0 Configuration
address_offset : 0xA8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY2DIM0CFG ARRAY2DIM0CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIZE BASETYPE COMPLEX STRIDE

SIZE : Array Dimension Size
bits : 0 - 9 (10 bit)
access : read-write

BASETYPE : Element Type
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : UINT8

Data is unsigned 8-bit integer (can only be used for loads)

1 : INT8

Data is signed 8-bit integer (can only be used for loads)

2 : BINARY16

Data is 16-bit float

3 : RESERVED

Reserved. Invalid data if this is specified.

End of enumeration elements list.

COMPLEX : Complex Data Type
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : SCALAR

Data represents a scalar number

1 : COMPLEX

Data represents a complex pair or packed pair of reals.

End of enumeration elements list.

STRIDE : Dimension Stride Step
bits : 16 - 27 (12 bit)
access : read-write


ARRAY2DIM1CFG

Array N Dimenion 1 Configuration
address_offset : 0xAC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY2DIM1CFG ARRAY2DIM1CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIZE STRIDE

SIZE : Array Dimension Size
bits : 0 - 9 (10 bit)
access : read-write

STRIDE : Dimension Stride Step
bits : 16 - 27 (12 bit)
access : read-write


ARRAY2DIM2CFG

Array N Dimenion 2 Configuration
address_offset : 0xB0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY2DIM2CFG ARRAY2DIM2CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIZE STRIDE

SIZE : Array Dimension Size
bits : 0 - 9 (10 bit)
access : read-write

STRIDE : Dimension Stride Step
bits : 16 - 27 (12 bit)
access : read-write


ARRAY3ADDRCFG

Array N Base Address Register
address_offset : 0xB4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY3ADDRCFG ARRAY3ADDRCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BASE

BASE : Array Base Address
bits : 0 - 31 (32 bit)
access : read-write


ARRAY3DIM0CFG

Array N Dimenion 0 Configuration
address_offset : 0xB8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY3DIM0CFG ARRAY3DIM0CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIZE BASETYPE COMPLEX STRIDE

SIZE : Array Dimension Size
bits : 0 - 9 (10 bit)
access : read-write

BASETYPE : Element Type
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : UINT8

Data is unsigned 8-bit integer (can only be used for loads)

1 : INT8

Data is signed 8-bit integer (can only be used for loads)

2 : BINARY16

Data is 16-bit float

3 : RESERVED

Reserved. Invalid data if this is specified.

End of enumeration elements list.

COMPLEX : Complex Data Type
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : SCALAR

Data represents a scalar number

1 : COMPLEX

Data represents a complex pair or packed pair of reals.

End of enumeration elements list.

STRIDE : Dimension Stride Step
bits : 16 - 27 (12 bit)
access : read-write


ARRAY3DIM1CFG

Array N Dimenion 1 Configuration
address_offset : 0xBC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY3DIM1CFG ARRAY3DIM1CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIZE STRIDE

SIZE : Array Dimension Size
bits : 0 - 9 (10 bit)
access : read-write

STRIDE : Dimension Stride Step
bits : 16 - 27 (12 bit)
access : read-write


CFG

Configuration Register
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PERFCNTEN OUTCOMPRESSDIS INCACHEDIS LOOPERRHALTDIS PERF0CNTSEL PERF1CNTSEL

PERFCNTEN : Performance Counter Enable
bits : 0 - 0 (1 bit)
access : read-write

OUTCOMPRESSDIS : ALU Output Stream Compression Disable
bits : 1 - 1 (1 bit)
access : read-write

INCACHEDIS : ALU Input Word Cache Disable
bits : 2 - 2 (1 bit)
access : read-write

LOOPERRHALTDIS : Loop Error Halt Disable
bits : 3 - 3 (1 bit)
access : read-write

PERF0CNTSEL : Performance Counter Select
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

0 : RUN

Total run count

1 : CMD

Total Commands Issued

2 : STALL

Total stall count (at sequencer issue)

3 : NOOP

NOOP ALU Op counter

4 : ALUACTIVE

Count cycles that ALU is active (not stalled), excluding NOOPs

5 : PIPESTALL

Stalls caused by register and resource conflicts within the ALU.

6 : IOFENCESTALL

Count stall cycles caused by memory hazards

7 : LOAD0STALL

Count stall cycles when accessing memory from load stream 0

8 : LOAD1STALL

Count stall cycles when accessing memory from load stream 1

9 : STORESTALL

Count stall cycles when writing memory from store stream

10 : BUSSTALL

Count cycles where any of previous 3 events is occurring

11 : LOAD0AHBSTALL

All stall cycles on load bus 0 AHB interface

12 : LOAD1AHBSTALL

All stall cycles on load bus 1 AHB interface

13 : LOAD0FENCESTALL

LOAD0 Fence Stall cycles

14 : LOAD1FENCESTALL

LOAD1 Fence Stall cycles

End of enumeration elements list.

PERF1CNTSEL : Performance Counter Select
bits : 20 - 23 (4 bit)
access : read-write

Enumeration:

0 : RUN

Total run count

1 : CMD

Total Commands Issued

2 : STALL

Total stall count (at sequencer issue)

3 : NOOP

NOOP ALU Op counter

4 : ALUACTIVE

Count cycles that ALU is active (not stalled), excluding NOOPs

5 : PIPESTALL

Stalls caused by register and resource conflicts within the ALU.

6 : IOFENCESTALL

Count stall cycles caused by memory hazards

7 : LOAD0STALL

Count stall cycles when accessing memory from load stream 0

8 : LOAD1STALL

Count stall cycles when accessing memory from load stream 1

9 : STORESTALL

Count stall cycles when writing memory from store stream

10 : BUSSTALL

Count cycles where any of previous 3 events is occurring

11 : LOAD0AHBSTALL

All stall cycles on load bus 0 AHB interface

12 : LOAD1AHBSTALL

All stall cycles on load bus 1 AHB interface

13 : LOAD0FENCESTALL

LOAD0 Fence Stall cycles

14 : LOAD1FENCESTALL

LOAD1 Fence Stall cycles

End of enumeration elements list.


ARRAY3DIM2CFG

Array N Dimenion 2 Configuration
address_offset : 0xC0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY3DIM2CFG ARRAY3DIM2CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIZE STRIDE

SIZE : Array Dimension Size
bits : 0 - 9 (10 bit)
access : read-write

STRIDE : Dimension Stride Step
bits : 16 - 27 (12 bit)
access : read-write


ARRAY4ADDRCFG

Array N Base Address Register
address_offset : 0xC4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY4ADDRCFG ARRAY4ADDRCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BASE

BASE : Array Base Address
bits : 0 - 31 (32 bit)
access : read-write


ARRAY4DIM0CFG

Array N Dimenion 0 Configuration
address_offset : 0xC8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY4DIM0CFG ARRAY4DIM0CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIZE BASETYPE COMPLEX STRIDE

SIZE : Array Dimension Size
bits : 0 - 9 (10 bit)
access : read-write

BASETYPE : Element Type
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : UINT8

Data is unsigned 8-bit integer (can only be used for loads)

1 : INT8

Data is signed 8-bit integer (can only be used for loads)

2 : BINARY16

Data is 16-bit float

3 : RESERVED

Reserved. Invalid data if this is specified.

End of enumeration elements list.

COMPLEX : Complex Data Type
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

0 : SCALAR

Data represents a scalar number

1 : COMPLEX

Data represents a complex pair or packed pair of reals.

End of enumeration elements list.

STRIDE : Dimension Stride Step
bits : 16 - 27 (12 bit)
access : read-write


ARRAY4DIM1CFG

Array N Dimenion 1 Configuration
address_offset : 0xCC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY4DIM1CFG ARRAY4DIM1CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIZE STRIDE

SIZE : Array Dimension Size
bits : 0 - 9 (10 bit)
access : read-write

STRIDE : Dimension Stride Step
bits : 16 - 27 (12 bit)
access : read-write


ARRAY4DIM2CFG

Array N Dimenion 2 Configuration
address_offset : 0xD0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ARRAY4DIM2CFG ARRAY4DIM2CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIZE STRIDE

SIZE : Array Dimension Size
bits : 0 - 9 (10 bit)
access : read-write

STRIDE : Dimension Stride Step
bits : 16 - 27 (12 bit)
access : read-write


LOOP0CFG

Loop N Configuration Register
address_offset : 0xD4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP0CFG LOOP0CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NUMITERS ARRAY0INCRDIM0 ARRAY0INCRDIM1 ARRAY0INCRDIM2 ARRAY1INCRDIM0 ARRAY1INCRDIM1 ARRAY1INCRDIM2 ARRAY2INCRDIM0 ARRAY2INCRDIM1 ARRAY2INCRDIM2 ARRAY3INCRDIM0 ARRAY3INCRDIM1 ARRAY3INCRDIM2 ARRAY4INCRDIM0 ARRAY4INCRDIM1 ARRAY4INCRDIM2

NUMITERS : Number of Iterations
bits : 0 - 9 (10 bit)
access : read-write

ARRAY0INCRDIM0 : Increment Dimension 0
bits : 12 - 12 (1 bit)
access : read-write

ARRAY0INCRDIM1 : Increment Dimension 1
bits : 13 - 13 (1 bit)
access : read-write

ARRAY0INCRDIM2 : Increment Dimension 2
bits : 14 - 14 (1 bit)
access : read-write

ARRAY1INCRDIM0 : Increment Dimension 0
bits : 16 - 16 (1 bit)
access : read-write

ARRAY1INCRDIM1 : Increment Dimension 1
bits : 17 - 17 (1 bit)
access : read-write

ARRAY1INCRDIM2 : Increment Dimension 2
bits : 18 - 18 (1 bit)
access : read-write

ARRAY2INCRDIM0 : Increment Dimension 0
bits : 20 - 20 (1 bit)
access : read-write

ARRAY2INCRDIM1 : Increment Dimension 1
bits : 21 - 21 (1 bit)
access : read-write

ARRAY2INCRDIM2 : Increment Dimension 2
bits : 22 - 22 (1 bit)
access : read-write

ARRAY3INCRDIM0 : Increment Dimension 0
bits : 24 - 24 (1 bit)
access : read-write

ARRAY3INCRDIM1 : Increment Dimension 1
bits : 25 - 25 (1 bit)
access : read-write

ARRAY3INCRDIM2 : Increment Dimension 2
bits : 26 - 26 (1 bit)
access : read-write

ARRAY4INCRDIM0 : Increment Dimension 0
bits : 28 - 28 (1 bit)
access : read-write

ARRAY4INCRDIM1 : Increment Dimension 1
bits : 29 - 29 (1 bit)
access : read-write

ARRAY4INCRDIM2 : Increment Dimension 2
bits : 30 - 30 (1 bit)
access : read-write


LOOP0RST

Loop N Reset Configuration Register
address_offset : 0xD8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP0RST LOOP0RST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ARRAY0RESETDIM0 ARRAY0RESETDIM1 ARRAY0RESETDIM2 ARRAY1RESETDIM0 ARRAY1RESETDIM1 ARRAY1RESETDIM2 ARRAY2RESETDIM0 ARRAY2RESETDIM1 ARRAY2RESETDIM2 ARRAY3RESETDIM0 ARRAY3RESETDIM1 ARRAY3RESETDIM2 ARRAY4RESETDIM0 ARRAY4RESETDIM1 ARRAY4RESETDIM2

ARRAY0RESETDIM0 : Reset Dimension 0
bits : 12 - 12 (1 bit)
access : read-write

ARRAY0RESETDIM1 : Reset Dimension 1
bits : 13 - 13 (1 bit)
access : read-write

ARRAY0RESETDIM2 : Reset Dimension 2
bits : 14 - 14 (1 bit)
access : read-write

ARRAY1RESETDIM0 : Reset Dimension 0
bits : 16 - 16 (1 bit)
access : read-write

ARRAY1RESETDIM1 : Reset Dimension 1
bits : 17 - 17 (1 bit)
access : read-write

ARRAY1RESETDIM2 : Reset Dimension 2
bits : 18 - 18 (1 bit)
access : read-write

ARRAY2RESETDIM0 : Reset Dimension 0
bits : 20 - 20 (1 bit)
access : read-write

ARRAY2RESETDIM1 : Reset Dimension 1
bits : 21 - 21 (1 bit)
access : read-write

ARRAY2RESETDIM2 : Reset Dimension 2
bits : 22 - 22 (1 bit)
access : read-write

ARRAY3RESETDIM0 : Reset Dimension 0
bits : 24 - 24 (1 bit)
access : read-write

ARRAY3RESETDIM1 : Reset Dimension 1
bits : 25 - 25 (1 bit)
access : read-write

ARRAY3RESETDIM2 : Reset Dimension 2
bits : 26 - 26 (1 bit)
access : read-write

ARRAY4RESETDIM0 : Reset Dimension 0
bits : 28 - 28 (1 bit)
access : read-write

ARRAY4RESETDIM1 : Reset Dimension 1
bits : 29 - 29 (1 bit)
access : read-write

ARRAY4RESETDIM2 : Reset Dimension 2
bits : 30 - 30 (1 bit)
access : read-write


LOOP1CFG

Loop N Configuration Register
address_offset : 0xDC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP1CFG LOOP1CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NUMITERS ARRAY0INCRDIM0 ARRAY0INCRDIM1 ARRAY0INCRDIM2 ARRAY1INCRDIM0 ARRAY1INCRDIM1 ARRAY1INCRDIM2 ARRAY2INCRDIM0 ARRAY2INCRDIM1 ARRAY2INCRDIM2 ARRAY3INCRDIM0 ARRAY3INCRDIM1 ARRAY3INCRDIM2 ARRAY4INCRDIM0 ARRAY4INCRDIM1 ARRAY4INCRDIM2

NUMITERS : Number of Iterations
bits : 0 - 9 (10 bit)
access : read-write

ARRAY0INCRDIM0 : Increment Dimension 0
bits : 12 - 12 (1 bit)
access : read-write

ARRAY0INCRDIM1 : Increment Dimension 1
bits : 13 - 13 (1 bit)
access : read-write

ARRAY0INCRDIM2 : Increment Dimension 2
bits : 14 - 14 (1 bit)
access : read-write

ARRAY1INCRDIM0 : Increment Dimension 0
bits : 16 - 16 (1 bit)
access : read-write

ARRAY1INCRDIM1 : Increment Dimension 1
bits : 17 - 17 (1 bit)
access : read-write

ARRAY1INCRDIM2 : Increment Dimension 2
bits : 18 - 18 (1 bit)
access : read-write

ARRAY2INCRDIM0 : Increment Dimension 0
bits : 20 - 20 (1 bit)
access : read-write

ARRAY2INCRDIM1 : Increment Dimension 1
bits : 21 - 21 (1 bit)
access : read-write

ARRAY2INCRDIM2 : Increment Dimension 2
bits : 22 - 22 (1 bit)
access : read-write

ARRAY3INCRDIM0 : Increment Dimension 0
bits : 24 - 24 (1 bit)
access : read-write

ARRAY3INCRDIM1 : Increment Dimension 1
bits : 25 - 25 (1 bit)
access : read-write

ARRAY3INCRDIM2 : Increment Dimension 2
bits : 26 - 26 (1 bit)
access : read-write

ARRAY4INCRDIM0 : Increment Dimension 0
bits : 28 - 28 (1 bit)
access : read-write

ARRAY4INCRDIM1 : Increment Dimension 1
bits : 29 - 29 (1 bit)
access : read-write

ARRAY4INCRDIM2 : Increment Dimension 2
bits : 30 - 30 (1 bit)
access : read-write


LOOP1RST

Loop N Reset Configuration Register
address_offset : 0xE0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP1RST LOOP1RST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ARRAY0RESETDIM0 ARRAY0RESETDIM1 ARRAY0RESETDIM2 ARRAY1RESETDIM0 ARRAY1RESETDIM1 ARRAY1RESETDIM2 ARRAY2RESETDIM0 ARRAY2RESETDIM1 ARRAY2RESETDIM2 ARRAY3RESETDIM0 ARRAY3RESETDIM1 ARRAY3RESETDIM2 ARRAY4RESETDIM0 ARRAY4RESETDIM1 ARRAY4RESETDIM2

ARRAY0RESETDIM0 : Reset Dimension 0
bits : 12 - 12 (1 bit)
access : read-write

ARRAY0RESETDIM1 : Reset Dimension 1
bits : 13 - 13 (1 bit)
access : read-write

ARRAY0RESETDIM2 : Reset Dimension 2
bits : 14 - 14 (1 bit)
access : read-write

ARRAY1RESETDIM0 : Reset Dimension 0
bits : 16 - 16 (1 bit)
access : read-write

ARRAY1RESETDIM1 : Reset Dimension 1
bits : 17 - 17 (1 bit)
access : read-write

ARRAY1RESETDIM2 : Reset Dimension 2
bits : 18 - 18 (1 bit)
access : read-write

ARRAY2RESETDIM0 : Reset Dimension 0
bits : 20 - 20 (1 bit)
access : read-write

ARRAY2RESETDIM1 : Reset Dimension 1
bits : 21 - 21 (1 bit)
access : read-write

ARRAY2RESETDIM2 : Reset Dimension 2
bits : 22 - 22 (1 bit)
access : read-write

ARRAY3RESETDIM0 : Reset Dimension 0
bits : 24 - 24 (1 bit)
access : read-write

ARRAY3RESETDIM1 : Reset Dimension 1
bits : 25 - 25 (1 bit)
access : read-write

ARRAY3RESETDIM2 : Reset Dimension 2
bits : 26 - 26 (1 bit)
access : read-write

ARRAY4RESETDIM0 : Reset Dimension 0
bits : 28 - 28 (1 bit)
access : read-write

ARRAY4RESETDIM1 : Reset Dimension 1
bits : 29 - 29 (1 bit)
access : read-write

ARRAY4RESETDIM2 : Reset Dimension 2
bits : 30 - 30 (1 bit)
access : read-write


LOOP2CFG

Loop N Configuration Register
address_offset : 0xE4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP2CFG LOOP2CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NUMITERS ARRAY0INCRDIM0 ARRAY0INCRDIM1 ARRAY0INCRDIM2 ARRAY1INCRDIM0 ARRAY1INCRDIM1 ARRAY1INCRDIM2 ARRAY2INCRDIM0 ARRAY2INCRDIM1 ARRAY2INCRDIM2 ARRAY3INCRDIM0 ARRAY3INCRDIM1 ARRAY3INCRDIM2 ARRAY4INCRDIM0 ARRAY4INCRDIM1 ARRAY4INCRDIM2

NUMITERS : Number of Iterations
bits : 0 - 9 (10 bit)
access : read-write

ARRAY0INCRDIM0 : Increment Dimension 0
bits : 12 - 12 (1 bit)
access : read-write

ARRAY0INCRDIM1 : Increment Dimension 1
bits : 13 - 13 (1 bit)
access : read-write

ARRAY0INCRDIM2 : Increment Dimension 2
bits : 14 - 14 (1 bit)
access : read-write

ARRAY1INCRDIM0 : Increment Dimension 0
bits : 16 - 16 (1 bit)
access : read-write

ARRAY1INCRDIM1 : Increment Dimension 1
bits : 17 - 17 (1 bit)
access : read-write

ARRAY1INCRDIM2 : Increment Dimension 2
bits : 18 - 18 (1 bit)
access : read-write

ARRAY2INCRDIM0 : Increment Dimension 0
bits : 20 - 20 (1 bit)
access : read-write

ARRAY2INCRDIM1 : Increment Dimension 1
bits : 21 - 21 (1 bit)
access : read-write

ARRAY2INCRDIM2 : Increment Dimension 2
bits : 22 - 22 (1 bit)
access : read-write

ARRAY3INCRDIM0 : Increment Dimension 0
bits : 24 - 24 (1 bit)
access : read-write

ARRAY3INCRDIM1 : Increment Dimension 1
bits : 25 - 25 (1 bit)
access : read-write

ARRAY3INCRDIM2 : Increment Dimension 2
bits : 26 - 26 (1 bit)
access : read-write

ARRAY4INCRDIM0 : Increment Dimension 0
bits : 28 - 28 (1 bit)
access : read-write

ARRAY4INCRDIM1 : Increment Dimension 1
bits : 29 - 29 (1 bit)
access : read-write

ARRAY4INCRDIM2 : Increment Dimension 2
bits : 30 - 30 (1 bit)
access : read-write


LOOP2RST

Loop N Reset Configuration Register
address_offset : 0xE8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP2RST LOOP2RST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ARRAY0RESETDIM0 ARRAY0RESETDIM1 ARRAY0RESETDIM2 ARRAY1RESETDIM0 ARRAY1RESETDIM1 ARRAY1RESETDIM2 ARRAY2RESETDIM0 ARRAY2RESETDIM1 ARRAY2RESETDIM2 ARRAY3RESETDIM0 ARRAY3RESETDIM1 ARRAY3RESETDIM2 ARRAY4RESETDIM0 ARRAY4RESETDIM1 ARRAY4RESETDIM2

ARRAY0RESETDIM0 : Reset Dimension 0
bits : 12 - 12 (1 bit)
access : read-write

ARRAY0RESETDIM1 : Reset Dimension 1
bits : 13 - 13 (1 bit)
access : read-write

ARRAY0RESETDIM2 : Reset Dimension 2
bits : 14 - 14 (1 bit)
access : read-write

ARRAY1RESETDIM0 : Reset Dimension 0
bits : 16 - 16 (1 bit)
access : read-write

ARRAY1RESETDIM1 : Reset Dimension 1
bits : 17 - 17 (1 bit)
access : read-write

ARRAY1RESETDIM2 : Reset Dimension 2
bits : 18 - 18 (1 bit)
access : read-write

ARRAY2RESETDIM0 : Reset Dimension 0
bits : 20 - 20 (1 bit)
access : read-write

ARRAY2RESETDIM1 : Reset Dimension 1
bits : 21 - 21 (1 bit)
access : read-write

ARRAY2RESETDIM2 : Reset Dimension 2
bits : 22 - 22 (1 bit)
access : read-write

ARRAY3RESETDIM0 : Reset Dimension 0
bits : 24 - 24 (1 bit)
access : read-write

ARRAY3RESETDIM1 : Reset Dimension 1
bits : 25 - 25 (1 bit)
access : read-write

ARRAY3RESETDIM2 : Reset Dimension 2
bits : 26 - 26 (1 bit)
access : read-write

ARRAY4RESETDIM0 : Reset Dimension 0
bits : 28 - 28 (1 bit)
access : read-write

ARRAY4RESETDIM1 : Reset Dimension 1
bits : 29 - 29 (1 bit)
access : read-write

ARRAY4RESETDIM2 : Reset Dimension 2
bits : 30 - 30 (1 bit)
access : read-write


LOOP3CFG

Loop N Configuration Register
address_offset : 0xEC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP3CFG LOOP3CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NUMITERS ARRAY0INCRDIM0 ARRAY0INCRDIM1 ARRAY0INCRDIM2 ARRAY1INCRDIM0 ARRAY1INCRDIM1 ARRAY1INCRDIM2 ARRAY2INCRDIM0 ARRAY2INCRDIM1 ARRAY2INCRDIM2 ARRAY3INCRDIM0 ARRAY3INCRDIM1 ARRAY3INCRDIM2 ARRAY4INCRDIM0 ARRAY4INCRDIM1 ARRAY4INCRDIM2

NUMITERS : Number of Iterations
bits : 0 - 9 (10 bit)
access : read-write

ARRAY0INCRDIM0 : Increment Dimension 0
bits : 12 - 12 (1 bit)
access : read-write

ARRAY0INCRDIM1 : Increment Dimension 1
bits : 13 - 13 (1 bit)
access : read-write

ARRAY0INCRDIM2 : Increment Dimension 2
bits : 14 - 14 (1 bit)
access : read-write

ARRAY1INCRDIM0 : Increment Dimension 0
bits : 16 - 16 (1 bit)
access : read-write

ARRAY1INCRDIM1 : Increment Dimension 1
bits : 17 - 17 (1 bit)
access : read-write

ARRAY1INCRDIM2 : Increment Dimension 2
bits : 18 - 18 (1 bit)
access : read-write

ARRAY2INCRDIM0 : Increment Dimension 0
bits : 20 - 20 (1 bit)
access : read-write

ARRAY2INCRDIM1 : Increment Dimension 1
bits : 21 - 21 (1 bit)
access : read-write

ARRAY2INCRDIM2 : Increment Dimension 2
bits : 22 - 22 (1 bit)
access : read-write

ARRAY3INCRDIM0 : Increment Dimension 0
bits : 24 - 24 (1 bit)
access : read-write

ARRAY3INCRDIM1 : Increment Dimension 1
bits : 25 - 25 (1 bit)
access : read-write

ARRAY3INCRDIM2 : Increment Dimension 2
bits : 26 - 26 (1 bit)
access : read-write

ARRAY4INCRDIM0 : Increment Dimension 0
bits : 28 - 28 (1 bit)
access : read-write

ARRAY4INCRDIM1 : Increment Dimension 1
bits : 29 - 29 (1 bit)
access : read-write

ARRAY4INCRDIM2 : Increment Dimension 2
bits : 30 - 30 (1 bit)
access : read-write


LOOP3RST

Loop N Reset Configuration Register
address_offset : 0xF0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP3RST LOOP3RST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ARRAY0RESETDIM0 ARRAY0RESETDIM1 ARRAY0RESETDIM2 ARRAY1RESETDIM0 ARRAY1RESETDIM1 ARRAY1RESETDIM2 ARRAY2RESETDIM0 ARRAY2RESETDIM1 ARRAY2RESETDIM2 ARRAY3RESETDIM0 ARRAY3RESETDIM1 ARRAY3RESETDIM2 ARRAY4RESETDIM0 ARRAY4RESETDIM1 ARRAY4RESETDIM2

ARRAY0RESETDIM0 : Reset Dimension 0
bits : 12 - 12 (1 bit)
access : read-write

ARRAY0RESETDIM1 : Reset Dimension 1
bits : 13 - 13 (1 bit)
access : read-write

ARRAY0RESETDIM2 : Reset Dimension 2
bits : 14 - 14 (1 bit)
access : read-write

ARRAY1RESETDIM0 : Reset Dimension 0
bits : 16 - 16 (1 bit)
access : read-write

ARRAY1RESETDIM1 : Reset Dimension 1
bits : 17 - 17 (1 bit)
access : read-write

ARRAY1RESETDIM2 : Reset Dimension 2
bits : 18 - 18 (1 bit)
access : read-write

ARRAY2RESETDIM0 : Reset Dimension 0
bits : 20 - 20 (1 bit)
access : read-write

ARRAY2RESETDIM1 : Reset Dimension 1
bits : 21 - 21 (1 bit)
access : read-write

ARRAY2RESETDIM2 : Reset Dimension 2
bits : 22 - 22 (1 bit)
access : read-write

ARRAY3RESETDIM0 : Reset Dimension 0
bits : 24 - 24 (1 bit)
access : read-write

ARRAY3RESETDIM1 : Reset Dimension 1
bits : 25 - 25 (1 bit)
access : read-write

ARRAY3RESETDIM2 : Reset Dimension 2
bits : 26 - 26 (1 bit)
access : read-write

ARRAY4RESETDIM0 : Reset Dimension 0
bits : 28 - 28 (1 bit)
access : read-write

ARRAY4RESETDIM1 : Reset Dimension 1
bits : 29 - 29 (1 bit)
access : read-write

ARRAY4RESETDIM2 : Reset Dimension 2
bits : 30 - 30 (1 bit)
access : read-write


LOOP4CFG

Loop N Configuration Register
address_offset : 0xF4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP4CFG LOOP4CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NUMITERS ARRAY0INCRDIM0 ARRAY0INCRDIM1 ARRAY0INCRDIM2 ARRAY1INCRDIM0 ARRAY1INCRDIM1 ARRAY1INCRDIM2 ARRAY2INCRDIM0 ARRAY2INCRDIM1 ARRAY2INCRDIM2 ARRAY3INCRDIM0 ARRAY3INCRDIM1 ARRAY3INCRDIM2 ARRAY4INCRDIM0 ARRAY4INCRDIM1 ARRAY4INCRDIM2

NUMITERS : Number of Iterations
bits : 0 - 9 (10 bit)
access : read-write

ARRAY0INCRDIM0 : Increment Dimension 0
bits : 12 - 12 (1 bit)
access : read-write

ARRAY0INCRDIM1 : Increment Dimension 1
bits : 13 - 13 (1 bit)
access : read-write

ARRAY0INCRDIM2 : Increment Dimension 2
bits : 14 - 14 (1 bit)
access : read-write

ARRAY1INCRDIM0 : Increment Dimension 0
bits : 16 - 16 (1 bit)
access : read-write

ARRAY1INCRDIM1 : Increment Dimension 1
bits : 17 - 17 (1 bit)
access : read-write

ARRAY1INCRDIM2 : Increment Dimension 2
bits : 18 - 18 (1 bit)
access : read-write

ARRAY2INCRDIM0 : Increment Dimension 0
bits : 20 - 20 (1 bit)
access : read-write

ARRAY2INCRDIM1 : Increment Dimension 1
bits : 21 - 21 (1 bit)
access : read-write

ARRAY2INCRDIM2 : Increment Dimension 2
bits : 22 - 22 (1 bit)
access : read-write

ARRAY3INCRDIM0 : Increment Dimension 0
bits : 24 - 24 (1 bit)
access : read-write

ARRAY3INCRDIM1 : Increment Dimension 1
bits : 25 - 25 (1 bit)
access : read-write

ARRAY3INCRDIM2 : Increment Dimension 2
bits : 26 - 26 (1 bit)
access : read-write

ARRAY4INCRDIM0 : Increment Dimension 0
bits : 28 - 28 (1 bit)
access : read-write

ARRAY4INCRDIM1 : Increment Dimension 1
bits : 29 - 29 (1 bit)
access : read-write

ARRAY4INCRDIM2 : Increment Dimension 2
bits : 30 - 30 (1 bit)
access : read-write


LOOP4RST

Loop N Reset Configuration Register
address_offset : 0xF8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP4RST LOOP4RST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ARRAY0RESETDIM0 ARRAY0RESETDIM1 ARRAY0RESETDIM2 ARRAY1RESETDIM0 ARRAY1RESETDIM1 ARRAY1RESETDIM2 ARRAY2RESETDIM0 ARRAY2RESETDIM1 ARRAY2RESETDIM2 ARRAY3RESETDIM0 ARRAY3RESETDIM1 ARRAY3RESETDIM2 ARRAY4RESETDIM0 ARRAY4RESETDIM1 ARRAY4RESETDIM2

ARRAY0RESETDIM0 : Reset Dimension 0
bits : 12 - 12 (1 bit)
access : read-write

ARRAY0RESETDIM1 : Reset Dimension 1
bits : 13 - 13 (1 bit)
access : read-write

ARRAY0RESETDIM2 : Reset Dimension 2
bits : 14 - 14 (1 bit)
access : read-write

ARRAY1RESETDIM0 : Reset Dimension 0
bits : 16 - 16 (1 bit)
access : read-write

ARRAY1RESETDIM1 : Reset Dimension 1
bits : 17 - 17 (1 bit)
access : read-write

ARRAY1RESETDIM2 : Reset Dimension 2
bits : 18 - 18 (1 bit)
access : read-write

ARRAY2RESETDIM0 : Reset Dimension 0
bits : 20 - 20 (1 bit)
access : read-write

ARRAY2RESETDIM1 : Reset Dimension 1
bits : 21 - 21 (1 bit)
access : read-write

ARRAY2RESETDIM2 : Reset Dimension 2
bits : 22 - 22 (1 bit)
access : read-write

ARRAY3RESETDIM0 : Reset Dimension 0
bits : 24 - 24 (1 bit)
access : read-write

ARRAY3RESETDIM1 : Reset Dimension 1
bits : 25 - 25 (1 bit)
access : read-write

ARRAY3RESETDIM2 : Reset Dimension 2
bits : 26 - 26 (1 bit)
access : read-write

ARRAY4RESETDIM0 : Reset Dimension 0
bits : 28 - 28 (1 bit)
access : read-write

ARRAY4RESETDIM1 : Reset Dimension 1
bits : 29 - 29 (1 bit)
access : read-write

ARRAY4RESETDIM2 : Reset Dimension 2
bits : 30 - 30 (1 bit)
access : read-write


LOOP5CFG

Loop N Configuration Register
address_offset : 0xFC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOOP5CFG LOOP5CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NUMITERS ARRAY0INCRDIM0 ARRAY0INCRDIM1 ARRAY0INCRDIM2 ARRAY1INCRDIM0 ARRAY1INCRDIM1 ARRAY1INCRDIM2 ARRAY2INCRDIM0 ARRAY2INCRDIM1 ARRAY2INCRDIM2 ARRAY3INCRDIM0 ARRAY3INCRDIM1 ARRAY3INCRDIM2 ARRAY4INCRDIM0 ARRAY4INCRDIM1 ARRAY4INCRDIM2

NUMITERS : Number of Iterations
bits : 0 - 9 (10 bit)
access : read-write

ARRAY0INCRDIM0 : Increment Dimension 0
bits : 12 - 12 (1 bit)
access : read-write

ARRAY0INCRDIM1 : Increment Dimension 1
bits : 13 - 13 (1 bit)
access : read-write

ARRAY0INCRDIM2 : Increment Dimension 2
bits : 14 - 14 (1 bit)
access : read-write

ARRAY1INCRDIM0 : Increment Dimension 0
bits : 16 - 16 (1 bit)
access : read-write

ARRAY1INCRDIM1 : Increment Dimension 1
bits : 17 - 17 (1 bit)
access : read-write

ARRAY1INCRDIM2 : Increment Dimension 2
bits : 18 - 18 (1 bit)
access : read-write

ARRAY2INCRDIM0 : Increment Dimension 0
bits : 20 - 20 (1 bit)
access : read-write

ARRAY2INCRDIM1 : Increment Dimension 1
bits : 21 - 21 (1 bit)
access : read-write

ARRAY2INCRDIM2 : Increment Dimension 2
bits : 22 - 22 (1 bit)
access : read-write

ARRAY3INCRDIM0 : Increment Dimension 0
bits : 24 - 24 (1 bit)
access : read-write

ARRAY3INCRDIM1 : Increment Dimension 1
bits : 25 - 25 (1 bit)
access : read-write

ARRAY3INCRDIM2 : Increment Dimension 2
bits : 26 - 26 (1 bit)
access : read-write

ARRAY4INCRDIM0 : Increment Dimension 0
bits : 28 - 28 (1 bit)
access : read-write

ARRAY4INCRDIM1 : Increment Dimension 1
bits : 29 - 29 (1 bit)
access : read-write

ARRAY4INCRDIM2 : Increment Dimension 2
bits : 30 - 30 (1 bit)
access : read-write



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.