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MSC_NS

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :

Registers

IPVERSION

WRITECMD

PAGELOCKWORD0

PAGELOCKWORD1

PAGELOCKWORD2

PAGELOCKWORD3

PAGELOCKWORD4

PAGELOCKWORD5

ADDRB

REPADDR0

REPADDR1

WDATA

STATUS

RPURATD0

RPURATD1

RPURATD2

RPURATD3

IF

IEN

USERDATASIZE

CMD

LOCK

READCTRL

MISCLOCKWORD

PWRCTRL

RDATACTRL

SEWRITECTRL

SEWRITECMD

SEADDRB

SEWDATA

SESTATUS

SEIF

SEIEN

STARTUP

SERDATACTRL

WRITECTRL

FLASHERASETIME

FLASHPROGTIME

SELOCK


IPVERSION

No Description
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IPVERSION IPVERSION read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPVERSION

IPVERSION : IP Version ID
bits : 0 - 31 (32 bit)
access : read-only


WRITECMD

No Description
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

WRITECMD WRITECMD write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ERASEPAGE WRITEEND ERASERANGE ERASEABORT ERASEMAIN0 CLEARWDATA

ERASEPAGE : Erase Page
bits : 1 - 1 (1 bit)
access : write-only

WRITEEND : End Write Mode
bits : 2 - 2 (1 bit)
access : write-only

ERASERANGE : Erase range of pages
bits : 4 - 4 (1 bit)
access : write-only

ERASEABORT : Abort erase sequence
bits : 5 - 5 (1 bit)
access : write-only

ERASEMAIN0 : Mass erase region 0
bits : 8 - 8 (1 bit)
access : write-only

CLEARWDATA : Clear WDATA state
bits : 12 - 12 (1 bit)
access : write-only


PAGELOCKWORD0

No Description
address_offset : 0x120 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PAGELOCKWORD0 PAGELOCKWORD0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOCKBIT

LOCKBIT : page lock bit
bits : 0 - 31 (32 bit)
access : read-write


PAGELOCKWORD1

No Description
address_offset : 0x124 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PAGELOCKWORD1 PAGELOCKWORD1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOCKBIT

LOCKBIT : page lock bit
bits : 0 - 31 (32 bit)
access : read-write


PAGELOCKWORD2

No Description
address_offset : 0x128 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PAGELOCKWORD2 PAGELOCKWORD2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOCKBIT

LOCKBIT : page lock bit
bits : 0 - 31 (32 bit)
access : read-write


PAGELOCKWORD3

No Description
address_offset : 0x12C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PAGELOCKWORD3 PAGELOCKWORD3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOCKBIT

LOCKBIT : page lock bit
bits : 0 - 31 (32 bit)
access : read-write


PAGELOCKWORD4

No Description
address_offset : 0x130 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PAGELOCKWORD4 PAGELOCKWORD4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOCKBIT

LOCKBIT : page lock bit
bits : 0 - 31 (32 bit)
access : read-write


PAGELOCKWORD5

No Description
address_offset : 0x134 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PAGELOCKWORD5 PAGELOCKWORD5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOCKBIT

LOCKBIT : page lock bit
bits : 0 - 31 (32 bit)
access : read-write


ADDRB

No Description
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADDRB ADDRB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRB

ADDRB : Page Erase or Write Address Buffer
bits : 0 - 31 (32 bit)
access : read-write


REPADDR0

This is SE read/write only register. Hostwill read back zero.
address_offset : 0x140 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

REPADDR0 REPADDR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REPINVALID REPADDR

REPINVALID : Repair Addr Invalid Flag
bits : 0 - 0 (1 bit)
access : read-write

REPADDR : Repair Page Address
bits : 1 - 15 (15 bit)
access : read-write


REPADDR1

This is SE read/write only register. Hostwill read back zero.
address_offset : 0x144 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

REPADDR1 REPADDR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REPINVALID REPADDR

REPINVALID : Repair Addr Invalid Flag
bits : 0 - 0 (1 bit)
access : read-write

REPADDR : Repair Page Address
bits : 1 - 15 (15 bit)
access : read-write


WDATA

No Description
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WDATA WDATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATAW

DATAW : Write Data
bits : 0 - 31 (32 bit)
access : read-write


STATUS

No Description
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STATUS STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUSY LOCKED INVADDR WDATAREADY ERASEABORTED PENDING TIMEOUT RANGEPARTIAL REGLOCK PWRON WREADY PWRUPCKBDFAILCOUNT

BUSY : Erase/Write Busy
bits : 0 - 0 (1 bit)
access : read-only

LOCKED : Access Locked
bits : 1 - 1 (1 bit)
access : read-only

INVADDR : Invalid Write Address or Erase Page
bits : 2 - 2 (1 bit)
access : read-only

WDATAREADY : WDATA Write Ready
bits : 3 - 3 (1 bit)
access : read-only

ERASEABORTED : The Current Flash Erase Operation Aborte
bits : 4 - 4 (1 bit)
access : read-only

PENDING : Write command is in queue
bits : 5 - 5 (1 bit)
access : read-only

TIMEOUT : Write command timeout flag
bits : 6 - 6 (1 bit)
access : read-only

RANGEPARTIAL : EraseRange with skipped locked pages
bits : 7 - 7 (1 bit)
access : read-only

REGLOCK : Register Lock Status
bits : 16 - 16 (1 bit)
access : read-only

Enumeration:

0 : UNLOCKED


1 : LOCKED


End of enumeration elements list.

PWRON : Flash power on status
bits : 24 - 24 (1 bit)
access : read-only

WREADY : Flash Write Ready
bits : 27 - 27 (1 bit)
access : read-only

PWRUPCKBDFAILCOUNT : Flash power up checkerboard pattern chec
bits : 28 - 31 (4 bit)
access : read-only


RPURATD0

Protected register address = (RPURATD register index X 32 + RPURATD bit index) X 4.
address_offset : 0x1C4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RPURATD0 RPURATD0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RATDMSCREADCTRL RATDMSCRDATACTRL RATDMSCWRITECTRL RATDMSCWRITECMD RATDMSCADDRB RATDMSCWDATA RATDMSCIF RATDMSCIEN RATDMSCCMD RATDMSCLOCK RATDMSCMISCLOCKWORD RATDMSCPWRCTRL

RATDMSCREADCTRL : READCTRL Protection Bit
bits : 1 - 1 (1 bit)
access : read-write

RATDMSCRDATACTRL : RDATACTRL Protection Bit
bits : 2 - 2 (1 bit)
access : read-write

RATDMSCWRITECTRL : WRITECTRL Protection Bit
bits : 3 - 3 (1 bit)
access : read-write

RATDMSCWRITECMD : WRITECMD Protection Bit
bits : 4 - 4 (1 bit)
access : read-write

RATDMSCADDRB : ADDRB Protection Bit
bits : 5 - 5 (1 bit)
access : read-write

RATDMSCWDATA : WDATA Protection Bit
bits : 6 - 6 (1 bit)
access : read-write

RATDMSCIF : IF Protection Bit
bits : 8 - 8 (1 bit)
access : read-write

RATDMSCIEN : IEN Protection Bit
bits : 9 - 9 (1 bit)
access : read-write

RATDMSCCMD : CMD Protection Bit
bits : 14 - 14 (1 bit)
access : read-write

RATDMSCLOCK : LOCK Protection Bit
bits : 15 - 15 (1 bit)
access : read-write

RATDMSCMISCLOCKWORD : MISCLOCKWORD Protection Bit
bits : 16 - 16 (1 bit)
access : read-write

RATDMSCPWRCTRL : PWRCTRL Protection Bit
bits : 20 - 20 (1 bit)
access : read-write


RPURATD1

Protected register address = (RPURATD register index X 32 + RPURATD bit index) X 4.
address_offset : 0x1C8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RPURATD1 RPURATD1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RATDMSCSEWRITECTRL RATDMSCSEWRITECMD RATDMSCSEADDRB RATDMSCSEWDATA RATDMSCSEIF RATDMSCSEIEN RATDMSCMEMFEATURE RATDMSCSTARTUP RATDMSCSERDATACTRL RATDMSCSEPWRSKIP RATDMSCMTPCTRL RATDMSCMTPSIZE RATDMSCOTPERASE RATDMSCFLASHERASETIME RATDMSCFLASHPROGTIME RATDMSCSELOCK

RATDMSCSEWRITECTRL : SEWRITECTRL Protection Bit
bits : 0 - 0 (1 bit)
access : read-write

RATDMSCSEWRITECMD : SEWRITECMD Protection Bit
bits : 1 - 1 (1 bit)
access : read-write

RATDMSCSEADDRB : SEADDRB Protection Bit
bits : 2 - 2 (1 bit)
access : read-write

RATDMSCSEWDATA : SEWDATA Protection Bit
bits : 3 - 3 (1 bit)
access : read-write

RATDMSCSEIF : SEIF Protection Bit
bits : 5 - 5 (1 bit)
access : read-write

RATDMSCSEIEN : SEIEN Protection Bit
bits : 6 - 6 (1 bit)
access : read-write

RATDMSCMEMFEATURE : MEMFEATURE Protection Bit
bits : 7 - 7 (1 bit)
access : read-write

RATDMSCSTARTUP : STARTUP Protection Bit
bits : 8 - 8 (1 bit)
access : read-write

RATDMSCSERDATACTRL : SERDATACTRL Protection Bit
bits : 9 - 9 (1 bit)
access : read-write

RATDMSCSEPWRSKIP : SEPWRSKIP Protection Bit
bits : 10 - 10 (1 bit)
access : read-write

RATDMSCMTPCTRL : MTPCTRL Protection Bit
bits : 11 - 11 (1 bit)
access : read-write

RATDMSCMTPSIZE : MTPSIZE Protection Bit
bits : 12 - 12 (1 bit)
access : read-write

RATDMSCOTPERASE : OTPERASE Protection Bit
bits : 13 - 13 (1 bit)
access : read-write

RATDMSCFLASHERASETIME : FLASHERASETIME Protection Bit
bits : 16 - 16 (1 bit)
access : read-write

RATDMSCFLASHPROGTIME : FLASHPROGTIME Protection Bit
bits : 17 - 17 (1 bit)
access : read-write

RATDMSCSELOCK : SELOCK Protection Bit
bits : 18 - 18 (1 bit)
access : read-write


RPURATD2

Protected register address = (RPURATD register index X 32 + RPURATD bit index) X 4.
address_offset : 0x1CC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RPURATD2 RPURATD2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RATDINSTPAGELOCKWORD0 RATDINSTPAGELOCKWORD1 RATDINSTPAGELOCKWORD2 RATDINSTPAGELOCKWORD3 RATDINSTPAGELOCKWORD4 RATDINSTPAGELOCKWORD5 RATDINSTREPADDR0 RATDINSTREPADDR1

RATDINSTPAGELOCKWORD0 : PAGELOCKWORD0 Protection Bit
bits : 8 - 8 (1 bit)
access : read-write

RATDINSTPAGELOCKWORD1 : PAGELOCKWORD1 Protection Bit
bits : 9 - 9 (1 bit)
access : read-write

RATDINSTPAGELOCKWORD2 : PAGELOCKWORD2 Protection Bit
bits : 10 - 10 (1 bit)
access : read-write

RATDINSTPAGELOCKWORD3 : PAGELOCKWORD3 Protection Bit
bits : 11 - 11 (1 bit)
access : read-write

RATDINSTPAGELOCKWORD4 : PAGELOCKWORD4 Protection Bit
bits : 12 - 12 (1 bit)
access : read-write

RATDINSTPAGELOCKWORD5 : PAGELOCKWORD5 Protection Bit
bits : 13 - 13 (1 bit)
access : read-write

RATDINSTREPADDR0 : REPADDR0 Protection Bit
bits : 16 - 16 (1 bit)
access : read-write

RATDINSTREPADDR1 : REPADDR1 Protection Bit
bits : 17 - 17 (1 bit)
access : read-write


RPURATD3

Protected register address = (RPURATD register index X 32 + RPURATD bit index) X 4.
address_offset : 0x1D0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RPURATD3 RPURATD3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RATDMSCTESTCTRL RATDMSCPATDIAGCTRL RATDMSCPATDONEADDR RATDMSCTESTREDUNDANCY RATDMSCTESTLOCK

RATDMSCTESTCTRL : TESTCTRL Protection Bit
bits : 8 - 8 (1 bit)
access : read-write

RATDMSCPATDIAGCTRL : PATDIAGCTRL Protection Bit
bits : 9 - 9 (1 bit)
access : read-write

RATDMSCPATDONEADDR : PATDONEADDR Protection Bit
bits : 11 - 11 (1 bit)
access : read-write

RATDMSCTESTREDUNDANCY : TESTREDUNDANCY Protection Bit
bits : 15 - 15 (1 bit)
access : read-write

RATDMSCTESTLOCK : TESTLOCK Protection Bit
bits : 16 - 16 (1 bit)
access : read-write


IF

No Description
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IF IF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ERASE WRITE WDATAOV PWRUPF PWROFF

ERASE : Host Erase Done Interrupt Read Flag
bits : 0 - 0 (1 bit)
access : read-write

WRITE : Host Write Done Interrupt Read Flag
bits : 1 - 1 (1 bit)
access : read-write

WDATAOV : Host write buffer overflow
bits : 2 - 2 (1 bit)
access : read-write

PWRUPF : Flash Power Up Sequence Complete Flag
bits : 8 - 8 (1 bit)
access : read-write

PWROFF : Flash Power Off Sequence Complete Flag
bits : 9 - 9 (1 bit)
access : read-write


IEN

No Description
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IEN IEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ERASE WRITE WDATAOV PWRUPF PWROFF

ERASE : Erase Done Interrupt enable
bits : 0 - 0 (1 bit)
access : read-write

WRITE : Write Done Interrupt enable
bits : 1 - 1 (1 bit)
access : read-write

WDATAOV : write data buffer overflow irq enable
bits : 2 - 2 (1 bit)
access : read-write

PWRUPF : Flash Power Up Seq done irq enable
bits : 8 - 8 (1 bit)
access : read-write

PWROFF : Flash Power Off Seq done irq enable
bits : 9 - 9 (1 bit)
access : read-write


USERDATASIZE

No Description
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

USERDATASIZE USERDATASIZE read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USERDATASIZE

USERDATASIZE : User Data Size
bits : 0 - 5 (6 bit)
access : read-only


CMD

No Description
address_offset : 0x38 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CMD CMD write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWRUP PWROFF

PWRUP : Flash Power Up Command
bits : 0 - 0 (1 bit)
access : write-only

PWROFF : Flash power off/sleep command
bits : 4 - 4 (1 bit)
access : write-only


LOCK

No Description
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

LOCK LOCK write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOCKKEY

LOCKKEY : Configuration Lock
bits : 0 - 15 (16 bit)
access : write-only

Enumeration:

0 : LOCK


7025 : UNLOCK


End of enumeration elements list.


READCTRL

No Description
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

READCTRL READCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MODE

MODE : Read Mode
bits : 20 - 21 (2 bit)
access : read-write

Enumeration:

0 : WS0

Zero wait-states inserted in fetch or read transfers

1 : WS1

One wait-state inserted for each fetch or read transfer. See Flash Wait-States table for details

2 : WS2

Two wait-states inserted for eatch fetch or read transfer. See Flash Wait-States table for details

3 : WS3

Three wait-states inserted for eatch fetch or read transfer. See Flash Wait-States table for details

End of enumeration elements list.


MISCLOCKWORD

No Description
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MISCLOCKWORD MISCLOCKWORD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MELOCKBIT UDLOCKBIT

MELOCKBIT : Mass Erase Lock
bits : 0 - 0 (1 bit)
access : read-write

UDLOCKBIT : User Data Lock
bits : 4 - 4 (1 bit)
access : read-write


PWRCTRL

No Description
address_offset : 0x50 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWRCTRL PWRCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWROFFONEM1ENTRY PWROFFONEM1PENTRY PWROFFENTRYAGAIN PWROFFDLY

PWROFFONEM1ENTRY : Power down Flash macro when enter EM1
bits : 0 - 0 (1 bit)
access : read-write

PWROFFONEM1PENTRY : Power down Flash macro when enter EM1P
bits : 1 - 1 (1 bit)
access : read-write

PWROFFENTRYAGAIN : POWER down flash again in EM1/EM1p
bits : 4 - 4 (1 bit)
access : read-write

PWROFFDLY : Power down delay
bits : 16 - 23 (8 bit)
access : read-write


RDATACTRL

No Description
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RDATACTRL RDATACTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AFDIS DOUTBUFEN

AFDIS : Automatic Invalidate Disable
bits : 1 - 1 (1 bit)
access : read-write

DOUTBUFEN : Flash dout pipeline buffer enable
bits : 12 - 12 (1 bit)
access : read-write


SEWRITECTRL

This is SE read/write only register. Host will read back zero.
address_offset : 0x80 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SEWRITECTRL SEWRITECTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WREN IRQERASEABORT LPWRITE RANGECOUNT

WREN : Enable Write/Erase Controller
bits : 0 - 0 (1 bit)
access : read-write

IRQERASEABORT : Abort Page Erase on Interrupt
bits : 1 - 1 (1 bit)
access : read-write

LPWRITE : Low-Power Erase
bits : 3 - 3 (1 bit)
access : read-write

RANGECOUNT : ErageRange Count
bits : 16 - 25 (10 bit)
access : read-write


SEWRITECMD

This is SE read/write only register. Host will read back zero.
address_offset : 0x84 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

SEWRITECMD SEWRITECMD write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ERASEPAGE WRITEEND ERASERANGE ERASEABORT ERASEMAIN0 ERASEMAIN1 ERASEMAINA CLEARWDATA

ERASEPAGE : Erase Page
bits : 1 - 1 (1 bit)
access : write-only

WRITEEND : End Write Mode
bits : 2 - 2 (1 bit)
access : write-only

ERASERANGE : Erase range of pages
bits : 4 - 4 (1 bit)
access : write-only

ERASEABORT : Abort erase sequence
bits : 5 - 5 (1 bit)
access : write-only

ERASEMAIN0 : Mass erase user area
bits : 8 - 8 (1 bit)
access : write-only

ERASEMAIN1 : Mass erase non-user area
bits : 9 - 9 (1 bit)
access : write-only

ERASEMAINA : Mass erase all main
bits : 10 - 10 (1 bit)
access : write-only

CLEARWDATA : Clear WDATA state
bits : 12 - 12 (1 bit)
access : write-only


SEADDRB

This is SE read/write only register. Host will read back zero.
address_offset : 0x88 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SEADDRB SEADDRB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRB

ADDRB : Page Erase or Write Address Buffer
bits : 0 - 31 (32 bit)
access : read-write


SEWDATA

This is SE read/write only register. Host will read back zero.
address_offset : 0x8C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SEWDATA SEWDATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATAW

DATAW : Write Data
bits : 0 - 31 (32 bit)
access : read-write


SESTATUS

This is SE read/write only register. Host will read back zero.
address_offset : 0x90 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SESTATUS SESTATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUSY LOCKED INVADDR WDATAREADY ERASEABORTED PENDING TIMEOUT RANGEPARTIAL ROOTLOCK PWRCKDONE PWRCKSKIPSTATUS

BUSY : Erase/Write Busy
bits : 0 - 0 (1 bit)
access : read-only

LOCKED : Access Locked
bits : 1 - 1 (1 bit)
access : read-only

INVADDR : Invalid Write Address or Erase Page
bits : 2 - 2 (1 bit)
access : read-only

WDATAREADY : WDATA Write Ready
bits : 3 - 3 (1 bit)
access : read-only

ERASEABORTED : The Current Flash Erase Operation Aborte
bits : 4 - 4 (1 bit)
access : read-only

PENDING : Write command is in queue
bits : 5 - 5 (1 bit)
access : read-only

TIMEOUT : Write command timeout flag
bits : 6 - 6 (1 bit)
access : read-only

RANGEPARTIAL : EraseRange with skipped locked pages
bits : 7 - 7 (1 bit)
access : read-only

ROOTLOCK : Register Lock Status
bits : 16 - 16 (1 bit)
access : read-only

Enumeration:

0 : UNLOCKED


1 : LOCKED


End of enumeration elements list.

PWRCKDONE : Flash power up CKBD done flag
bits : 30 - 30 (1 bit)
access : read-only

PWRCKSKIPSTATUS : Flash power up CKBD skip status
bits : 31 - 31 (1 bit)
access : read-only


SEIF

This is SE read/write only register. Host will read back zero.
address_offset : 0x94 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SEIF SEIF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ERASEIF WRITEIF WDATAOVIF

ERASEIF : SE Erase Done Interrupt Read Flag
bits : 0 - 0 (1 bit)
access : read-write

WRITEIF : SE Write Done Interrupt Read Flag
bits : 1 - 1 (1 bit)
access : read-write

WDATAOVIF : SE write buffer overflow
bits : 2 - 2 (1 bit)
access : read-write


SEIEN

This is SE read/write only register. Host will read back zero.
address_offset : 0x98 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SEIEN SEIEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ERASEIEN WRITEIEN WDATAOVIEN

ERASEIEN : Erase Done Interrupt enable
bits : 0 - 0 (1 bit)
access : read-write

WRITEIEN : Write Done Interrupt enable
bits : 1 - 1 (1 bit)
access : read-write

WDATAOVIEN : write data buffer overflow irq enable
bits : 2 - 2 (1 bit)
access : read-write


STARTUP

This is SE read/write only register. Host will read back zero.
address_offset : 0xA0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STARTUP STARTUP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STDLY0 STDLY1 ASTWAIT STWSEN STWSAEN STWS

STDLY0 : Startup Delay 0
bits : 0 - 9 (10 bit)
access : read-write

STDLY1 : Startup Delay 0
bits : 12 - 21 (10 bit)
access : read-write

ASTWAIT : Active Startup Wait
bits : 24 - 24 (1 bit)
access : read-write

STWSEN : Startup Waitstates Enable
bits : 25 - 25 (1 bit)
access : read-write

STWSAEN : Startup Waitstates Always Enable
bits : 26 - 26 (1 bit)
access : read-write

STWS : Startup Waitstates
bits : 28 - 30 (3 bit)
access : read-write


SERDATACTRL

This is SE read/write only register. Host will read back zero.
address_offset : 0xA4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SERDATACTRL SERDATACTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SEDOUTBUFEN

SEDOUTBUFEN : Flash dout pipeline buffer enable
bits : 12 - 12 (1 bit)
access : read-write


WRITECTRL

No Description
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WRITECTRL WRITECTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WREN IRQERASEABORT LPWRITE RANGECOUNT

WREN : Enable Write/Erase Controller
bits : 0 - 0 (1 bit)
access : read-write

IRQERASEABORT : Abort Page Erase on Interrupt
bits : 1 - 1 (1 bit)
access : read-write

LPWRITE : Low-Power Erase
bits : 3 - 3 (1 bit)
access : read-write

RANGECOUNT : ErageRange Count
bits : 16 - 25 (10 bit)
access : read-write


FLASHERASETIME

This is SE read/write only register. Host will read back zero.
address_offset : 0xC0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASHERASETIME FLASHERASETIME read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TERASE TME

TERASE : Erase Counter
bits : 0 - 14 (15 bit)
access : read-write

TME : Mass Erase Counter
bits : 16 - 30 (15 bit)
access : read-write


FLASHPROGTIME

This is SE read/write only register. Host will read back zero.
address_offset : 0xC4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASHPROGTIME FLASHPROGTIME read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TPROG TXLPW TIMEBASE THV

TPROG : Prog Counter
bits : 0 - 3 (4 bit)
access : read-write

TXLPW : Prog Counter
bits : 4 - 7 (4 bit)
access : read-write

TIMEBASE : 1 us time base counter on emuosc
bits : 8 - 12 (5 bit)
access : read-write

THV : Cumulative Program HV Counter
bits : 16 - 30 (15 bit)
access : read-write


SELOCK

This is SE read/write only register. Host will read back zero.
address_offset : 0xC8 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

SELOCK SELOCK write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SELOCKKEY

SELOCKKEY : Configuration Lock
bits : 0 - 15 (16 bit)
access : write-only

Enumeration:

0 : LOCK


41950 : UNLOCK


End of enumeration elements list.



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