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GPIO_NS

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :

Registers

IPVERSION

PORTA_CTRL

LOCK

GPIOLOCKSTATUS

ABUSALLOC

BBUSALLOC

CDBUSALLOC

AODD0SWITCH

AODD1SWITCH

AEVEN0SWITCH

AEVEN1SWITCH

PORTA_MODEL

BODD0SWITCH

BODD1SWITCH

BEVEN0SWITCH

BEVEN1SWITCH

CDODD0SWITCH

CDODD1SWITCH

CDEVEN0SWITCH

CDEVEN1SWITCH

PORTA_MODEH

PORTA_DOUT

EXTIPSELL

EXTIPSELH

EXTIPINSELL

EXTIPINSELH

EXTIRISE

EXTIFALL

IF

IEN

EM4WUEN

EM4WUPOL

PORTA_DIN

DBGROUTEPEN

TRACEROUTEPEN

ACMP0_ROUTEEN

ACMP0_ACMPOUTROUTE

ACMP1_ROUTEEN

ACMP1_ACMPOUTROUTE

CMU_ROUTEEN

CMU_CLKIN0ROUTE

CMU_CLKOUT0ROUTE

CMU_CLKOUT1ROUTE

CMU_CLKOUT2ROUTE

DCDC_ROUTEEN

DCDC_DCDCCOREHIDDENROUTE

EUSART0_ROUTEEN

EUSART0_CSROUTE

EUSART0_CTSROUTE

EUSART0_RTSROUTE

EUSART0_RXROUTE

EUSART0_SCLKROUTE

EUSART0_TXROUTE

EUSART1_ROUTEEN

EUSART1_CSROUTE

EUSART1_CTSROUTE

EUSART1_RTSROUTE

EUSART1_RXROUTE

EUSART1_SCLKROUTE

EUSART1_TXROUTE

FRC_ROUTEEN

FRC_DCLKROUTE

FRC_DFRAMEROUTE

FRC_DOUTROUTE

I2C0_ROUTEEN

I2C0_SCLROUTE

I2C0_SDAROUTE

I2C1_ROUTEEN

I2C1_SCLROUTE

I2C1_SDAROUTE

KEYSCAN_ROUTEEN

KEYSCAN_COLOUT0ROUTE

KEYSCAN_COLOUT1ROUTE

KEYSCAN_COLOUT2ROUTE

KEYSCAN_COLOUT3ROUTE

KEYSCAN_COLOUT4ROUTE

KEYSCAN_COLOUT5ROUTE

KEYSCAN_COLOUT6ROUTE

KEYSCAN_COLOUT7ROUTE

KEYSCAN_ROWSENSE0ROUTE

KEYSCAN_ROWSENSE1ROUTE

KEYSCAN_ROWSENSE2ROUTE

KEYSCAN_ROWSENSE3ROUTE

KEYSCAN_ROWSENSE4ROUTE

KEYSCAN_ROWSENSE5ROUTE

LETIMER_ROUTEEN

LETIMER_OUT0ROUTE

LETIMER_OUT1ROUTE

MODEM_ROUTEEN

MODEM_ANT0ROUTE

MODEM_ANT1ROUTE

MODEM_ANTROLLOVERROUTE

MODEM_ANTRR0ROUTE

MODEM_ANTRR1ROUTE

MODEM_ANTRR2ROUTE

MODEM_ANTRR3ROUTE

MODEM_ANTRR4ROUTE

MODEM_ANTRR5ROUTE

MODEM_ANTSWENROUTE

MODEM_ANTSWUSROUTE

MODEM_ANTTRIGROUTE

MODEM_ANTTRIGSTOPROUTE

MODEM_DCLKROUTE

MODEM_DINROUTE

MODEM_DOUTROUTE

PCNT0_S0INROUTE

PCNT0_S1INROUTE

PRS0_ROUTEEN

PRS0_ASYNCH0ROUTE

PRS0_ASYNCH1ROUTE

PRS0_ASYNCH2ROUTE

PRS0_ASYNCH3ROUTE

PRS0_ASYNCH4ROUTE

PRS0_ASYNCH5ROUTE

PRS0_ASYNCH6ROUTE

PRS0_ASYNCH7ROUTE

PRS0_ASYNCH8ROUTE

PRS0_ASYNCH9ROUTE

PRS0_ASYNCH10ROUTE

PRS0_ASYNCH11ROUTE

PRS0_ASYNCH12ROUTE

PRS0_ASYNCH13ROUTE

PRS0_ASYNCH14ROUTE

PRS0_ASYNCH15ROUTE

PRS0_SYNCH0ROUTE

PRS0_SYNCH1ROUTE

PRS0_SYNCH2ROUTE

PORTB_CTRL

PRS0_SYNCH3ROUTE

DBUSRAC_ROUTEEN

DBUSRAC_LNAENROUTE

DBUSRAC_PAENROUTE

DBUSRFECA0_ROUTEEN

DBUSRFECA0_DATAOUT0ROUTE

DBUSRFECA0_DATAOUT1ROUTE

DBUSRFECA0_DATAOUT2ROUTE

DBUSRFECA0_DATAOUT3ROUTE

DBUSRFECA0_DATAOUT4ROUTE

DBUSRFECA0_DATAOUT5ROUTE

DBUSRFECA0_DATAOUT6ROUTE

DBUSRFECA0_DATAOUT7ROUTE

DBUSRFECA0_DATAOUT8ROUTE

PORTB_MODEL

DBUSRFECA0_DATAOUT9ROUTE

DBUSRFECA0_DATAOUT10ROUTE

DBUSRFECA0_DATAOUT11ROUTE

DBUSRFECA0_DATAOUT12ROUTE

DBUSRFECA0_DATAOUT13ROUTE

DBUSRFECA0_DATAOUT14ROUTE

DBUSRFECA0_DATAOUT15ROUTE

DBUSRFECA0_DATAOUT16ROUTE

DBUSRFECA0_DATAOUT17ROUTE

DBUSRFECA0_DATAOUT18ROUTE

DBUSRFECA0_DATAVALIDROUTE

DBUSRFECA0_TRIGGERINROUTE

DBUSSYXO0_BUFOUTREQINASYNCROUTE

TIMER0_ROUTEEN

TIMER0_CC0ROUTE

TIMER0_CC1ROUTE

TIMER0_CC2ROUTE

TIMER0_CCC0ROUTE

TIMER0_CCC1ROUTE

TIMER0_CCC2ROUTE

TIMER1_ROUTEEN

TIMER1_CC0ROUTE

TIMER1_CC1ROUTE

TIMER1_CC2ROUTE

TIMER1_CCC0ROUTE

TIMER1_CCC1ROUTE

TIMER1_CCC2ROUTE

TIMER2_ROUTEEN

TIMER2_CC0ROUTE

TIMER2_CC1ROUTE

TIMER2_CC2ROUTE

TIMER2_CCC0ROUTE

TIMER2_CCC1ROUTE

TIMER2_CCC2ROUTE

TIMER3_ROUTEEN

TIMER3_CC0ROUTE

TIMER3_CC1ROUTE

TIMER3_CC2ROUTE

TIMER3_CCC0ROUTE

TIMER3_CCC1ROUTE

TIMER3_CCC2ROUTE

PORTB_DOUT

TIMER4_ROUTEEN

TIMER4_CC0ROUTE

TIMER4_CC1ROUTE

TIMER4_CC2ROUTE

TIMER4_CCC0ROUTE

TIMER4_CCC1ROUTE

TIMER4_CCC2ROUTE

USART0_ROUTEEN

USART0_CSROUTE

USART0_CTSROUTE

USART0_RTSROUTE

USART0_RXROUTE

USART0_CLKROUTE

USART0_TXROUTE

PORTB_DIN

RPURATD0

RPURATD1

RPURATD6

RPURATD8

RPURATD9

RPURATD10

RPURATD11

RPURATD12

RPURATD13

RPURATD14

PORTC_CTRL

PORTC_MODEL

PORTC_MODEH

PORTC_DOUT

PORTC_DIN

PORTD_CTRL

PORTD_MODEL

PORTD_DOUT

PORTD_DIN


IPVERSION

No Description
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IPVERSION IPVERSION read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPVERSION

IPVERSION : ip version id
bits : 0 - 31 (32 bit)
access : read-only


PORTA_CTRL

Port control
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTA_CTRL PORTA_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLEWRATE DINDIS SLEWRATEALT DINDISALT

SLEWRATE : Slew Rate
bits : 4 - 6 (3 bit)
access : read-write

DINDIS : Data In Disable
bits : 12 - 12 (1 bit)
access : read-write

SLEWRATEALT : Slew Rate Alt
bits : 20 - 22 (3 bit)
access : read-write

DINDISALT : Data In Disable Alt
bits : 28 - 28 (1 bit)
access : read-write


LOCK

No Description
address_offset : 0x300 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

LOCK LOCK write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOCKKEY

LOCKKEY : Configuration Lock Key
bits : 0 - 15 (16 bit)
access : write-only

Enumeration:

42292 : UNLOCK

Unlock code

End of enumeration elements list.


GPIOLOCKSTATUS

No Description
address_offset : 0x310 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

GPIOLOCKSTATUS GPIOLOCKSTATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOCK

LOCK : GPIO LOCK status
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

0 : UNLOCKED

Registers are unlocked

1 : LOCKED

Registers are locked

End of enumeration elements list.


ABUSALLOC

A Bus allocation
address_offset : 0x320 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ABUSALLOC ABUSALLOC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AEVEN0 AEVEN1 AODD0 AODD1

AEVEN0 : A Bus Even 0
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

4 : VDAC0CH0

The bus is allocated to VDAC0 CH0

5 : VDAC1CH0

The bus is allocated to VDAC1 CH0

14 : DIAGA

The bus is allocated to DIAGA

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.

AEVEN1 : A Bus Even 1
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

4 : VDAC0CH1

The bus is allocated to VDAC0 CH1

5 : VDAC1CH1

The bus is allocated to VDAC1 CH1

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.

AODD0 : A Bus Odd 0
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

4 : VDAC0CH0

The bus is allocated to VDAC0 CH0

5 : VDAC1CH0

The bus is allocated to VDAC1 CH0

14 : DIAGA

The bus is allocated to DIAGA

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.

AODD1 : A Bus Odd 1
bits : 24 - 27 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

4 : VDAC0CH1

The bus is allocated to VDAC0 CH1

5 : VDAC1CH1

The bus is allocated to VDAC1 CH1

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.


BBUSALLOC

B Bus allocation
address_offset : 0x324 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BBUSALLOC BBUSALLOC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BEVEN0 BEVEN1 BODD0 BODD1

BEVEN0 : B Bus Even 0
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

4 : VDAC0CH0

The bus is allocated to VDAC0 CH0

5 : VDAC1CH0

The bus is allocated to VDAC1 CH0

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.

BEVEN1 : B Bus Even 1
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

4 : VDAC0CH1

The bus is allocated to VDAC0 CH1

5 : VDAC1CH1

The bus is allocated to VDAC1 CH1

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.

BODD0 : B Bus Odd 0
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

4 : VDAC0CH0

The bus is allocated to VDAC0 CH0

5 : VDAC1CH0

The bus is allocated to VDAC1 CH0

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.

BODD1 : B Bus Odd 1
bits : 24 - 27 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

4 : VDAC0CH1

The bus is allocated to VDAC0 CH1

5 : VDAC1CH1

The bus is allocated to VDAC1 CH1

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.


CDBUSALLOC

CD Bus allocation
address_offset : 0x328 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CDBUSALLOC CDBUSALLOC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CDEVEN0 CDEVEN1 CDODD0 CDODD1

CDEVEN0 : CD Bus Even 0
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

4 : VDAC0CH0

The bus is allocated to VDAC0 CH0

5 : VDAC1CH0

The bus is allocated to VDAC1 CH0

11 : REPEFUSE

The bus is allocated to Repair EFUSE programming voltage

12 : PMON

The bus is allocated to Process Monitor

13 : EFUSE

The bus is allocated for EFUSE programming voltage

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.

CDEVEN1 : CD Bus Even 1
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

4 : VDAC0CH1

The bus is allocated to VDAC0 CH1

5 : VDAC1CH1

The bus is allocated to VDAC1 CH1

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.

CDODD0 : CD Bus Odd 0
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

4 : VDAC0CH0

The bus is allocated to VDAC0 CH0

5 : VDAC1CH0

The bus is allocated to VDAC1 CH0

12 : PMON

The bus is allocated to Process Monitor

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.

CDODD1 : CD Bus Odd 1
bits : 24 - 27 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

4 : VDAC0CH1

The bus is allocated to VDAC0 CH1

5 : VDAC1CH1

The bus is allocated to VDAC1 CH1

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.


AODD0SWITCH

ABUS AODD0 Switch Register
address_offset : 0x330 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AODD0SWITCH AODD0SWITCH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AODD0SWITCH

AODD0SWITCH : AODD0 switch register
bits : 0 - 4 (5 bit)
access : read-write


AODD1SWITCH

ABUS AODD1 Switch Register
address_offset : 0x334 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AODD1SWITCH AODD1SWITCH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AODD1SWITCH

AODD1SWITCH : AODD1 switch register
bits : 0 - 4 (5 bit)
access : read-write


AEVEN0SWITCH

ABUS AEVEN0 Switch Register
address_offset : 0x338 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AEVEN0SWITCH AEVEN0SWITCH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AEVEN0SWITCH

AEVEN0SWITCH : AEVEN0 switch register
bits : 0 - 4 (5 bit)
access : read-write


AEVEN1SWITCH

ABUS AEVEN1 Switch Register
address_offset : 0x33C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AEVEN1SWITCH AEVEN1SWITCH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AEVEN1SWITCH

AEVEN1SWITCH : AEVEN1 switch register
bits : 0 - 4 (5 bit)
access : read-write


PORTA_MODEL

mode low
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTA_MODEL PORTA_MODEL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MODE0 MODE1 MODE2 MODE3 MODE4 MODE5 MODE6 MODE7

MODE0 : MODE n
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE1 : MODE n
bits : 4 - 7 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE2 : MODE n
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE3 : MODE n
bits : 12 - 15 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE4 : MODE n
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE5 : MODE n
bits : 20 - 23 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE6 : MODE n
bits : 24 - 27 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE7 : MODE n
bits : 28 - 31 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.


BODD0SWITCH

ABUS BODD0 Switch Register
address_offset : 0x340 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BODD0SWITCH BODD0SWITCH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BODD0SWITCH

BODD0SWITCH : BODD0 Switch Reg
bits : 0 - 2 (3 bit)
access : read-write


BODD1SWITCH

ABUS BODD1 Switch Register
address_offset : 0x344 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BODD1SWITCH BODD1SWITCH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BODD1SWITCH

BODD1SWITCH : BODD1 Switch Reg
bits : 0 - 2 (3 bit)
access : read-write


BEVEN0SWITCH

ABUS BEVEN0 Switch Register
address_offset : 0x348 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BEVEN0SWITCH BEVEN0SWITCH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BEVEN0SWITCH

BEVEN0SWITCH : BEVEN0 switch register
bits : 0 - 2 (3 bit)
access : read-write


BEVEN1SWITCH

ABUS BEVEN1 Switch Register
address_offset : 0x34C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BEVEN1SWITCH BEVEN1SWITCH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BEVEN1SWITCH

BEVEN1SWITCH : BEVEN1 switch register
bits : 0 - 2 (3 bit)
access : read-write


CDODD0SWITCH

ABUS CDODD0 Switch Register
address_offset : 0x350 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CDODD0SWITCH CDODD0SWITCH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CODD0SWITCH DODD0SWITCH

CODD0SWITCH : CODD0 switch register
bits : 0 - 4 (5 bit)
access : read-write

DODD0SWITCH : DODD0 switch register
bits : 16 - 18 (3 bit)
access : read-write


CDODD1SWITCH

ABUS CDODD1 Switch Register
address_offset : 0x354 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CDODD1SWITCH CDODD1SWITCH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CODD1SWITCH DODD1SWITCH

CODD1SWITCH : CODD1 switch register
bits : 0 - 4 (5 bit)
access : read-write

DODD1SWITCH : DODD1 switch register
bits : 16 - 18 (3 bit)
access : read-write


CDEVEN0SWITCH

ABUS CDEVEN0 Switch Register
address_offset : 0x358 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CDEVEN0SWITCH CDEVEN0SWITCH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CEVEN0SWITCH DEVEN0SWITCH

CEVEN0SWITCH : CEVEN0 switch register
bits : 0 - 4 (5 bit)
access : read-write

DEVEN0SWITCH : DEVEN0 switch register
bits : 16 - 18 (3 bit)
access : read-write


CDEVEN1SWITCH

ABUS CDEVEN1 Switch Register
address_offset : 0x35C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CDEVEN1SWITCH CDEVEN1SWITCH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CEVEN1SWITCH DEVEN1SWITCH

CEVEN1SWITCH : CEVEN1 switch register
bits : 0 - 4 (5 bit)
access : read-write

DEVEN1SWITCH : DEVEN1 switch register
bits : 16 - 18 (3 bit)
access : read-write


PORTA_MODEH

mode high
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTA_MODEH PORTA_MODEH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MODE0 MODE1

MODE0 : MODE n
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE1 : MODE n
bits : 4 - 7 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.


PORTA_DOUT

data out
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTA_DOUT PORTA_DOUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DOUT

DOUT : Data output
bits : 0 - 9 (10 bit)
access : read-write


EXTIPSELL

External Interrupt Port Select Low
address_offset : 0x400 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTIPSELL EXTIPSELL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIPSEL0 EXTIPSEL1 EXTIPSEL2 EXTIPSEL3 EXTIPSEL4 EXTIPSEL5 EXTIPSEL6 EXTIPSEL7

EXTIPSEL0 : External Interrupt Port Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : PORTA

Port A group selected

1 : PORTB

Port B group selected

2 : PORTC

Port C group selected

3 : PORTD

Port D group selected

End of enumeration elements list.

EXTIPSEL1 : External Interrupt Port Select
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : PORTA

Port A group selected

1 : PORTB

Port B group selected

2 : PORTC

Port C group selected

3 : PORTD

Port D group selected

End of enumeration elements list.

EXTIPSEL2 : External Interrupt Port Select
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : PORTA

Port A group selected

1 : PORTB

Port B group selected

2 : PORTC

Port C group selected

3 : PORTD

Port D group selected

End of enumeration elements list.

EXTIPSEL3 : External Interrupt Port Select
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : PORTA

Port A group selected

1 : PORTB

Port B group selected

2 : PORTC

Port C group selected

3 : PORTD

Port D group selected

End of enumeration elements list.

EXTIPSEL4 : External Interrupt Port Select
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : PORTA

Port A group selected

1 : PORTB

Port B group selected

2 : PORTC

Port C group selected

3 : PORTD

Port D group selected

End of enumeration elements list.

EXTIPSEL5 : External Interrupt Port Select
bits : 20 - 21 (2 bit)
access : read-write

Enumeration:

0 : PORTA

Port A group selected

1 : PORTB

Port B group selected

2 : PORTC

Port C group selected

3 : PORTD

Port D group selected

End of enumeration elements list.

EXTIPSEL6 : External Interrupt Port Select
bits : 24 - 25 (2 bit)
access : read-write

Enumeration:

0 : PORTA

Port A group selected

1 : PORTB

Port B group selected

2 : PORTC

Port C group selected

3 : PORTD

Port D group selected

End of enumeration elements list.

EXTIPSEL7 : External Interrupt Port Select
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : PORTA

Port A group selected

1 : PORTB

Port B group selected

2 : PORTC

Port C group selected

3 : PORTD

Port D group selected

End of enumeration elements list.


EXTIPSELH

External interrupt Port Select High
address_offset : 0x404 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTIPSELH EXTIPSELH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIPSEL0 EXTIPSEL1 EXTIPSEL2 EXTIPSEL3

EXTIPSEL0 : External Interrupt Port Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : PORTA

Port A group selected

1 : PORTB

Port B group selected

2 : PORTC

Port C group selected

3 : PORTD

Port D group selected

End of enumeration elements list.

EXTIPSEL1 : External Interrupt Port Select
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : PORTA

Port A group selected

1 : PORTB

Port B group selected

2 : PORTC

Port C group selected

3 : PORTD

Port D group selected

End of enumeration elements list.

EXTIPSEL2 : External Interrupt Port Select
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : PORTA

Port A group selected

1 : PORTB

Port B group selected

2 : PORTC

Port C group selected

3 : PORTD

Port D group selected

End of enumeration elements list.

EXTIPSEL3 : External Interrupt Port Select
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : PORTA

Port A group selected

1 : PORTB

Port B group selected

2 : PORTC

Port C group selected

3 : PORTD

Port D group selected

End of enumeration elements list.


EXTIPINSELL

External Interrupt Pin Select Low
address_offset : 0x408 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTIPINSELL EXTIPINSELL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIPINSEL0 EXTIPINSEL1 EXTIPINSEL2 EXTIPINSEL3 EXTIPINSEL4 EXTIPINSEL5 EXTIPINSEL6 EXTIPINSEL7

EXTIPINSEL0 : External Interrupt Pin select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : PIN0

OFFSET=0

1 : PIN1

OFFSET=1

2 : PIN2

OFFSET=2

3 : PIN3

OFFSET=3

End of enumeration elements list.

EXTIPINSEL1 : External Interrupt Pin select
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : PIN0

OFFSET=0

1 : PIN1

OFFSET=1

2 : PIN2

OFFSET=2

3 : PIN3

OFFSET=3

End of enumeration elements list.

EXTIPINSEL2 : External Interrupt Pin select
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : PIN0

OFFSET=0

1 : PIN1

OFFSET=1

2 : PIN2

OFFSET=2

3 : PIN3

OFFSET=3

End of enumeration elements list.

EXTIPINSEL3 : External Interrupt Pin select
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : PIN0

OFFSET=0

1 : PIN1

OFFSET=1

2 : PIN2

OFFSET=2

3 : PIN3

OFFSET=3

End of enumeration elements list.

EXTIPINSEL4 : External Interrupt Pin select
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : PIN0

OFFSET=0

1 : PIN1

OFFSET=1

2 : PIN2

OFFSET=2

3 : PIN3

OFFSET=3

End of enumeration elements list.

EXTIPINSEL5 : External Interrupt Pin select
bits : 20 - 21 (2 bit)
access : read-write

Enumeration:

0 : PIN0

OFFSET=0

1 : PIN1

OFFSET=1

2 : PIN2

OFFSET=2

3 : PIN3

OFFSET=3

End of enumeration elements list.

EXTIPINSEL6 : External Interrupt Pin select
bits : 24 - 25 (2 bit)
access : read-write

Enumeration:

0 : PIN0

OFFSET=0

1 : PIN1

OFFSET=1

2 : PIN2

OFFSET=2

3 : PIN3

OFFSET=3

End of enumeration elements list.

EXTIPINSEL7 : External Interrupt Pin select
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : PIN0

OFFSET=0

1 : PIN1

OFFSET=1

2 : PIN2

OFFSET=2

3 : PIN3

OFFSET=3

End of enumeration elements list.


EXTIPINSELH

External Interrupt Pin Select High
address_offset : 0x40C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTIPINSELH EXTIPINSELH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIPINSEL0 EXTIPINSEL1 EXTIPINSEL2 EXTIPINSEL3

EXTIPINSEL0 : External Interrupt Pin select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : PIN8

OFFSET=8

1 : PIN9

OFFSET=9

2 : PIN10

OFFSET=10

3 : PIN11

OFFSET=11

End of enumeration elements list.

EXTIPINSEL1 : External Interrupt Pin select
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : PIN8

OFFSET=8

1 : PIN9

OFFSET=9

2 : PIN10

OFFSET=10

3 : PIN11

OFFSET=11

End of enumeration elements list.

EXTIPINSEL2 : External Interrupt Pin select
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : PIN8

OFFSET=8

1 : PIN9

OFFSET=9

2 : PIN10

OFFSET=10

3 : PIN11

OFFSET=11

End of enumeration elements list.

EXTIPINSEL3 : External Interrupt Pin select
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : PIN8

OFFSET=8

1 : PIN9

OFFSET=9

2 : PIN10

OFFSET=10

3 : PIN11

OFFSET=11

End of enumeration elements list.


EXTIRISE

External Interrupt Rising Edge Trigger
address_offset : 0x410 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTIRISE EXTIRISE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIRISE

EXTIRISE : EXT Int Rise
bits : 0 - 11 (12 bit)
access : read-write


EXTIFALL

External Interrupt Falling Edge Trigger
address_offset : 0x414 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTIFALL EXTIFALL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIFALL

EXTIFALL : EXT Int FALL
bits : 0 - 11 (12 bit)
access : read-write


IF

Interrupt Flag
address_offset : 0x420 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IF IF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIF0 EXTIF1 EXTIF2 EXTIF3 EXTIF4 EXTIF5 EXTIF6 EXTIF7 EXTIF8 EXTIF9 EXTIF10 EXTIF11 EM4WU

EXTIF0 : External Pin Flag
bits : 0 - 0 (1 bit)
access : read-write

EXTIF1 : External Pin Flag
bits : 1 - 1 (1 bit)
access : read-write

EXTIF2 : External Pin Flag
bits : 2 - 2 (1 bit)
access : read-write

EXTIF3 : External Pin Flag
bits : 3 - 3 (1 bit)
access : read-write

EXTIF4 : External Pin Flag
bits : 4 - 4 (1 bit)
access : read-write

EXTIF5 : External Pin Flag
bits : 5 - 5 (1 bit)
access : read-write

EXTIF6 : External Pin Flag
bits : 6 - 6 (1 bit)
access : read-write

EXTIF7 : External Pin Flag
bits : 7 - 7 (1 bit)
access : read-write

EXTIF8 : External Pin Flag
bits : 8 - 8 (1 bit)
access : read-write

EXTIF9 : External Pin Flag
bits : 9 - 9 (1 bit)
access : read-write

EXTIF10 : External Pin Flag
bits : 10 - 10 (1 bit)
access : read-write

EXTIF11 : External Pin Flag
bits : 11 - 11 (1 bit)
access : read-write

EM4WU : EM4 wake up
bits : 16 - 27 (12 bit)
access : read-write


IEN

Interrupt Enable
address_offset : 0x424 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IEN IEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIEN0 EXTIEN1 EXTIEN2 EXTIEN3 EXTIEN4 EXTIEN5 EXTIEN6 EXTIEN7 EXTIEN8 EXTIEN9 EXTIEN10 EXTIEN11 EM4WUIEN0 EM4WUIEN1 EM4WUIEN2 EM4WUIEN3 EM4WUIEN4 EM4WUIEN5 EM4WUIEN6 EM4WUIEN7 EM4WUIEN8 EM4WUIEN9 EM4WUIEN10 EM4WUIEN11

EXTIEN0 : External Pin Enable
bits : 0 - 0 (1 bit)
access : read-write

EXTIEN1 : External Pin Enable
bits : 1 - 1 (1 bit)
access : read-write

EXTIEN2 : External Pin Enable
bits : 2 - 2 (1 bit)
access : read-write

EXTIEN3 : External Pin Enable
bits : 3 - 3 (1 bit)
access : read-write

EXTIEN4 : External Pin Enable
bits : 4 - 4 (1 bit)
access : read-write

EXTIEN5 : External Pin Enable
bits : 5 - 5 (1 bit)
access : read-write

EXTIEN6 : External Pin Enable
bits : 6 - 6 (1 bit)
access : read-write

EXTIEN7 : External Pin Enable
bits : 7 - 7 (1 bit)
access : read-write

EXTIEN8 : External Pin Enable
bits : 8 - 8 (1 bit)
access : read-write

EXTIEN9 : External Pin Enable
bits : 9 - 9 (1 bit)
access : read-write

EXTIEN10 : External Pin Enable
bits : 10 - 10 (1 bit)
access : read-write

EXTIEN11 : External Pin Enable
bits : 11 - 11 (1 bit)
access : read-write

EM4WUIEN0 : EM4 Wake Up Interrupt En
bits : 16 - 16 (1 bit)
access : read-write

EM4WUIEN1 : EM4 Wake Up Interrupt En
bits : 17 - 17 (1 bit)
access : read-write

EM4WUIEN2 : EM4 Wake Up Interrupt En
bits : 18 - 18 (1 bit)
access : read-write

EM4WUIEN3 : EM4 Wake Up Interrupt En
bits : 19 - 19 (1 bit)
access : read-write

EM4WUIEN4 : EM4 Wake Up Interrupt En
bits : 20 - 20 (1 bit)
access : read-write

EM4WUIEN5 : EM4 Wake Up Interrupt En
bits : 21 - 21 (1 bit)
access : read-write

EM4WUIEN6 : EM4 Wake Up Interrupt En
bits : 22 - 22 (1 bit)
access : read-write

EM4WUIEN7 : EM4 Wake Up Interrupt En
bits : 23 - 23 (1 bit)
access : read-write

EM4WUIEN8 : EM4 Wake Up Interrupt En
bits : 24 - 24 (1 bit)
access : read-write

EM4WUIEN9 : EM4 Wake Up Interrupt En
bits : 25 - 25 (1 bit)
access : read-write

EM4WUIEN10 : EM4 Wake Up Interrupt En
bits : 26 - 26 (1 bit)
access : read-write

EM4WUIEN11 : EM4 Wake Up Interrupt En
bits : 27 - 27 (1 bit)
access : read-write


EM4WUEN

No Description
address_offset : 0x42C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EM4WUEN EM4WUEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EM4WUEN

EM4WUEN : EM4 wake up enable
bits : 16 - 27 (12 bit)
access : read-write


EM4WUPOL

No Description
address_offset : 0x430 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EM4WUPOL EM4WUPOL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EM4WUPOL

EM4WUPOL : EM4 Wake-Up Polarity
bits : 16 - 27 (12 bit)
access : read-write


PORTA_DIN

data in
address_offset : 0x44 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PORTA_DIN PORTA_DIN read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DIN

DIN : Data input
bits : 0 - 9 (10 bit)
access : read-only


DBGROUTEPEN

No Description
address_offset : 0x440 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBGROUTEPEN DBGROUTEPEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SWCLKTCKPEN SWDIOTMSPEN TDOPEN TDIPEN

SWCLKTCKPEN : Route Pin Enable
bits : 0 - 0 (1 bit)
access : read-write

SWDIOTMSPEN : Route Location 0
bits : 1 - 1 (1 bit)
access : read-write

TDOPEN : JTAG Test Debug Output Pin Enable
bits : 2 - 2 (1 bit)
access : read-write

TDIPEN : JTAG Test Debug Input Pin Enable
bits : 3 - 3 (1 bit)
access : read-write


TRACEROUTEPEN

No Description
address_offset : 0x444 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TRACEROUTEPEN TRACEROUTEPEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SWVPEN TRACECLKPEN TRACEDATA0PEN TRACEDATA1PEN TRACEDATA2PEN TRACEDATA3PEN

SWVPEN : Serial Wire Viewer Output Pin Enable
bits : 0 - 0 (1 bit)
access : read-write

TRACECLKPEN : Trace Clk Pin Enable
bits : 1 - 1 (1 bit)
access : read-write

TRACEDATA0PEN : Trace Data0 Pin Enable
bits : 2 - 2 (1 bit)
access : read-write

TRACEDATA1PEN : Trace Data1 Pin Enable
bits : 3 - 3 (1 bit)
access : read-write

TRACEDATA2PEN : Trace Data2 Pin Enable
bits : 4 - 4 (1 bit)
access : read-write

TRACEDATA3PEN : Trace Data3 Pin Enable
bits : 5 - 5 (1 bit)
access : read-write


ACMP0_ROUTEEN

ACMP0 pin enable
address_offset : 0x450 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ACMP0_ROUTEEN ACMP0_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPOUTPEN

ACMPOUTPEN : ACMPOUT pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write


ACMP0_ACMPOUTROUTE

ACMPOUT port/pin select
address_offset : 0x454 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ACMP0_ACMPOUTROUTE ACMP0_ACMPOUTROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ACMPOUT port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ACMPOUT pin select register
bits : 16 - 19 (4 bit)
access : read-write


ACMP1_ROUTEEN

ACMP1 pin enable
address_offset : 0x45C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ACMP1_ROUTEEN ACMP1_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPOUTPEN

ACMPOUTPEN : ACMPOUT pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write


ACMP1_ACMPOUTROUTE

ACMPOUT port/pin select
address_offset : 0x460 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ACMP1_ACMPOUTROUTE ACMP1_ACMPOUTROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ACMPOUT port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ACMPOUT pin select register
bits : 16 - 19 (4 bit)
access : read-write


CMU_ROUTEEN

CMU pin enable
address_offset : 0x468 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMU_ROUTEEN CMU_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLKOUT0PEN CLKOUT1PEN CLKOUT2PEN

CLKOUT0PEN : CLKOUT0 pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

CLKOUT1PEN : CLKOUT1 pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

CLKOUT2PEN : CLKOUT2 pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write


CMU_CLKIN0ROUTE

CLKIN0 port/pin select
address_offset : 0x46C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMU_CLKIN0ROUTE CMU_CLKIN0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CLKIN0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CLKIN0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


CMU_CLKOUT0ROUTE

CLKOUT0 port/pin select
address_offset : 0x470 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMU_CLKOUT0ROUTE CMU_CLKOUT0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CLKOUT0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CLKOUT0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


CMU_CLKOUT1ROUTE

CLKOUT1 port/pin select
address_offset : 0x474 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMU_CLKOUT1ROUTE CMU_CLKOUT1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CLKOUT1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CLKOUT1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


CMU_CLKOUT2ROUTE

CLKOUT2 port/pin select
address_offset : 0x478 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMU_CLKOUT2ROUTE CMU_CLKOUT2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CLKOUT2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CLKOUT2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


DCDC_ROUTEEN

DCDC pin enable
address_offset : 0x484 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DCDC_ROUTEEN DCDC_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCDCCOREHIDDENPEN

DCDCCOREHIDDENPEN : DCDCCOREHIDDEN pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write


DCDC_DCDCCOREHIDDENROUTE

DCDCCOREHIDDEN port/pin select
address_offset : 0x488 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DCDC_DCDCCOREHIDDENROUTE DCDC_DCDCCOREHIDDENROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DCDCCOREHIDDEN port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DCDCCOREHIDDEN pin select register
bits : 16 - 19 (4 bit)
access : read-write


EUSART0_ROUTEEN

EUSART0 pin enable
address_offset : 0x494 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EUSART0_ROUTEEN EUSART0_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CSPEN RTSPEN RXPEN SCLKPEN TXPEN

CSPEN : CS pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

RTSPEN : RTS pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

RXPEN : RX pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

SCLKPEN : SCLK pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write

TXPEN : TX pin enable control bit
bits : 4 - 4 (1 bit)
access : read-write


EUSART0_CSROUTE

CS port/pin select
address_offset : 0x498 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EUSART0_CSROUTE EUSART0_CSROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CS port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CS pin select register
bits : 16 - 19 (4 bit)
access : read-write


EUSART0_CTSROUTE

CTS port/pin select
address_offset : 0x49C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EUSART0_CTSROUTE EUSART0_CTSROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CTS port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CTS pin select register
bits : 16 - 19 (4 bit)
access : read-write


EUSART0_RTSROUTE

RTS port/pin select
address_offset : 0x4A0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EUSART0_RTSROUTE EUSART0_RTSROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : RTS port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : RTS pin select register
bits : 16 - 19 (4 bit)
access : read-write


EUSART0_RXROUTE

RX port/pin select
address_offset : 0x4A4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EUSART0_RXROUTE EUSART0_RXROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : RX port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : RX pin select register
bits : 16 - 19 (4 bit)
access : read-write


EUSART0_SCLKROUTE

SCLK port/pin select
address_offset : 0x4A8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EUSART0_SCLKROUTE EUSART0_SCLKROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SCLK port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SCLK pin select register
bits : 16 - 19 (4 bit)
access : read-write


EUSART0_TXROUTE

TX port/pin select
address_offset : 0x4AC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EUSART0_TXROUTE EUSART0_TXROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : TX port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : TX pin select register
bits : 16 - 19 (4 bit)
access : read-write


EUSART1_ROUTEEN

EUSART1 pin enable
address_offset : 0x4B4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EUSART1_ROUTEEN EUSART1_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CSPEN RTSPEN RXPEN SCLKPEN TXPEN

CSPEN : CS pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

RTSPEN : RTS pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

RXPEN : RX pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

SCLKPEN : SCLK pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write

TXPEN : TX pin enable control bit
bits : 4 - 4 (1 bit)
access : read-write


EUSART1_CSROUTE

CS port/pin select
address_offset : 0x4B8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EUSART1_CSROUTE EUSART1_CSROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CS port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CS pin select register
bits : 16 - 19 (4 bit)
access : read-write


EUSART1_CTSROUTE

CTS port/pin select
address_offset : 0x4BC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EUSART1_CTSROUTE EUSART1_CTSROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CTS port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CTS pin select register
bits : 16 - 19 (4 bit)
access : read-write


EUSART1_RTSROUTE

RTS port/pin select
address_offset : 0x4C0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EUSART1_RTSROUTE EUSART1_RTSROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : RTS port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : RTS pin select register
bits : 16 - 19 (4 bit)
access : read-write


EUSART1_RXROUTE

RX port/pin select
address_offset : 0x4C4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EUSART1_RXROUTE EUSART1_RXROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : RX port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : RX pin select register
bits : 16 - 19 (4 bit)
access : read-write


EUSART1_SCLKROUTE

SCLK port/pin select
address_offset : 0x4C8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EUSART1_SCLKROUTE EUSART1_SCLKROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SCLK port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SCLK pin select register
bits : 16 - 19 (4 bit)
access : read-write


EUSART1_TXROUTE

TX port/pin select
address_offset : 0x4CC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EUSART1_TXROUTE EUSART1_TXROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : TX port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : TX pin select register
bits : 16 - 19 (4 bit)
access : read-write


FRC_ROUTEEN

FRC pin enable
address_offset : 0x4D4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRC_ROUTEEN FRC_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCLKPEN DFRAMEPEN DOUTPEN

DCLKPEN : DCLK pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

DFRAMEPEN : DFRAME pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

DOUTPEN : DOUT pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write


FRC_DCLKROUTE

DCLK port/pin select
address_offset : 0x4D8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRC_DCLKROUTE FRC_DCLKROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DCLK port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DCLK pin select register
bits : 16 - 19 (4 bit)
access : read-write


FRC_DFRAMEROUTE

DFRAME port/pin select
address_offset : 0x4DC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRC_DFRAMEROUTE FRC_DFRAMEROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DFRAME port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DFRAME pin select register
bits : 16 - 19 (4 bit)
access : read-write


FRC_DOUTROUTE

DOUT port/pin select
address_offset : 0x4E0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRC_DOUTROUTE FRC_DOUTROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DOUT port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DOUT pin select register
bits : 16 - 19 (4 bit)
access : read-write


I2C0_ROUTEEN

I2C0 pin enable
address_offset : 0x4E8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C0_ROUTEEN I2C0_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCLPEN SDAPEN

SCLPEN : SCL pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

SDAPEN : SDA pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write


I2C0_SCLROUTE

SCL port/pin select
address_offset : 0x4EC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C0_SCLROUTE I2C0_SCLROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SCL port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SCL pin select register
bits : 16 - 19 (4 bit)
access : read-write


I2C0_SDAROUTE

SDA port/pin select
address_offset : 0x4F0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C0_SDAROUTE I2C0_SDAROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SDA port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SDA pin select register
bits : 16 - 19 (4 bit)
access : read-write


I2C1_ROUTEEN

I2C1 pin enable
address_offset : 0x4F8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C1_ROUTEEN I2C1_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCLPEN SDAPEN

SCLPEN : SCL pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

SDAPEN : SDA pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write


I2C1_SCLROUTE

SCL port/pin select
address_offset : 0x4FC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C1_SCLROUTE I2C1_SCLROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SCL port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SCL pin select register
bits : 16 - 19 (4 bit)
access : read-write


I2C1_SDAROUTE

SDA port/pin select
address_offset : 0x500 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C1_SDAROUTE I2C1_SDAROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SDA port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SDA pin select register
bits : 16 - 19 (4 bit)
access : read-write


KEYSCAN_ROUTEEN

KEYPAD pin enable
address_offset : 0x508 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEYSCAN_ROUTEEN KEYSCAN_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COLOUT0PEN COLOUT1PEN COLOUT2PEN COLOUT3PEN COLOUT4PEN COLOUT5PEN COLOUT6PEN COLOUT7PEN

COLOUT0PEN : COLOUT0 pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

COLOUT1PEN : COLOUT1 pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

COLOUT2PEN : COLOUT2 pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

COLOUT3PEN : COLOUT3 pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write

COLOUT4PEN : COLOUT4 pin enable control bit
bits : 4 - 4 (1 bit)
access : read-write

COLOUT5PEN : COLOUT5 pin enable control bit
bits : 5 - 5 (1 bit)
access : read-write

COLOUT6PEN : COLOUT6 pin enable control bit
bits : 6 - 6 (1 bit)
access : read-write

COLOUT7PEN : COLOUT7 pin enable control bit
bits : 7 - 7 (1 bit)
access : read-write


KEYSCAN_COLOUT0ROUTE

COLOUT0 port/pin select
address_offset : 0x50C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEYSCAN_COLOUT0ROUTE KEYSCAN_COLOUT0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : COLOUT0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : COLOUT0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


KEYSCAN_COLOUT1ROUTE

COLOUT1 port/pin select
address_offset : 0x510 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEYSCAN_COLOUT1ROUTE KEYSCAN_COLOUT1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : COLOUT1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : COLOUT1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


KEYSCAN_COLOUT2ROUTE

COLOUT2 port/pin select
address_offset : 0x514 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEYSCAN_COLOUT2ROUTE KEYSCAN_COLOUT2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : COLOUT2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : COLOUT2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


KEYSCAN_COLOUT3ROUTE

COLOUT3 port/pin select
address_offset : 0x518 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEYSCAN_COLOUT3ROUTE KEYSCAN_COLOUT3ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : COLOUT3 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : COLOUT3 pin select register
bits : 16 - 19 (4 bit)
access : read-write


KEYSCAN_COLOUT4ROUTE

COLOUT4 port/pin select
address_offset : 0x51C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEYSCAN_COLOUT4ROUTE KEYSCAN_COLOUT4ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : COLOUT4 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : COLOUT4 pin select register
bits : 16 - 19 (4 bit)
access : read-write


KEYSCAN_COLOUT5ROUTE

COLOUT5 port/pin select
address_offset : 0x520 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEYSCAN_COLOUT5ROUTE KEYSCAN_COLOUT5ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : COLOUT5 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : COLOUT5 pin select register
bits : 16 - 19 (4 bit)
access : read-write


KEYSCAN_COLOUT6ROUTE

COLOUT6 port/pin select
address_offset : 0x524 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEYSCAN_COLOUT6ROUTE KEYSCAN_COLOUT6ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : COLOUT6 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : COLOUT6 pin select register
bits : 16 - 19 (4 bit)
access : read-write


KEYSCAN_COLOUT7ROUTE

COLOUT7 port/pin select
address_offset : 0x528 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEYSCAN_COLOUT7ROUTE KEYSCAN_COLOUT7ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : COLOUT7 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : COLOUT7 pin select register
bits : 16 - 19 (4 bit)
access : read-write


KEYSCAN_ROWSENSE0ROUTE

ROWSENSE0 port/pin select
address_offset : 0x52C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEYSCAN_ROWSENSE0ROUTE KEYSCAN_ROWSENSE0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ROWSENSE0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ROWSENSE0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


KEYSCAN_ROWSENSE1ROUTE

ROWSENSE1 port/pin select
address_offset : 0x530 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEYSCAN_ROWSENSE1ROUTE KEYSCAN_ROWSENSE1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ROWSENSE1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ROWSENSE1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


KEYSCAN_ROWSENSE2ROUTE

ROWSENSE2 port/pin select
address_offset : 0x534 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEYSCAN_ROWSENSE2ROUTE KEYSCAN_ROWSENSE2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ROWSENSE2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ROWSENSE2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


KEYSCAN_ROWSENSE3ROUTE

ROWSENSE3 port/pin select
address_offset : 0x538 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEYSCAN_ROWSENSE3ROUTE KEYSCAN_ROWSENSE3ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ROWSENSE3 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ROWSENSE3 pin select register
bits : 16 - 19 (4 bit)
access : read-write


KEYSCAN_ROWSENSE4ROUTE

ROWSENSE4 port/pin select
address_offset : 0x53C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEYSCAN_ROWSENSE4ROUTE KEYSCAN_ROWSENSE4ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ROWSENSE4 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ROWSENSE4 pin select register
bits : 16 - 19 (4 bit)
access : read-write


KEYSCAN_ROWSENSE5ROUTE

ROWSENSE5 port/pin select
address_offset : 0x540 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEYSCAN_ROWSENSE5ROUTE KEYSCAN_ROWSENSE5ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ROWSENSE5 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ROWSENSE5 pin select register
bits : 16 - 19 (4 bit)
access : read-write


LETIMER_ROUTEEN

LETIMER pin enable
address_offset : 0x548 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LETIMER_ROUTEEN LETIMER_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUT0PEN OUT1PEN

OUT0PEN : OUT0 pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

OUT1PEN : OUT1 pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write


LETIMER_OUT0ROUTE

OUT0 port/pin select
address_offset : 0x54C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LETIMER_OUT0ROUTE LETIMER_OUT0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : OUT0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : OUT0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


LETIMER_OUT1ROUTE

OUT1 port/pin select
address_offset : 0x550 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LETIMER_OUT1ROUTE LETIMER_OUT1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : OUT1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : OUT1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_ROUTEEN

MODEM pin enable
address_offset : 0x558 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_ROUTEEN MODEM_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ANT0PEN ANT1PEN ANTROLLOVERPEN ANTRR0PEN ANTRR1PEN ANTRR2PEN ANTRR3PEN ANTRR4PEN ANTRR5PEN ANTSWENPEN ANTSWUSPEN ANTTRIGPEN ANTTRIGSTOPPEN DCLKPEN DOUTPEN

ANT0PEN : ANT0 pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

ANT1PEN : ANT1 pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

ANTROLLOVERPEN : ANTROLLOVER pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

ANTRR0PEN : ANTRR0 pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write

ANTRR1PEN : ANTRR1 pin enable control bit
bits : 4 - 4 (1 bit)
access : read-write

ANTRR2PEN : ANTRR2 pin enable control bit
bits : 5 - 5 (1 bit)
access : read-write

ANTRR3PEN : ANTRR3 pin enable control bit
bits : 6 - 6 (1 bit)
access : read-write

ANTRR4PEN : ANTRR4 pin enable control bit
bits : 7 - 7 (1 bit)
access : read-write

ANTRR5PEN : ANTRR5 pin enable control bit
bits : 8 - 8 (1 bit)
access : read-write

ANTSWENPEN : ANTSWEN pin enable control bit
bits : 9 - 9 (1 bit)
access : read-write

ANTSWUSPEN : ANTSWUS pin enable control bit
bits : 10 - 10 (1 bit)
access : read-write

ANTTRIGPEN : ANTTRIG pin enable control bit
bits : 11 - 11 (1 bit)
access : read-write

ANTTRIGSTOPPEN : ANTTRIGSTOP pin enable control bit
bits : 12 - 12 (1 bit)
access : read-write

DCLKPEN : DCLK pin enable control bit
bits : 13 - 13 (1 bit)
access : read-write

DOUTPEN : DOUT pin enable control bit
bits : 14 - 14 (1 bit)
access : read-write


MODEM_ANT0ROUTE

ANT0 port/pin select
address_offset : 0x55C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_ANT0ROUTE MODEM_ANT0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ANT0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ANT0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_ANT1ROUTE

ANT1 port/pin select
address_offset : 0x560 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_ANT1ROUTE MODEM_ANT1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ANT1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ANT1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_ANTROLLOVERROUTE

ANTROLLOVER port/pin select
address_offset : 0x564 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_ANTROLLOVERROUTE MODEM_ANTROLLOVERROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ANTROLLOVER port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ANTROLLOVER pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_ANTRR0ROUTE

ANTRR0 port/pin select
address_offset : 0x568 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_ANTRR0ROUTE MODEM_ANTRR0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ANTRR0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ANTRR0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_ANTRR1ROUTE

ANTRR1 port/pin select
address_offset : 0x56C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_ANTRR1ROUTE MODEM_ANTRR1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ANTRR1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ANTRR1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_ANTRR2ROUTE

ANTRR2 port/pin select
address_offset : 0x570 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_ANTRR2ROUTE MODEM_ANTRR2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ANTRR2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ANTRR2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_ANTRR3ROUTE

ANTRR3 port/pin select
address_offset : 0x574 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_ANTRR3ROUTE MODEM_ANTRR3ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ANTRR3 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ANTRR3 pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_ANTRR4ROUTE

ANTRR4 port/pin select
address_offset : 0x578 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_ANTRR4ROUTE MODEM_ANTRR4ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ANTRR4 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ANTRR4 pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_ANTRR5ROUTE

ANTRR5 port/pin select
address_offset : 0x57C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_ANTRR5ROUTE MODEM_ANTRR5ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ANTRR5 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ANTRR5 pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_ANTSWENROUTE

ANTSWEN port/pin select
address_offset : 0x580 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_ANTSWENROUTE MODEM_ANTSWENROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ANTSWEN port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ANTSWEN pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_ANTSWUSROUTE

ANTSWUS port/pin select
address_offset : 0x584 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_ANTSWUSROUTE MODEM_ANTSWUSROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ANTSWUS port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ANTSWUS pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_ANTTRIGROUTE

ANTTRIG port/pin select
address_offset : 0x588 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_ANTTRIGROUTE MODEM_ANTTRIGROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ANTTRIG port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ANTTRIG pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_ANTTRIGSTOPROUTE

ANTTRIGSTOP port/pin select
address_offset : 0x58C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_ANTTRIGSTOPROUTE MODEM_ANTTRIGSTOPROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ANTTRIGSTOP port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ANTTRIGSTOP pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_DCLKROUTE

DCLK port/pin select
address_offset : 0x590 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_DCLKROUTE MODEM_DCLKROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DCLK port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DCLK pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_DINROUTE

DIN port/pin select
address_offset : 0x594 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_DINROUTE MODEM_DINROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DIN port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DIN pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_DOUTROUTE

DOUT port/pin select
address_offset : 0x598 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_DOUTROUTE MODEM_DOUTROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DOUT port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DOUT pin select register
bits : 16 - 19 (4 bit)
access : read-write


PCNT0_S0INROUTE

S0IN port/pin select
address_offset : 0x5A4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCNT0_S0INROUTE PCNT0_S0INROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : S0IN port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : S0IN pin select register
bits : 16 - 19 (4 bit)
access : read-write


PCNT0_S1INROUTE

S1IN port/pin select
address_offset : 0x5A8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCNT0_S1INROUTE PCNT0_S1INROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : S1IN port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : S1IN pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ROUTEEN

PRS0 pin enable
address_offset : 0x5B0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ROUTEEN PRS0_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ASYNCH0PEN ASYNCH1PEN ASYNCH2PEN ASYNCH3PEN ASYNCH4PEN ASYNCH5PEN ASYNCH6PEN ASYNCH7PEN ASYNCH8PEN ASYNCH9PEN ASYNCH10PEN ASYNCH11PEN ASYNCH12PEN ASYNCH13PEN ASYNCH14PEN ASYNCH15PEN SYNCH0PEN SYNCH1PEN SYNCH2PEN SYNCH3PEN

ASYNCH0PEN : ASYNCH0 pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

ASYNCH1PEN : ASYNCH1 pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

ASYNCH2PEN : ASYNCH2 pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

ASYNCH3PEN : ASYNCH3 pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write

ASYNCH4PEN : ASYNCH4 pin enable control bit
bits : 4 - 4 (1 bit)
access : read-write

ASYNCH5PEN : ASYNCH5 pin enable control bit
bits : 5 - 5 (1 bit)
access : read-write

ASYNCH6PEN : ASYNCH6 pin enable control bit
bits : 6 - 6 (1 bit)
access : read-write

ASYNCH7PEN : ASYNCH7 pin enable control bit
bits : 7 - 7 (1 bit)
access : read-write

ASYNCH8PEN : ASYNCH8 pin enable control bit
bits : 8 - 8 (1 bit)
access : read-write

ASYNCH9PEN : ASYNCH9 pin enable control bit
bits : 9 - 9 (1 bit)
access : read-write

ASYNCH10PEN : ASYNCH10 pin enable control bit
bits : 10 - 10 (1 bit)
access : read-write

ASYNCH11PEN : ASYNCH11 pin enable control bit
bits : 11 - 11 (1 bit)
access : read-write

ASYNCH12PEN : ASYNCH12 pin enable control bit
bits : 12 - 12 (1 bit)
access : read-write

ASYNCH13PEN : ASYNCH13 pin enable control bit
bits : 13 - 13 (1 bit)
access : read-write

ASYNCH14PEN : ASYNCH14 pin enable control bit
bits : 14 - 14 (1 bit)
access : read-write

ASYNCH15PEN : ASYNCH15 pin enable control bit
bits : 15 - 15 (1 bit)
access : read-write

SYNCH0PEN : SYNCH0 pin enable control bit
bits : 16 - 16 (1 bit)
access : read-write

SYNCH1PEN : SYNCH1 pin enable control bit
bits : 17 - 17 (1 bit)
access : read-write

SYNCH2PEN : SYNCH2 pin enable control bit
bits : 18 - 18 (1 bit)
access : read-write

SYNCH3PEN : SYNCH3 pin enable control bit
bits : 19 - 19 (1 bit)
access : read-write


PRS0_ASYNCH0ROUTE

ASYNCH0 port/pin select
address_offset : 0x5B4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH0ROUTE PRS0_ASYNCH0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH1ROUTE

ASYNCH1 port/pin select
address_offset : 0x5B8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH1ROUTE PRS0_ASYNCH1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH2ROUTE

ASYNCH2 port/pin select
address_offset : 0x5BC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH2ROUTE PRS0_ASYNCH2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH3ROUTE

ASYNCH3 port/pin select
address_offset : 0x5C0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH3ROUTE PRS0_ASYNCH3ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH3 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH3 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH4ROUTE

ASYNCH4 port/pin select
address_offset : 0x5C4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH4ROUTE PRS0_ASYNCH4ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH4 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH4 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH5ROUTE

ASYNCH5 port/pin select
address_offset : 0x5C8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH5ROUTE PRS0_ASYNCH5ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH5 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH5 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH6ROUTE

ASYNCH6 port/pin select
address_offset : 0x5CC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH6ROUTE PRS0_ASYNCH6ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH6 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH6 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH7ROUTE

ASYNCH7 port/pin select
address_offset : 0x5D0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH7ROUTE PRS0_ASYNCH7ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH7 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH7 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH8ROUTE

ASYNCH8 port/pin select
address_offset : 0x5D4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH8ROUTE PRS0_ASYNCH8ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH8 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH8 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH9ROUTE

ASYNCH9 port/pin select
address_offset : 0x5D8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH9ROUTE PRS0_ASYNCH9ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH9 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH9 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH10ROUTE

ASYNCH10 port/pin select
address_offset : 0x5DC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH10ROUTE PRS0_ASYNCH10ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH10 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH10 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH11ROUTE

ASYNCH11 port/pin select
address_offset : 0x5E0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH11ROUTE PRS0_ASYNCH11ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH11 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH11 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH12ROUTE

ASYNCH12 port/pin select
address_offset : 0x5E4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH12ROUTE PRS0_ASYNCH12ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH12 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH12 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH13ROUTE

ASYNCH13 port/pin select
address_offset : 0x5E8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH13ROUTE PRS0_ASYNCH13ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH13 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH13 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH14ROUTE

ASYNCH14 port/pin select
address_offset : 0x5EC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH14ROUTE PRS0_ASYNCH14ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH14 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH14 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH15ROUTE

ASYNCH15 port/pin select
address_offset : 0x5F0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH15ROUTE PRS0_ASYNCH15ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH15 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH15 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_SYNCH0ROUTE

SYNCH0 port/pin select
address_offset : 0x5F4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_SYNCH0ROUTE PRS0_SYNCH0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SYNCH0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SYNCH0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_SYNCH1ROUTE

SYNCH1 port/pin select
address_offset : 0x5F8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_SYNCH1ROUTE PRS0_SYNCH1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SYNCH1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SYNCH1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_SYNCH2ROUTE

SYNCH2 port/pin select
address_offset : 0x5FC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_SYNCH2ROUTE PRS0_SYNCH2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SYNCH2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SYNCH2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PORTB_CTRL

Port control
address_offset : 0x60 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTB_CTRL PORTB_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLEWRATE DINDIS SLEWRATEALT DINDISALT

SLEWRATE : Slew Rate
bits : 4 - 6 (3 bit)
access : read-write

DINDIS : Data In Disable
bits : 12 - 12 (1 bit)
access : read-write

SLEWRATEALT : Slew Rate Alt
bits : 20 - 22 (3 bit)
access : read-write

DINDISALT : Data In Disable Alt
bits : 28 - 28 (1 bit)
access : read-write


PRS0_SYNCH3ROUTE

SYNCH3 port/pin select
address_offset : 0x600 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_SYNCH3ROUTE PRS0_SYNCH3ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SYNCH3 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SYNCH3 pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRAC_ROUTEEN

RAC pin enable
address_offset : 0x608 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRAC_ROUTEEN DBUSRAC_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LNAENPEN PAENPEN

LNAENPEN : LNAEN pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

PAENPEN : PAEN pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write


DBUSRAC_LNAENROUTE

LNAEN port/pin select
address_offset : 0x60C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRAC_LNAENROUTE DBUSRAC_LNAENROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : LNAEN port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : LNAEN pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRAC_PAENROUTE

PAEN port/pin select
address_offset : 0x610 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRAC_PAENROUTE DBUSRAC_PAENROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : PAEN port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : PAEN pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRFECA0_ROUTEEN

RFECA0 pin enable
address_offset : 0x618 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_ROUTEEN DBUSRFECA0_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATAOUT0PEN DATAOUT1PEN DATAOUT2PEN DATAOUT3PEN DATAOUT4PEN DATAOUT5PEN DATAOUT6PEN DATAOUT7PEN DATAOUT8PEN DATAOUT9PEN DATAOUT10PEN DATAOUT11PEN DATAOUT12PEN DATAOUT13PEN DATAOUT14PEN DATAOUT15PEN DATAOUT16PEN DATAOUT17PEN DATAOUT18PEN DATAVALIDPEN

DATAOUT0PEN : DATAOUT0 pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

DATAOUT1PEN : DATAOUT1 pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

DATAOUT2PEN : DATAOUT2 pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

DATAOUT3PEN : DATAOUT3 pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write

DATAOUT4PEN : DATAOUT4 pin enable control bit
bits : 4 - 4 (1 bit)
access : read-write

DATAOUT5PEN : DATAOUT5 pin enable control bit
bits : 5 - 5 (1 bit)
access : read-write

DATAOUT6PEN : DATAOUT6 pin enable control bit
bits : 6 - 6 (1 bit)
access : read-write

DATAOUT7PEN : DATAOUT7 pin enable control bit
bits : 7 - 7 (1 bit)
access : read-write

DATAOUT8PEN : DATAOUT8 pin enable control bit
bits : 8 - 8 (1 bit)
access : read-write

DATAOUT9PEN : DATAOUT9 pin enable control bit
bits : 9 - 9 (1 bit)
access : read-write

DATAOUT10PEN : DATAOUT10 pin enable control bit
bits : 10 - 10 (1 bit)
access : read-write

DATAOUT11PEN : DATAOUT11 pin enable control bit
bits : 11 - 11 (1 bit)
access : read-write

DATAOUT12PEN : DATAOUT12 pin enable control bit
bits : 12 - 12 (1 bit)
access : read-write

DATAOUT13PEN : DATAOUT13 pin enable control bit
bits : 13 - 13 (1 bit)
access : read-write

DATAOUT14PEN : DATAOUT14 pin enable control bit
bits : 14 - 14 (1 bit)
access : read-write

DATAOUT15PEN : DATAOUT15 pin enable control bit
bits : 15 - 15 (1 bit)
access : read-write

DATAOUT16PEN : DATAOUT16 pin enable control bit
bits : 16 - 16 (1 bit)
access : read-write

DATAOUT17PEN : DATAOUT17 pin enable control bit
bits : 17 - 17 (1 bit)
access : read-write

DATAOUT18PEN : DATAOUT18 pin enable control bit
bits : 18 - 18 (1 bit)
access : read-write

DATAVALIDPEN : DATAVALID pin enable control bit
bits : 19 - 19 (1 bit)
access : read-write


DBUSRFECA0_DATAOUT0ROUTE

DATAOUT0 port/pin select
address_offset : 0x61C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_DATAOUT0ROUTE DBUSRFECA0_DATAOUT0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DATAOUT0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DATAOUT0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRFECA0_DATAOUT1ROUTE

DATAOUT1 port/pin select
address_offset : 0x620 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_DATAOUT1ROUTE DBUSRFECA0_DATAOUT1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DATAOUT1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DATAOUT1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRFECA0_DATAOUT2ROUTE

DATAOUT2 port/pin select
address_offset : 0x624 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_DATAOUT2ROUTE DBUSRFECA0_DATAOUT2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DATAOUT2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DATAOUT2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRFECA0_DATAOUT3ROUTE

DATAOUT3 port/pin select
address_offset : 0x628 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_DATAOUT3ROUTE DBUSRFECA0_DATAOUT3ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DATAOUT3 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DATAOUT3 pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRFECA0_DATAOUT4ROUTE

DATAOUT4 port/pin select
address_offset : 0x62C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_DATAOUT4ROUTE DBUSRFECA0_DATAOUT4ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DATAOUT4 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DATAOUT4 pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRFECA0_DATAOUT5ROUTE

DATAOUT5 port/pin select
address_offset : 0x630 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_DATAOUT5ROUTE DBUSRFECA0_DATAOUT5ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DATAOUT5 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DATAOUT5 pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRFECA0_DATAOUT6ROUTE

DATAOUT6 port/pin select
address_offset : 0x634 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_DATAOUT6ROUTE DBUSRFECA0_DATAOUT6ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DATAOUT6 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DATAOUT6 pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRFECA0_DATAOUT7ROUTE

DATAOUT7 port/pin select
address_offset : 0x638 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_DATAOUT7ROUTE DBUSRFECA0_DATAOUT7ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DATAOUT7 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DATAOUT7 pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRFECA0_DATAOUT8ROUTE

DATAOUT8 port/pin select
address_offset : 0x63C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_DATAOUT8ROUTE DBUSRFECA0_DATAOUT8ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DATAOUT8 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DATAOUT8 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PORTB_MODEL

mode low
address_offset : 0x64 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTB_MODEL PORTB_MODEL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MODE0 MODE1 MODE2 MODE3 MODE4 MODE5

MODE0 : MODE n
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE1 : MODE n
bits : 4 - 7 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE2 : MODE n
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE3 : MODE n
bits : 12 - 15 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE4 : MODE n
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE5 : MODE n
bits : 20 - 23 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.


DBUSRFECA0_DATAOUT9ROUTE

DATAOUT9 port/pin select
address_offset : 0x640 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_DATAOUT9ROUTE DBUSRFECA0_DATAOUT9ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DATAOUT9 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DATAOUT9 pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRFECA0_DATAOUT10ROUTE

DATAOUT10 port/pin select
address_offset : 0x644 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_DATAOUT10ROUTE DBUSRFECA0_DATAOUT10ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DATAOUT10 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DATAOUT10 pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRFECA0_DATAOUT11ROUTE

DATAOUT11 port/pin select
address_offset : 0x648 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_DATAOUT11ROUTE DBUSRFECA0_DATAOUT11ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DATAOUT11 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DATAOUT11 pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRFECA0_DATAOUT12ROUTE

DATAOUT12 port/pin select
address_offset : 0x64C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_DATAOUT12ROUTE DBUSRFECA0_DATAOUT12ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DATAOUT12 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DATAOUT12 pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRFECA0_DATAOUT13ROUTE

DATAOUT13 port/pin select
address_offset : 0x650 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_DATAOUT13ROUTE DBUSRFECA0_DATAOUT13ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DATAOUT13 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DATAOUT13 pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRFECA0_DATAOUT14ROUTE

DATAOUT14 port/pin select
address_offset : 0x654 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_DATAOUT14ROUTE DBUSRFECA0_DATAOUT14ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DATAOUT14 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DATAOUT14 pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRFECA0_DATAOUT15ROUTE

DATAOUT15 port/pin select
address_offset : 0x658 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_DATAOUT15ROUTE DBUSRFECA0_DATAOUT15ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DATAOUT15 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DATAOUT15 pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRFECA0_DATAOUT16ROUTE

DATAOUT16 port/pin select
address_offset : 0x65C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_DATAOUT16ROUTE DBUSRFECA0_DATAOUT16ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DATAOUT16 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DATAOUT16 pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRFECA0_DATAOUT17ROUTE

DATAOUT17 port/pin select
address_offset : 0x660 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_DATAOUT17ROUTE DBUSRFECA0_DATAOUT17ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DATAOUT17 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DATAOUT17 pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRFECA0_DATAOUT18ROUTE

DATAOUT18 port/pin select
address_offset : 0x664 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_DATAOUT18ROUTE DBUSRFECA0_DATAOUT18ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DATAOUT18 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DATAOUT18 pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRFECA0_DATAVALIDROUTE

DATAVALID port/pin select
address_offset : 0x668 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_DATAVALIDROUTE DBUSRFECA0_DATAVALIDROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DATAVALID port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DATAVALID pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSRFECA0_TRIGGERINROUTE

TRIGGERIN port/pin select
address_offset : 0x66C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSRFECA0_TRIGGERINROUTE DBUSRFECA0_TRIGGERINROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : TRIGGERIN port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : TRIGGERIN pin select register
bits : 16 - 19 (4 bit)
access : read-write


DBUSSYXO0_BUFOUTREQINASYNCROUTE

BUFOUTREQINASYNC port/pin select
address_offset : 0x678 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBUSSYXO0_BUFOUTREQINASYNCROUTE DBUSSYXO0_BUFOUTREQINASYNCROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : BUFOUTREQINASYNC port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : BUFOUTREQINASYNC pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER0_ROUTEEN

TIMER0 pin enable
address_offset : 0x680 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER0_ROUTEEN TIMER0_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CC0PEN CC1PEN CC2PEN CCC0PEN CCC1PEN CCC2PEN

CC0PEN : CC0 pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

CC1PEN : CC1 pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

CC2PEN : CC2 pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

CCC0PEN : CCC0 pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write

CCC1PEN : CCC1 pin enable control bit
bits : 4 - 4 (1 bit)
access : read-write

CCC2PEN : CCC2 pin enable control bit
bits : 5 - 5 (1 bit)
access : read-write


TIMER0_CC0ROUTE

CC0 port/pin select
address_offset : 0x684 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER0_CC0ROUTE TIMER0_CC0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER0_CC1ROUTE

CC1 port/pin select
address_offset : 0x688 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER0_CC1ROUTE TIMER0_CC1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER0_CC2ROUTE

CC2 port/pin select
address_offset : 0x68C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER0_CC2ROUTE TIMER0_CC2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER0_CCC0ROUTE

CCC0 port/pin select
address_offset : 0x690 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER0_CCC0ROUTE TIMER0_CCC0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER0_CCC1ROUTE

CCC1 port/pin select
address_offset : 0x694 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER0_CCC1ROUTE TIMER0_CCC1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER0_CCC2ROUTE

CCC2 port/pin select
address_offset : 0x698 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER0_CCC2ROUTE TIMER0_CCC2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER1_ROUTEEN

TIMER1 pin enable
address_offset : 0x6A0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER1_ROUTEEN TIMER1_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CC0PEN CC1PEN CC2PEN CCC0PEN CCC1PEN CCC2PEN

CC0PEN : CC0 pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

CC1PEN : CC1 pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

CC2PEN : CC2 pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

CCC0PEN : CCC0 pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write

CCC1PEN : CCC1 pin enable control bit
bits : 4 - 4 (1 bit)
access : read-write

CCC2PEN : CCC2 pin enable control bit
bits : 5 - 5 (1 bit)
access : read-write


TIMER1_CC0ROUTE

CC0 port/pin select
address_offset : 0x6A4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER1_CC0ROUTE TIMER1_CC0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER1_CC1ROUTE

CC1 port/pin select
address_offset : 0x6A8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER1_CC1ROUTE TIMER1_CC1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER1_CC2ROUTE

CC2 port/pin select
address_offset : 0x6AC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER1_CC2ROUTE TIMER1_CC2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER1_CCC0ROUTE

CCC0 port/pin select
address_offset : 0x6B0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER1_CCC0ROUTE TIMER1_CCC0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER1_CCC1ROUTE

CCC1 port/pin select
address_offset : 0x6B4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER1_CCC1ROUTE TIMER1_CCC1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER1_CCC2ROUTE

CCC2 port/pin select
address_offset : 0x6B8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER1_CCC2ROUTE TIMER1_CCC2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER2_ROUTEEN

TIMER2 pin enable
address_offset : 0x6C0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER2_ROUTEEN TIMER2_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CC0PEN CC1PEN CC2PEN CCC0PEN CCC1PEN CCC2PEN

CC0PEN : CC0 pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

CC1PEN : CC1 pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

CC2PEN : CC2 pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

CCC0PEN : CCC0 pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write

CCC1PEN : CCC1 pin enable control bit
bits : 4 - 4 (1 bit)
access : read-write

CCC2PEN : CCC2 pin enable control bit
bits : 5 - 5 (1 bit)
access : read-write


TIMER2_CC0ROUTE

CC0 port/pin select
address_offset : 0x6C4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER2_CC0ROUTE TIMER2_CC0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER2_CC1ROUTE

CC1 port/pin select
address_offset : 0x6C8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER2_CC1ROUTE TIMER2_CC1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER2_CC2ROUTE

CC2 port/pin select
address_offset : 0x6CC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER2_CC2ROUTE TIMER2_CC2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER2_CCC0ROUTE

CCC0 port/pin select
address_offset : 0x6D0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER2_CCC0ROUTE TIMER2_CCC0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER2_CCC1ROUTE

CCC1 port/pin select
address_offset : 0x6D4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER2_CCC1ROUTE TIMER2_CCC1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER2_CCC2ROUTE

CCC2 port/pin select
address_offset : 0x6D8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER2_CCC2ROUTE TIMER2_CCC2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER3_ROUTEEN

TIMER3 pin enable
address_offset : 0x6E0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER3_ROUTEEN TIMER3_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CC0PEN CC1PEN CC2PEN CCC0PEN CCC1PEN CCC2PEN

CC0PEN : CC0 pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

CC1PEN : CC1 pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

CC2PEN : CC2 pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

CCC0PEN : CCC0 pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write

CCC1PEN : CCC1 pin enable control bit
bits : 4 - 4 (1 bit)
access : read-write

CCC2PEN : CCC2 pin enable control bit
bits : 5 - 5 (1 bit)
access : read-write


TIMER3_CC0ROUTE

CC0 port/pin select
address_offset : 0x6E4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER3_CC0ROUTE TIMER3_CC0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER3_CC1ROUTE

CC1 port/pin select
address_offset : 0x6E8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER3_CC1ROUTE TIMER3_CC1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER3_CC2ROUTE

CC2 port/pin select
address_offset : 0x6EC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER3_CC2ROUTE TIMER3_CC2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER3_CCC0ROUTE

CCC0 port/pin select
address_offset : 0x6F0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER3_CCC0ROUTE TIMER3_CCC0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER3_CCC1ROUTE

CCC1 port/pin select
address_offset : 0x6F4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER3_CCC1ROUTE TIMER3_CCC1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER3_CCC2ROUTE

CCC2 port/pin select
address_offset : 0x6F8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER3_CCC2ROUTE TIMER3_CCC2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PORTB_DOUT

data out
address_offset : 0x70 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTB_DOUT PORTB_DOUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DOUT

DOUT : Data output
bits : 0 - 5 (6 bit)
access : read-write


TIMER4_ROUTEEN

TIMER4 pin enable
address_offset : 0x700 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER4_ROUTEEN TIMER4_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CC0PEN CC1PEN CC2PEN CCC0PEN CCC1PEN CCC2PEN

CC0PEN : CC0 pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

CC1PEN : CC1 pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

CC2PEN : CC2 pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

CCC0PEN : CCC0 pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write

CCC1PEN : CCC1 pin enable control bit
bits : 4 - 4 (1 bit)
access : read-write

CCC2PEN : CCC2 pin enable control bit
bits : 5 - 5 (1 bit)
access : read-write


TIMER4_CC0ROUTE

CC0 port/pin select
address_offset : 0x704 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER4_CC0ROUTE TIMER4_CC0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER4_CC1ROUTE

CC1 port/pin select
address_offset : 0x708 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER4_CC1ROUTE TIMER4_CC1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER4_CC2ROUTE

CC2 port/pin select
address_offset : 0x70C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER4_CC2ROUTE TIMER4_CC2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER4_CCC0ROUTE

CCC0 port/pin select
address_offset : 0x710 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER4_CCC0ROUTE TIMER4_CCC0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER4_CCC1ROUTE

CCC1 port/pin select
address_offset : 0x714 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER4_CCC1ROUTE TIMER4_CCC1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER4_CCC2ROUTE

CCC2 port/pin select
address_offset : 0x718 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER4_CCC2ROUTE TIMER4_CCC2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART0_ROUTEEN

USART0 pin enable
address_offset : 0x720 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART0_ROUTEEN USART0_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CSPEN RTSPEN RXPEN CLKPEN TXPEN

CSPEN : CS pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

RTSPEN : RTS pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

RXPEN : RX pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

CLKPEN : SCLK pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write

TXPEN : TX pin enable control bit
bits : 4 - 4 (1 bit)
access : read-write


USART0_CSROUTE

CS port/pin select
address_offset : 0x724 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART0_CSROUTE USART0_CSROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CS port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CS pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART0_CTSROUTE

CTS port/pin select
address_offset : 0x728 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART0_CTSROUTE USART0_CTSROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CTS port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CTS pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART0_RTSROUTE

RTS port/pin select
address_offset : 0x72C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART0_RTSROUTE USART0_RTSROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : RTS port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : RTS pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART0_RXROUTE

RX port/pin select
address_offset : 0x730 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART0_RXROUTE USART0_RXROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : RX port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : RX pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART0_CLKROUTE

SCLK port/pin select
address_offset : 0x734 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART0_CLKROUTE USART0_CLKROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SCLK port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SCLK pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART0_TXROUTE

TX port/pin select
address_offset : 0x738 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART0_TXROUTE USART0_TXROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : TX port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : TX pin select register
bits : 16 - 19 (4 bit)
access : read-write


PORTB_DIN

data in
address_offset : 0x74 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PORTB_DIN PORTB_DIN read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DIN

DIN : Data input
bits : 0 - 5 (6 bit)
access : read-only


RPURATD0

Protected register address = (RPURATD register index X 32 + RPURATD bit index) X 4.
address_offset : 0x740 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RPURATD0 RPURATD0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RATDPORTACTRL RATDPORTAMODEL RATDPORTAMODEH RATDPORTADOUT RATDPORTBCTRL RATDPORTBMODEL RATDPORTBMODEH RATDPORTBDOUT

RATDPORTACTRL : CTRL Protection Bit
bits : 12 - 12 (1 bit)
access : read-write

RATDPORTAMODEL : MODEL Protection Bit
bits : 13 - 13 (1 bit)
access : read-write

RATDPORTAMODEH : MODEH Protection Bit
bits : 15 - 15 (1 bit)
access : read-write

RATDPORTADOUT : DOUT Protection Bit
bits : 16 - 16 (1 bit)
access : read-write

RATDPORTBCTRL : CTRL Protection Bit
bits : 24 - 24 (1 bit)
access : read-write

RATDPORTBMODEL : MODEL Protection Bit
bits : 25 - 25 (1 bit)
access : read-write

RATDPORTBMODEH : MODEH Protection Bit
bits : 27 - 27 (1 bit)
access : read-write

RATDPORTBDOUT : DOUT Protection Bit
bits : 28 - 28 (1 bit)
access : read-write


RPURATD1

Protected register address = (RPURATD register index X 32 + RPURATD bit index) X 4.
address_offset : 0x744 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RPURATD1 RPURATD1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RATDPORTCCTRL RATDPORTCMODEL RATDPORTCMODEH RATDPORTCDOUT RATDPORTDCTRL RATDPORTDMODEL RATDPORTDMODEH RATDPORTDDOUT

RATDPORTCCTRL : CTRL Protection Bit
bits : 4 - 4 (1 bit)
access : read-write

RATDPORTCMODEL : MODEL Protection Bit
bits : 5 - 5 (1 bit)
access : read-write

RATDPORTCMODEH : MODEH Protection Bit
bits : 7 - 7 (1 bit)
access : read-write

RATDPORTCDOUT : DOUT Protection Bit
bits : 8 - 8 (1 bit)
access : read-write

RATDPORTDCTRL : CTRL Protection Bit
bits : 16 - 16 (1 bit)
access : read-write

RATDPORTDMODEL : MODEL Protection Bit
bits : 17 - 17 (1 bit)
access : read-write

RATDPORTDMODEH : MODEH Protection Bit
bits : 19 - 19 (1 bit)
access : read-write

RATDPORTDDOUT : DOUT Protection Bit
bits : 20 - 20 (1 bit)
access : read-write


RPURATD6

Protected register address = (RPURATD register index X 32 + RPURATD bit index) X 4.
address_offset : 0x758 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RPURATD6 RPURATD6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RATDLOCK RATDABUSALLOC RATDBBUSALLOC RATDCDBUSALLOC RATDAODD0SWITCH RATDAODD1SWITCH RATDAEVEN0SWITCH RATDAEVEN1SWITCH RATDBODD0SWITCH RATDBODD1SWITCH RATDBEVEN0SWITCH RATDBEVEN1SWITCH RATDCDODD0SWITCH RATDCDODD1SWITCH RATDCDEVEN0SWITCH RATDCDEVEN1SWITCH

RATDLOCK : LOCK Protection Bit
bits : 0 - 0 (1 bit)
access : read-write

RATDABUSALLOC : ABUSALLOC Protection Bit
bits : 8 - 8 (1 bit)
access : read-write

RATDBBUSALLOC : BBUSALLOC Protection Bit
bits : 9 - 9 (1 bit)
access : read-write

RATDCDBUSALLOC : CDBUSALLOC Protection Bit
bits : 10 - 10 (1 bit)
access : read-write

RATDAODD0SWITCH : AODD0SWITCH Protection Bit
bits : 12 - 12 (1 bit)
access : read-write

RATDAODD1SWITCH : AODD1SWITCH Protection Bit
bits : 13 - 13 (1 bit)
access : read-write

RATDAEVEN0SWITCH : AEVEN0SWITCH Protection Bit
bits : 14 - 14 (1 bit)
access : read-write

RATDAEVEN1SWITCH : AEVEN1SWITCH Protection Bit
bits : 15 - 15 (1 bit)
access : read-write

RATDBODD0SWITCH : BODD0SWITCH Protection Bit
bits : 16 - 16 (1 bit)
access : read-write

RATDBODD1SWITCH : BODD1SWITCH Protection Bit
bits : 17 - 17 (1 bit)
access : read-write

RATDBEVEN0SWITCH : BEVEN0SWITCH Protection Bit
bits : 18 - 18 (1 bit)
access : read-write

RATDBEVEN1SWITCH : BEVEN1SWITCH Protection Bit
bits : 19 - 19 (1 bit)
access : read-write

RATDCDODD0SWITCH : CDODD0SWITCH Protection Bit
bits : 20 - 20 (1 bit)
access : read-write

RATDCDODD1SWITCH : CDODD1SWITCH Protection Bit
bits : 21 - 21 (1 bit)
access : read-write

RATDCDEVEN0SWITCH : CDEVEN0SWITCH Protection Bit
bits : 22 - 22 (1 bit)
access : read-write

RATDCDEVEN1SWITCH : CDEVEN1SWITCH Protection Bit
bits : 23 - 23 (1 bit)
access : read-write


RPURATD8

Protected register address = (RPURATD register index X 32 + RPURATD bit index) X 4.
address_offset : 0x760 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RPURATD8 RPURATD8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RATDEXTIPSELL RATDEXTIPSELH RATDEXTIPINSELL RATDEXTIPINSELH RATDEXTIRISE RATDEXTIFALL RATDIF RATDIEN RATDEM4WUEN RATDEM4WUPOL RATDDBGROUTEPEN RATDTRACEROUTEPEN RATDDBUSACMP0ROUTEEN RATDDBUSACMP0ACMPOUTROUTE RATDDBUSACMP1ROUTEEN RATDDBUSACMP1ACMPOUTROUTE RATDDBUSCMUROUTEEN RATDDBUSCMUCLKIN0ROUTE RATDDBUSCMUCLKOUT0ROUTE RATDDBUSCMUCLKOUT1ROUTE RATDDBUSCMUCLKOUT2ROUTE RATDDBUSCMUCLKOUTHIDDENROUTE

RATDEXTIPSELL : EXTIPSELL Protection Bit
bits : 0 - 0 (1 bit)
access : read-write

RATDEXTIPSELH : EXTIPSELH Protection Bit
bits : 1 - 1 (1 bit)
access : read-write

RATDEXTIPINSELL : EXTIPINSELL Protection Bit
bits : 2 - 2 (1 bit)
access : read-write

RATDEXTIPINSELH : EXTIPINSELH Protection Bit
bits : 3 - 3 (1 bit)
access : read-write

RATDEXTIRISE : EXTIRISE Protection Bit
bits : 4 - 4 (1 bit)
access : read-write

RATDEXTIFALL : EXTIFALL Protection Bit
bits : 5 - 5 (1 bit)
access : read-write

RATDIF : IF Protection Bit
bits : 8 - 8 (1 bit)
access : read-write

RATDIEN : IEN Protection Bit
bits : 9 - 9 (1 bit)
access : read-write

RATDEM4WUEN : EM4WUEN Protection Bit
bits : 11 - 11 (1 bit)
access : read-write

RATDEM4WUPOL : EM4WUPOL Protection Bit
bits : 12 - 12 (1 bit)
access : read-write

RATDDBGROUTEPEN : DBGROUTEPEN Protection Bit
bits : 16 - 16 (1 bit)
access : read-write

RATDTRACEROUTEPEN : TRACEROUTEPEN Protection Bit
bits : 17 - 17 (1 bit)
access : read-write

RATDDBUSACMP0ROUTEEN : ROUTEEN Protection Bit
bits : 20 - 20 (1 bit)
access : read-write

RATDDBUSACMP0ACMPOUTROUTE : ACMPOUTROUTE Protection Bit
bits : 21 - 21 (1 bit)
access : read-write

RATDDBUSACMP1ROUTEEN : ROUTEEN Protection Bit
bits : 23 - 23 (1 bit)
access : read-write

RATDDBUSACMP1ACMPOUTROUTE : ACMPOUTROUTE Protection Bit
bits : 24 - 24 (1 bit)
access : read-write

RATDDBUSCMUROUTEEN : ROUTEEN Protection Bit
bits : 26 - 26 (1 bit)
access : read-write

RATDDBUSCMUCLKIN0ROUTE : CLKIN0ROUTE Protection Bit
bits : 27 - 27 (1 bit)
access : read-write

RATDDBUSCMUCLKOUT0ROUTE : CLKOUT0ROUTE Protection Bit
bits : 28 - 28 (1 bit)
access : read-write

RATDDBUSCMUCLKOUT1ROUTE : CLKOUT1ROUTE Protection Bit
bits : 29 - 29 (1 bit)
access : read-write

RATDDBUSCMUCLKOUT2ROUTE : CLKOUT2ROUTE Protection Bit
bits : 30 - 30 (1 bit)
access : read-write

RATDDBUSCMUCLKOUTHIDDENROUTE : CLKOUTHIDDENROUTE Protection Bit
bits : 31 - 31 (1 bit)
access : read-write


RPURATD9

Protected register address = (RPURATD register index X 32 + RPURATD bit index) X 4.
address_offset : 0x764 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RPURATD9 RPURATD9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RATDDBUSDCDCROUTEEN RATDDBUSDCDCDCDCCOREHIDDENROUTE RATDDBUSDCDCDCDCVCMPHIDDENROUTE RATDDBUSEUSART0ROUTEEN RATDDBUSEUSART0CSROUTE RATDDBUSEUSART0CTSROUTE RATDDBUSEUSART0RTSROUTE RATDDBUSEUSART0RXROUTE RATDDBUSEUSART0SCLKROUTE RATDDBUSEUSART0TXROUTE RATDDBUSEUSART1ROUTEEN RATDDBUSEUSART1CSROUTE RATDDBUSEUSART1CTSROUTE RATDDBUSEUSART1RTSROUTE RATDDBUSEUSART1RXROUTE RATDDBUSEUSART1SCLKROUTE RATDDBUSEUSART1TXROUTE RATDDBUSFRCROUTEEN RATDDBUSFRCDCLKROUTE RATDDBUSFRCDFRAMEROUTE RATDDBUSFRCDOUTROUTE RATDDBUSI2C0ROUTEEN RATDDBUSI2C0SCLROUTE RATDDBUSI2C0SDAROUTE RATDDBUSI2C1ROUTEEN RATDDBUSI2C1SCLROUTE

RATDDBUSDCDCROUTEEN : ROUTEEN Protection Bit
bits : 1 - 1 (1 bit)
access : read-write

RATDDBUSDCDCDCDCCOREHIDDENROUTE : DCDCCOREHIDDENROUTE Protection Bit
bits : 2 - 2 (1 bit)
access : read-write

RATDDBUSDCDCDCDCVCMPHIDDENROUTE : DCDCVCMPHIDDENROUTE Protection Bit
bits : 3 - 3 (1 bit)
access : read-write

RATDDBUSEUSART0ROUTEEN : ROUTEEN Protection Bit
bits : 5 - 5 (1 bit)
access : read-write

RATDDBUSEUSART0CSROUTE : CSROUTE Protection Bit
bits : 6 - 6 (1 bit)
access : read-write

RATDDBUSEUSART0CTSROUTE : CTSROUTE Protection Bit
bits : 7 - 7 (1 bit)
access : read-write

RATDDBUSEUSART0RTSROUTE : RTSROUTE Protection Bit
bits : 8 - 8 (1 bit)
access : read-write

RATDDBUSEUSART0RXROUTE : RXROUTE Protection Bit
bits : 9 - 9 (1 bit)
access : read-write

RATDDBUSEUSART0SCLKROUTE : SCLKROUTE Protection Bit
bits : 10 - 10 (1 bit)
access : read-write

RATDDBUSEUSART0TXROUTE : TXROUTE Protection Bit
bits : 11 - 11 (1 bit)
access : read-write

RATDDBUSEUSART1ROUTEEN : ROUTEEN Protection Bit
bits : 13 - 13 (1 bit)
access : read-write

RATDDBUSEUSART1CSROUTE : CSROUTE Protection Bit
bits : 14 - 14 (1 bit)
access : read-write

RATDDBUSEUSART1CTSROUTE : CTSROUTE Protection Bit
bits : 15 - 15 (1 bit)
access : read-write

RATDDBUSEUSART1RTSROUTE : RTSROUTE Protection Bit
bits : 16 - 16 (1 bit)
access : read-write

RATDDBUSEUSART1RXROUTE : RXROUTE Protection Bit
bits : 17 - 17 (1 bit)
access : read-write

RATDDBUSEUSART1SCLKROUTE : SCLKROUTE Protection Bit
bits : 18 - 18 (1 bit)
access : read-write

RATDDBUSEUSART1TXROUTE : TXROUTE Protection Bit
bits : 19 - 19 (1 bit)
access : read-write

RATDDBUSFRCROUTEEN : ROUTEEN Protection Bit
bits : 21 - 21 (1 bit)
access : read-write

RATDDBUSFRCDCLKROUTE : DCLKROUTE Protection Bit
bits : 22 - 22 (1 bit)
access : read-write

RATDDBUSFRCDFRAMEROUTE : DFRAMEROUTE Protection Bit
bits : 23 - 23 (1 bit)
access : read-write

RATDDBUSFRCDOUTROUTE : DOUTROUTE Protection Bit
bits : 24 - 24 (1 bit)
access : read-write

RATDDBUSI2C0ROUTEEN : ROUTEEN Protection Bit
bits : 26 - 26 (1 bit)
access : read-write

RATDDBUSI2C0SCLROUTE : SCLROUTE Protection Bit
bits : 27 - 27 (1 bit)
access : read-write

RATDDBUSI2C0SDAROUTE : SDAROUTE Protection Bit
bits : 28 - 28 (1 bit)
access : read-write

RATDDBUSI2C1ROUTEEN : ROUTEEN Protection Bit
bits : 30 - 30 (1 bit)
access : read-write

RATDDBUSI2C1SCLROUTE : SCLROUTE Protection Bit
bits : 31 - 31 (1 bit)
access : read-write


RPURATD10

Protected register address = (RPURATD register index X 32 + RPURATD bit index) X 4.
address_offset : 0x768 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RPURATD10 RPURATD10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RATDDBUSI2C1SDAROUTE RATDDBUSKEYPADROUTEEN RATDDBUSKEYPADCOLOUT0ROUTE RATDDBUSKEYPADCOLOUT1ROUTE RATDDBUSKEYPADCOLOUT2ROUTE RATDDBUSKEYPADCOLOUT3ROUTE RATDDBUSKEYPADCOLOUT4ROUTE RATDDBUSKEYPADCOLOUT5ROUTE RATDDBUSKEYPADCOLOUT6ROUTE RATDDBUSKEYPADCOLOUT7ROUTE RATDDBUSKEYPADROWSENSE0ROUTE RATDDBUSKEYPADROWSENSE1ROUTE RATDDBUSKEYPADROWSENSE2ROUTE RATDDBUSKEYPADROWSENSE3ROUTE RATDDBUSKEYPADROWSENSE4ROUTE RATDDBUSKEYPADROWSENSE5ROUTE RATDDBUSLETIMERROUTEEN RATDDBUSLETIMEROUT0ROUTE RATDDBUSLETIMEROUT1ROUTE RATDDBUSMODEMROUTEEN RATDDBUSMODEMANT0ROUTE RATDDBUSMODEMANT1ROUTE RATDDBUSMODEMANTROLLOVERROUTE RATDDBUSMODEMANTRR0ROUTE RATDDBUSMODEMANTRR1ROUTE RATDDBUSMODEMANTRR2ROUTE RATDDBUSMODEMANTRR3ROUTE RATDDBUSMODEMANTRR4ROUTE RATDDBUSMODEMANTRR5ROUTE

RATDDBUSI2C1SDAROUTE : SDAROUTE Protection Bit
bits : 0 - 0 (1 bit)
access : read-write

RATDDBUSKEYPADROUTEEN : ROUTEEN Protection Bit
bits : 2 - 2 (1 bit)
access : read-write

RATDDBUSKEYPADCOLOUT0ROUTE : COLOUT0ROUTE Protection Bit
bits : 3 - 3 (1 bit)
access : read-write

RATDDBUSKEYPADCOLOUT1ROUTE : COLOUT1ROUTE Protection Bit
bits : 4 - 4 (1 bit)
access : read-write

RATDDBUSKEYPADCOLOUT2ROUTE : COLOUT2ROUTE Protection Bit
bits : 5 - 5 (1 bit)
access : read-write

RATDDBUSKEYPADCOLOUT3ROUTE : COLOUT3ROUTE Protection Bit
bits : 6 - 6 (1 bit)
access : read-write

RATDDBUSKEYPADCOLOUT4ROUTE : COLOUT4ROUTE Protection Bit
bits : 7 - 7 (1 bit)
access : read-write

RATDDBUSKEYPADCOLOUT5ROUTE : COLOUT5ROUTE Protection Bit
bits : 8 - 8 (1 bit)
access : read-write

RATDDBUSKEYPADCOLOUT6ROUTE : COLOUT6ROUTE Protection Bit
bits : 9 - 9 (1 bit)
access : read-write

RATDDBUSKEYPADCOLOUT7ROUTE : COLOUT7ROUTE Protection Bit
bits : 10 - 10 (1 bit)
access : read-write

RATDDBUSKEYPADROWSENSE0ROUTE : ROWSENSE0ROUTE Protection Bit
bits : 11 - 11 (1 bit)
access : read-write

RATDDBUSKEYPADROWSENSE1ROUTE : ROWSENSE1ROUTE Protection Bit
bits : 12 - 12 (1 bit)
access : read-write

RATDDBUSKEYPADROWSENSE2ROUTE : ROWSENSE2ROUTE Protection Bit
bits : 13 - 13 (1 bit)
access : read-write

RATDDBUSKEYPADROWSENSE3ROUTE : ROWSENSE3ROUTE Protection Bit
bits : 14 - 14 (1 bit)
access : read-write

RATDDBUSKEYPADROWSENSE4ROUTE : ROWSENSE4ROUTE Protection Bit
bits : 15 - 15 (1 bit)
access : read-write

RATDDBUSKEYPADROWSENSE5ROUTE : ROWSENSE5ROUTE Protection Bit
bits : 16 - 16 (1 bit)
access : read-write

RATDDBUSLETIMERROUTEEN : ROUTEEN Protection Bit
bits : 18 - 18 (1 bit)
access : read-write

RATDDBUSLETIMEROUT0ROUTE : OUT0ROUTE Protection Bit
bits : 19 - 19 (1 bit)
access : read-write

RATDDBUSLETIMEROUT1ROUTE : OUT1ROUTE Protection Bit
bits : 20 - 20 (1 bit)
access : read-write

RATDDBUSMODEMROUTEEN : ROUTEEN Protection Bit
bits : 22 - 22 (1 bit)
access : read-write

RATDDBUSMODEMANT0ROUTE : ANT0ROUTE Protection Bit
bits : 23 - 23 (1 bit)
access : read-write

RATDDBUSMODEMANT1ROUTE : ANT1ROUTE Protection Bit
bits : 24 - 24 (1 bit)
access : read-write

RATDDBUSMODEMANTROLLOVERROUTE : ANTROLLOVERROUTE Protection Bit
bits : 25 - 25 (1 bit)
access : read-write

RATDDBUSMODEMANTRR0ROUTE : ANTRR0ROUTE Protection Bit
bits : 26 - 26 (1 bit)
access : read-write

RATDDBUSMODEMANTRR1ROUTE : ANTRR1ROUTE Protection Bit
bits : 27 - 27 (1 bit)
access : read-write

RATDDBUSMODEMANTRR2ROUTE : ANTRR2ROUTE Protection Bit
bits : 28 - 28 (1 bit)
access : read-write

RATDDBUSMODEMANTRR3ROUTE : ANTRR3ROUTE Protection Bit
bits : 29 - 29 (1 bit)
access : read-write

RATDDBUSMODEMANTRR4ROUTE : ANTRR4ROUTE Protection Bit
bits : 30 - 30 (1 bit)
access : read-write

RATDDBUSMODEMANTRR5ROUTE : ANTRR5ROUTE Protection Bit
bits : 31 - 31 (1 bit)
access : read-write


RPURATD11

Protected register address = (RPURATD register index X 32 + RPURATD bit index) X 4.
address_offset : 0x76C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RPURATD11 RPURATD11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RATDDBUSMODEMANTSWENROUTE RATDDBUSMODEMANTSWUSROUTE RATDDBUSMODEMANTTRIGROUTE RATDDBUSMODEMANTTRIGSTOPROUTE RATDDBUSMODEMDCLKROUTE RATDDBUSMODEMDINROUTE RATDDBUSMODEMDOUTROUTE RATDDBUSPCNT0S0INROUTE RATDDBUSPCNT0S1INROUTE RATDDBUSPRS0ROUTEEN RATDDBUSPRS0ASYNCH0ROUTE RATDDBUSPRS0ASYNCH1ROUTE RATDDBUSPRS0ASYNCH2ROUTE RATDDBUSPRS0ASYNCH3ROUTE RATDDBUSPRS0ASYNCH4ROUTE RATDDBUSPRS0ASYNCH5ROUTE RATDDBUSPRS0ASYNCH6ROUTE RATDDBUSPRS0ASYNCH7ROUTE RATDDBUSPRS0ASYNCH8ROUTE RATDDBUSPRS0ASYNCH9ROUTE RATDDBUSPRS0ASYNCH10ROUTE RATDDBUSPRS0ASYNCH11ROUTE RATDDBUSPRS0ASYNCH12ROUTE RATDDBUSPRS0ASYNCH13ROUTE RATDDBUSPRS0ASYNCH14ROUTE RATDDBUSPRS0ASYNCH15ROUTE RATDDBUSPRS0SYNCH0ROUTE RATDDBUSPRS0SYNCH1ROUTE RATDDBUSPRS0SYNCH2ROUTE

RATDDBUSMODEMANTSWENROUTE : ANTSWENROUTE Protection Bit
bits : 0 - 0 (1 bit)
access : read-write

RATDDBUSMODEMANTSWUSROUTE : ANTSWUSROUTE Protection Bit
bits : 1 - 1 (1 bit)
access : read-write

RATDDBUSMODEMANTTRIGROUTE : ANTTRIGROUTE Protection Bit
bits : 2 - 2 (1 bit)
access : read-write

RATDDBUSMODEMANTTRIGSTOPROUTE : ANTTRIGSTOPROUTE Protection Bit
bits : 3 - 3 (1 bit)
access : read-write

RATDDBUSMODEMDCLKROUTE : DCLKROUTE Protection Bit
bits : 4 - 4 (1 bit)
access : read-write

RATDDBUSMODEMDINROUTE : DINROUTE Protection Bit
bits : 5 - 5 (1 bit)
access : read-write

RATDDBUSMODEMDOUTROUTE : DOUTROUTE Protection Bit
bits : 6 - 6 (1 bit)
access : read-write

RATDDBUSPCNT0S0INROUTE : S0INROUTE Protection Bit
bits : 9 - 9 (1 bit)
access : read-write

RATDDBUSPCNT0S1INROUTE : S1INROUTE Protection Bit
bits : 10 - 10 (1 bit)
access : read-write

RATDDBUSPRS0ROUTEEN : ROUTEEN Protection Bit
bits : 12 - 12 (1 bit)
access : read-write

RATDDBUSPRS0ASYNCH0ROUTE : ASYNCH0ROUTE Protection Bit
bits : 13 - 13 (1 bit)
access : read-write

RATDDBUSPRS0ASYNCH1ROUTE : ASYNCH1ROUTE Protection Bit
bits : 14 - 14 (1 bit)
access : read-write

RATDDBUSPRS0ASYNCH2ROUTE : ASYNCH2ROUTE Protection Bit
bits : 15 - 15 (1 bit)
access : read-write

RATDDBUSPRS0ASYNCH3ROUTE : ASYNCH3ROUTE Protection Bit
bits : 16 - 16 (1 bit)
access : read-write

RATDDBUSPRS0ASYNCH4ROUTE : ASYNCH4ROUTE Protection Bit
bits : 17 - 17 (1 bit)
access : read-write

RATDDBUSPRS0ASYNCH5ROUTE : ASYNCH5ROUTE Protection Bit
bits : 18 - 18 (1 bit)
access : read-write

RATDDBUSPRS0ASYNCH6ROUTE : ASYNCH6ROUTE Protection Bit
bits : 19 - 19 (1 bit)
access : read-write

RATDDBUSPRS0ASYNCH7ROUTE : ASYNCH7ROUTE Protection Bit
bits : 20 - 20 (1 bit)
access : read-write

RATDDBUSPRS0ASYNCH8ROUTE : ASYNCH8ROUTE Protection Bit
bits : 21 - 21 (1 bit)
access : read-write

RATDDBUSPRS0ASYNCH9ROUTE : ASYNCH9ROUTE Protection Bit
bits : 22 - 22 (1 bit)
access : read-write

RATDDBUSPRS0ASYNCH10ROUTE : ASYNCH10ROUTE Protection Bit
bits : 23 - 23 (1 bit)
access : read-write

RATDDBUSPRS0ASYNCH11ROUTE : ASYNCH11ROUTE Protection Bit
bits : 24 - 24 (1 bit)
access : read-write

RATDDBUSPRS0ASYNCH12ROUTE : ASYNCH12ROUTE Protection Bit
bits : 25 - 25 (1 bit)
access : read-write

RATDDBUSPRS0ASYNCH13ROUTE : ASYNCH13ROUTE Protection Bit
bits : 26 - 26 (1 bit)
access : read-write

RATDDBUSPRS0ASYNCH14ROUTE : ASYNCH14ROUTE Protection Bit
bits : 27 - 27 (1 bit)
access : read-write

RATDDBUSPRS0ASYNCH15ROUTE : ASYNCH15ROUTE Protection Bit
bits : 28 - 28 (1 bit)
access : read-write

RATDDBUSPRS0SYNCH0ROUTE : SYNCH0ROUTE Protection Bit
bits : 29 - 29 (1 bit)
access : read-write

RATDDBUSPRS0SYNCH1ROUTE : SYNCH1ROUTE Protection Bit
bits : 30 - 30 (1 bit)
access : read-write

RATDDBUSPRS0SYNCH2ROUTE : SYNCH2ROUTE Protection Bit
bits : 31 - 31 (1 bit)
access : read-write


RPURATD12

Protected register address = (RPURATD register index X 32 + RPURATD bit index) X 4.
address_offset : 0x770 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RPURATD12 RPURATD12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RATDDBUSPRS0SYNCH3ROUTE RATDDBUSRACROUTEEN RATDDBUSRACLNAENROUTE RATDDBUSRACPAENROUTE RATDDBUSRFECA0ROUTEEN RATDDBUSRFECA0DATAOUT0ROUTE RATDDBUSRFECA0DATAOUT1ROUTE RATDDBUSRFECA0DATAOUT2ROUTE RATDDBUSRFECA0DATAOUT3ROUTE RATDDBUSRFECA0DATAOUT4ROUTE RATDDBUSRFECA0DATAOUT5ROUTE RATDDBUSRFECA0DATAOUT6ROUTE RATDDBUSRFECA0DATAOUT7ROUTE RATDDBUSRFECA0DATAOUT8ROUTE RATDDBUSRFECA0DATAOUT9ROUTE RATDDBUSRFECA0DATAOUT10ROUTE RATDDBUSRFECA0DATAOUT11ROUTE RATDDBUSRFECA0DATAOUT12ROUTE RATDDBUSRFECA0DATAOUT13ROUTE RATDDBUSRFECA0DATAOUT14ROUTE RATDDBUSRFECA0DATAOUT15ROUTE RATDDBUSRFECA0DATAOUT16ROUTE RATDDBUSRFECA0DATAOUT17ROUTE RATDDBUSRFECA0DATAOUT18ROUTE RATDDBUSRFECA0DATAVALIDROUTE RATDDBUSRFECA0TRIGGERINROUTE RATDDBUSSYXO0BUFOUTREQINASYNCROUTE

RATDDBUSPRS0SYNCH3ROUTE : SYNCH3ROUTE Protection Bit
bits : 0 - 0 (1 bit)
access : read-write

RATDDBUSRACROUTEEN : ROUTEEN Protection Bit
bits : 2 - 2 (1 bit)
access : read-write

RATDDBUSRACLNAENROUTE : LNAENROUTE Protection Bit
bits : 3 - 3 (1 bit)
access : read-write

RATDDBUSRACPAENROUTE : PAENROUTE Protection Bit
bits : 4 - 4 (1 bit)
access : read-write

RATDDBUSRFECA0ROUTEEN : ROUTEEN Protection Bit
bits : 6 - 6 (1 bit)
access : read-write

RATDDBUSRFECA0DATAOUT0ROUTE : DATAOUT0ROUTE Protection Bit
bits : 7 - 7 (1 bit)
access : read-write

RATDDBUSRFECA0DATAOUT1ROUTE : DATAOUT1ROUTE Protection Bit
bits : 8 - 8 (1 bit)
access : read-write

RATDDBUSRFECA0DATAOUT2ROUTE : DATAOUT2ROUTE Protection Bit
bits : 9 - 9 (1 bit)
access : read-write

RATDDBUSRFECA0DATAOUT3ROUTE : DATAOUT3ROUTE Protection Bit
bits : 10 - 10 (1 bit)
access : read-write

RATDDBUSRFECA0DATAOUT4ROUTE : DATAOUT4ROUTE Protection Bit
bits : 11 - 11 (1 bit)
access : read-write

RATDDBUSRFECA0DATAOUT5ROUTE : DATAOUT5ROUTE Protection Bit
bits : 12 - 12 (1 bit)
access : read-write

RATDDBUSRFECA0DATAOUT6ROUTE : DATAOUT6ROUTE Protection Bit
bits : 13 - 13 (1 bit)
access : read-write

RATDDBUSRFECA0DATAOUT7ROUTE : DATAOUT7ROUTE Protection Bit
bits : 14 - 14 (1 bit)
access : read-write

RATDDBUSRFECA0DATAOUT8ROUTE : DATAOUT8ROUTE Protection Bit
bits : 15 - 15 (1 bit)
access : read-write

RATDDBUSRFECA0DATAOUT9ROUTE : DATAOUT9ROUTE Protection Bit
bits : 16 - 16 (1 bit)
access : read-write

RATDDBUSRFECA0DATAOUT10ROUTE : DATAOUT10ROUTE Protection Bit
bits : 17 - 17 (1 bit)
access : read-write

RATDDBUSRFECA0DATAOUT11ROUTE : DATAOUT11ROUTE Protection Bit
bits : 18 - 18 (1 bit)
access : read-write

RATDDBUSRFECA0DATAOUT12ROUTE : DATAOUT12ROUTE Protection Bit
bits : 19 - 19 (1 bit)
access : read-write

RATDDBUSRFECA0DATAOUT13ROUTE : DATAOUT13ROUTE Protection Bit
bits : 20 - 20 (1 bit)
access : read-write

RATDDBUSRFECA0DATAOUT14ROUTE : DATAOUT14ROUTE Protection Bit
bits : 21 - 21 (1 bit)
access : read-write

RATDDBUSRFECA0DATAOUT15ROUTE : DATAOUT15ROUTE Protection Bit
bits : 22 - 22 (1 bit)
access : read-write

RATDDBUSRFECA0DATAOUT16ROUTE : DATAOUT16ROUTE Protection Bit
bits : 23 - 23 (1 bit)
access : read-write

RATDDBUSRFECA0DATAOUT17ROUTE : DATAOUT17ROUTE Protection Bit
bits : 24 - 24 (1 bit)
access : read-write

RATDDBUSRFECA0DATAOUT18ROUTE : DATAOUT18ROUTE Protection Bit
bits : 25 - 25 (1 bit)
access : read-write

RATDDBUSRFECA0DATAVALIDROUTE : DATAVALIDROUTE Protection Bit
bits : 26 - 26 (1 bit)
access : read-write

RATDDBUSRFECA0TRIGGERINROUTE : TRIGGERINROUTE Protection Bit
bits : 27 - 27 (1 bit)
access : read-write

RATDDBUSSYXO0BUFOUTREQINASYNCROUTE : BUFOUTREQINASYNCROUTE Protection Bit
bits : 30 - 30 (1 bit)
access : read-write


RPURATD13

Protected register address = (RPURATD register index X 32 + RPURATD bit index) X 4.
address_offset : 0x774 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RPURATD13 RPURATD13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RATDDBUSTIMER0ROUTEEN RATDDBUSTIMER0CC0ROUTE RATDDBUSTIMER0CC1ROUTE RATDDBUSTIMER0CC2ROUTE RATDDBUSTIMER0CCC0ROUTE RATDDBUSTIMER0CCC1ROUTE RATDDBUSTIMER0CCC2ROUTE RATDDBUSTIMER1ROUTEEN RATDDBUSTIMER1CC0ROUTE RATDDBUSTIMER1CC1ROUTE RATDDBUSTIMER1CC2ROUTE RATDDBUSTIMER1CCC0ROUTE RATDDBUSTIMER1CCC1ROUTE RATDDBUSTIMER1CCC2ROUTE RATDDBUSTIMER2ROUTEEN RATDDBUSTIMER2CC0ROUTE RATDDBUSTIMER2CC1ROUTE RATDDBUSTIMER2CC2ROUTE RATDDBUSTIMER2CCC0ROUTE RATDDBUSTIMER2CCC1ROUTE RATDDBUSTIMER2CCC2ROUTE RATDDBUSTIMER3ROUTEEN RATDDBUSTIMER3CC0ROUTE RATDDBUSTIMER3CC1ROUTE RATDDBUSTIMER3CC2ROUTE RATDDBUSTIMER3CCC0ROUTE RATDDBUSTIMER3CCC1ROUTE RATDDBUSTIMER3CCC2ROUTE

RATDDBUSTIMER0ROUTEEN : ROUTEEN Protection Bit
bits : 0 - 0 (1 bit)
access : read-write

RATDDBUSTIMER0CC0ROUTE : CC0ROUTE Protection Bit
bits : 1 - 1 (1 bit)
access : read-write

RATDDBUSTIMER0CC1ROUTE : CC1ROUTE Protection Bit
bits : 2 - 2 (1 bit)
access : read-write

RATDDBUSTIMER0CC2ROUTE : CC2ROUTE Protection Bit
bits : 3 - 3 (1 bit)
access : read-write

RATDDBUSTIMER0CCC0ROUTE : CCC0ROUTE Protection Bit
bits : 4 - 4 (1 bit)
access : read-write

RATDDBUSTIMER0CCC1ROUTE : CCC1ROUTE Protection Bit
bits : 5 - 5 (1 bit)
access : read-write

RATDDBUSTIMER0CCC2ROUTE : CCC2ROUTE Protection Bit
bits : 6 - 6 (1 bit)
access : read-write

RATDDBUSTIMER1ROUTEEN : ROUTEEN Protection Bit
bits : 8 - 8 (1 bit)
access : read-write

RATDDBUSTIMER1CC0ROUTE : CC0ROUTE Protection Bit
bits : 9 - 9 (1 bit)
access : read-write

RATDDBUSTIMER1CC1ROUTE : CC1ROUTE Protection Bit
bits : 10 - 10 (1 bit)
access : read-write

RATDDBUSTIMER1CC2ROUTE : CC2ROUTE Protection Bit
bits : 11 - 11 (1 bit)
access : read-write

RATDDBUSTIMER1CCC0ROUTE : CCC0ROUTE Protection Bit
bits : 12 - 12 (1 bit)
access : read-write

RATDDBUSTIMER1CCC1ROUTE : CCC1ROUTE Protection Bit
bits : 13 - 13 (1 bit)
access : read-write

RATDDBUSTIMER1CCC2ROUTE : CCC2ROUTE Protection Bit
bits : 14 - 14 (1 bit)
access : read-write

RATDDBUSTIMER2ROUTEEN : ROUTEEN Protection Bit
bits : 16 - 16 (1 bit)
access : read-write

RATDDBUSTIMER2CC0ROUTE : CC0ROUTE Protection Bit
bits : 17 - 17 (1 bit)
access : read-write

RATDDBUSTIMER2CC1ROUTE : CC1ROUTE Protection Bit
bits : 18 - 18 (1 bit)
access : read-write

RATDDBUSTIMER2CC2ROUTE : CC2ROUTE Protection Bit
bits : 19 - 19 (1 bit)
access : read-write

RATDDBUSTIMER2CCC0ROUTE : CCC0ROUTE Protection Bit
bits : 20 - 20 (1 bit)
access : read-write

RATDDBUSTIMER2CCC1ROUTE : CCC1ROUTE Protection Bit
bits : 21 - 21 (1 bit)
access : read-write

RATDDBUSTIMER2CCC2ROUTE : CCC2ROUTE Protection Bit
bits : 22 - 22 (1 bit)
access : read-write

RATDDBUSTIMER3ROUTEEN : ROUTEEN Protection Bit
bits : 24 - 24 (1 bit)
access : read-write

RATDDBUSTIMER3CC0ROUTE : CC0ROUTE Protection Bit
bits : 25 - 25 (1 bit)
access : read-write

RATDDBUSTIMER3CC1ROUTE : CC1ROUTE Protection Bit
bits : 26 - 26 (1 bit)
access : read-write

RATDDBUSTIMER3CC2ROUTE : CC2ROUTE Protection Bit
bits : 27 - 27 (1 bit)
access : read-write

RATDDBUSTIMER3CCC0ROUTE : CCC0ROUTE Protection Bit
bits : 28 - 28 (1 bit)
access : read-write

RATDDBUSTIMER3CCC1ROUTE : CCC1ROUTE Protection Bit
bits : 29 - 29 (1 bit)
access : read-write

RATDDBUSTIMER3CCC2ROUTE : CCC2ROUTE Protection Bit
bits : 30 - 30 (1 bit)
access : read-write


RPURATD14

Protected register address = (RPURATD register index X 32 + RPURATD bit index) X 4.
address_offset : 0x778 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RPURATD14 RPURATD14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RATDDBUSTIMER4ROUTEEN RATDDBUSTIMER4CC0ROUTE RATDDBUSTIMER4CC1ROUTE RATDDBUSTIMER4CC2ROUTE RATDDBUSTIMER4CCC0ROUTE RATDDBUSTIMER4CCC1ROUTE RATDDBUSTIMER4CCC2ROUTE RATDDBUSUSART0ROUTEEN RATDDBUSUSART0CSROUTE RATDDBUSUSART0CTSROUTE RATDDBUSUSART0RTSROUTE RATDDBUSUSART0RXROUTE RATDDBUSUSART0SCLKROUTE RATDDBUSUSART0TXROUTE

RATDDBUSTIMER4ROUTEEN : ROUTEEN Protection Bit
bits : 0 - 0 (1 bit)
access : read-write

RATDDBUSTIMER4CC0ROUTE : CC0ROUTE Protection Bit
bits : 1 - 1 (1 bit)
access : read-write

RATDDBUSTIMER4CC1ROUTE : CC1ROUTE Protection Bit
bits : 2 - 2 (1 bit)
access : read-write

RATDDBUSTIMER4CC2ROUTE : CC2ROUTE Protection Bit
bits : 3 - 3 (1 bit)
access : read-write

RATDDBUSTIMER4CCC0ROUTE : CCC0ROUTE Protection Bit
bits : 4 - 4 (1 bit)
access : read-write

RATDDBUSTIMER4CCC1ROUTE : CCC1ROUTE Protection Bit
bits : 5 - 5 (1 bit)
access : read-write

RATDDBUSTIMER4CCC2ROUTE : CCC2ROUTE Protection Bit
bits : 6 - 6 (1 bit)
access : read-write

RATDDBUSUSART0ROUTEEN : ROUTEEN Protection Bit
bits : 8 - 8 (1 bit)
access : read-write

RATDDBUSUSART0CSROUTE : CSROUTE Protection Bit
bits : 9 - 9 (1 bit)
access : read-write

RATDDBUSUSART0CTSROUTE : CTSROUTE Protection Bit
bits : 10 - 10 (1 bit)
access : read-write

RATDDBUSUSART0RTSROUTE : RTSROUTE Protection Bit
bits : 11 - 11 (1 bit)
access : read-write

RATDDBUSUSART0RXROUTE : RXROUTE Protection Bit
bits : 12 - 12 (1 bit)
access : read-write

RATDDBUSUSART0SCLKROUTE : SCLKROUTE Protection Bit
bits : 13 - 13 (1 bit)
access : read-write

RATDDBUSUSART0TXROUTE : TXROUTE Protection Bit
bits : 14 - 14 (1 bit)
access : read-write


PORTC_CTRL

Port control
address_offset : 0x90 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTC_CTRL PORTC_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLEWRATE DINDIS SLEWRATEALT DINDISALT

SLEWRATE : Slew Rate
bits : 4 - 6 (3 bit)
access : read-write

DINDIS : Data In Disable
bits : 12 - 12 (1 bit)
access : read-write

SLEWRATEALT : Slew Rate Alt
bits : 20 - 22 (3 bit)
access : read-write

DINDISALT : Data In Disable Alt
bits : 28 - 28 (1 bit)
access : read-write


PORTC_MODEL

mode low
address_offset : 0x94 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTC_MODEL PORTC_MODEL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MODE0 MODE1 MODE2 MODE3 MODE4 MODE5 MODE6 MODE7

MODE0 : MODE n
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE1 : MODE n
bits : 4 - 7 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE2 : MODE n
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE3 : MODE n
bits : 12 - 15 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE4 : MODE n
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE5 : MODE n
bits : 20 - 23 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE6 : MODE n
bits : 24 - 27 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE7 : MODE n
bits : 28 - 31 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.


PORTC_MODEH

mode high
address_offset : 0x9C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTC_MODEH PORTC_MODEH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MODE0 MODE1

MODE0 : MODE n
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE1 : MODE n
bits : 4 - 7 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.


PORTC_DOUT

data out
address_offset : 0xA0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTC_DOUT PORTC_DOUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DOUT

DOUT : Data output
bits : 0 - 9 (10 bit)
access : read-write


PORTC_DIN

data in
address_offset : 0xA4 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PORTC_DIN PORTC_DIN read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DIN

DIN : Data input
bits : 0 - 9 (10 bit)
access : read-only


PORTD_CTRL

Port control
address_offset : 0xC0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTD_CTRL PORTD_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLEWRATE DINDIS SLEWRATEALT DINDISALT

SLEWRATE : Slew Rate
bits : 4 - 6 (3 bit)
access : read-write

DINDIS : Data In Disable
bits : 12 - 12 (1 bit)
access : read-write

SLEWRATEALT : Slew Rate Alt
bits : 20 - 22 (3 bit)
access : read-write

DINDISALT : Data In Disable Alt
bits : 28 - 28 (1 bit)
access : read-write


PORTD_MODEL

mode low
address_offset : 0xC4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTD_MODEL PORTD_MODEL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MODE0 MODE1 MODE2 MODE3 MODE4 MODE5

MODE0 : MODE n
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE1 : MODE n
bits : 4 - 7 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE2 : MODE n
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE3 : MODE n
bits : 12 - 15 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE4 : MODE n
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE5 : MODE n
bits : 20 - 23 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.


PORTD_DOUT

data out
address_offset : 0xD0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTD_DOUT PORTD_DOUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DOUT

DOUT : Data output
bits : 0 - 5 (6 bit)
access : read-write


PORTD_DIN

data in
address_offset : 0xD4 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PORTD_DIN PORTD_DIN read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DIN

DIN : Data input
bits : 0 - 5 (6 bit)
access : read-only



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