\n
address_offset : 0x0 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x4 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
SRAM Parity Error Operation After Detection Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OAD : Operation After Detection
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Non-maskable interrupt
#1 : 1
Reset
End of enumeration elements list.
SRAM Protection Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SRAMPRCR : Register Write Control
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable writes to protected registers
#1 : 1
Enable writes to protected registers
End of enumeration elements list.
KW : Write Key Code
bits : 1 - 6 (6 bit)
access : write-only
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