\n

BUS

Peripheral Memory Blocks

address_offset : 0x1008 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x100C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x1820 Bytes (0x0)
size : 0x5 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x1830 Bytes (0x0)
size : 0x5 byte (0x0)
mem_usage : registers
protection : not protected

Registers

BUSMCNTSYS

BUSMCNTDMA

BUS3ERRADD

BUS3ERRSTAT

BUS4ERRADD

BUS4ERRSTAT


BUSMCNTSYS

Master Bus Control Register SYS
address_offset : 0x1008 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUSMCNTSYS BUSMCNTSYS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IERES

IERES : Ignore Error Responses
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : 0

A bus error is reported.

#1 : 1

A bus error is not reported.

End of enumeration elements list.


BUSMCNTDMA

Master Bus Control Register DMA
address_offset : 0x100C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUSMCNTDMA BUSMCNTDMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IERES

IERES : Ignore Error Responses
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : 0

A bus error is reported.

#1 : 1

A bus error is not reported.

End of enumeration elements list.


BUS3ERRADD

Bus Error Address Register 3
address_offset : 0x1820 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BUS3ERRADD BUS3ERRADD read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BERAD

BERAD : Bus Error Address
bits : 0 - 30 (31 bit)
access : read-only


BUS3ERRSTAT

BUS Error Status Register 3
address_offset : 0x1824 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BUS3ERRSTAT BUS3ERRSTAT read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ACCSTAT ERRSTAT

ACCSTAT : Error Access Status
bits : 0 - -1 (0 bit)
access : read-only

Enumeration:

#0 : 0

Read access

#1 : 1

Write access

End of enumeration elements list.

ERRSTAT : Bus Error Status
bits : 7 - 6 (0 bit)
access : read-only

Enumeration:

#0 : 0

No bus error occurred.

#1 : 1

Bus error occurred.

End of enumeration elements list.


BUS4ERRADD

Bus Error Address Register 4
address_offset : 0x1830 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BUS4ERRADD BUS4ERRADD read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BERAD

BERAD : Bus Error Address
bits : 0 - 30 (31 bit)
access : read-only


BUS4ERRSTAT

BUS Error Status Register 4
address_offset : 0x1834 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BUS4ERRSTAT BUS4ERRSTAT read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ACCSTAT ERRSTAT

ACCSTAT : Error Access Status
bits : 0 - -1 (0 bit)
access : read-only

Enumeration:

#0 : 0

Read access

#1 : 1

Write access

End of enumeration elements list.

ERRSTAT : Bus Error Status
bits : 7 - 6 (0 bit)
access : read-only

Enumeration:

#0 : 0

No bus error occurred.

#1 : 1

Bus error occurred.

End of enumeration elements list.



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