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CAC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x5 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x6 Bytes (0x0)
size : 0x6 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CACR0

CACR1

CACR2

CAICR

CASTR

CAULVR

CALLVR

CACNTBR


CACR0

CAC Control Register 0
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CACR0 CACR0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CFME

CFME : Clock Frequency Measurement Enable
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable

#1 : 1

Enable

End of enumeration elements list.


CACR1

CAC Control Register 1
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CACR1 CACR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CACREFE FMCS TCSS EDGES

CACREFE : CACREF Pin Input Enable
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable

#1 : 1

Enable

End of enumeration elements list.

FMCS : Measurement Target Clock Select
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

#000 : 000

Main clock oscillator

#001 : 001

Sub-clock oscillator

#010 : 010

HOCO clock

#011 : 011

MOCO

#100 : 100

LOCO clock

#101 : 101

Peripheral module clock B (PCLKB)

#110 : 110

IWDT-dedicated clock

#111 : 111

Setting prohibited

End of enumeration elements list.

TCSS : Timer Count Clock Source Select
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#00 : 00

No division

#01 : 01

x 1/4 clock

#10 : 10

x 1/8 clock

#11 : 11

x 1/32 clock

End of enumeration elements list.

EDGES : Valid Edge Select
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#00 : 00

Rising edge

#01 : 01

Falling edge

#10 : 10

Both rising and falling edges

#11 : 11

Setting prohibited

End of enumeration elements list.


CACR2

CAC Control Register 2
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CACR2 CACR2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RPS RSCS RCDS DFS

RPS : Reference Signal Select
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

CACREF pin input

#1 : 1

Internal clock (internally generated signal)

End of enumeration elements list.

RSCS : Measurement Reference Clock Select
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

#000 : 000

Main clock oscillator

#001 : 001

Sub-clock oscillator

#010 : 010

HOCO clock

#011 : 011

MOCO

#100 : 100

LOCO clock

#101 : 101

Peripheral module clock B (PCLKB)

#110 : 110

IWDT-dedicated clock

#111 : 111

Setting prohibited

End of enumeration elements list.

RCDS : Measurement Reference Clock Frequency Division Ratio Select
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#00 : 00

x 1/32 clock

#01 : 01

x 1/128 clock

#10 : 10

x 1/1024 clock

#11 : 11

x 1/8192 clock

End of enumeration elements list.

DFS : Digital Filter Select
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#00 : 00

Disable digital filtering

#01 : 01

Use sampling clock for the digital filter as the frequency measuring clock

#10 : 10

Use sampling clock for the digital filter as the frequency measuring clock divided by 4

#11 : 11

Use sampling clock for the digital filter as the frequency measuring clock divided by 16.

End of enumeration elements list.


CAICR

CAC Interrupt Control Register
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAICR CAICR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 FERRIE MENDIE OVFIE FERRFCL MENDFCL OVFFCL

FERRIE : Frequency Error Interrupt Request Enable
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable

#1 : 1

Enable

End of enumeration elements list.

MENDIE : Measurement End Interrupt Request Enable
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable

#1 : 1

Enable

End of enumeration elements list.

OVFIE : Overflow Interrupt Request Enable
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable

#1 : 1

Enable

End of enumeration elements list.

FERRFCL : FERRF Clear
bits : 4 - 3 (0 bit)
access : write-only

Enumeration:

#0 : 0

No effect

#1 : 1

The CASTR.FERRF flag is cleared

End of enumeration elements list.

MENDFCL : MENDF Clear
bits : 5 - 4 (0 bit)
access : write-only

Enumeration:

#0 : 0

No effect

#1 : 1

The CASTR.MENDF flag is cleared

End of enumeration elements list.

OVFFCL : OVFF Clear
bits : 6 - 5 (0 bit)
access : write-only

Enumeration:

#0 : 0

No effect

#1 : 1

The CASTR.OVFF flag is cleared.

End of enumeration elements list.


CASTR

CAC Status Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CASTR CASTR read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 FERRF MENDF OVFF

FERRF : Frequency Error Flag
bits : 0 - -1 (0 bit)
access : read-only

Enumeration:

#0 : 0

Clock frequency is within the allowable range

#1 : 1

Clock frequency has deviated beyond the allowable range (frequency error).

End of enumeration elements list.

MENDF : Measurement End Flag
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : 0

Measurement is in progress

#1 : 1

Measurement ended

End of enumeration elements list.

OVFF : Overflow Flag
bits : 2 - 1 (0 bit)
access : read-only

Enumeration:

#0 : 0

Counter has not overflowed

#1 : 1

Counter overflowed

End of enumeration elements list.


CAULVR

CAC Upper-Limit Value Setting Register
address_offset : 0x6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAULVR CAULVR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

CALLVR

CAC Lower-Limit Value Setting Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CALLVR CALLVR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

CACNTBR

CAC Counter Buffer Register
address_offset : 0xA Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CACNTBR CACNTBR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0


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