Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection : not protected
I2C Bus Control Register 1
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDAI : SDA Line Monitor
bits : 0 - -1 (0 bit)
access : read-only
Enumeration:
#0 : 0
SDA0 line is low
#1 : 1
SDA0 line is high
End of enumeration elements list.
SCLI : SCL Line Monitor
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
SCL0 line is low
#1 : 1
SCL0 line is high
End of enumeration elements list.
SDAO : SDA Output Control/Monitor
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Read: IIC drives SDA0 pin low Write: IIC drives SDA0 pin low
#1 : 1
Read: IIC releases SDA0 pin Write: IIC releases SDA0 pin
End of enumeration elements list.
SCLO : SCL Output Control/Monitor
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : 0
Read: IIC drives SCL0 pin low Write: IIC drives SCL0 pin low
#1 : 1
Read: IIC releases SCL0 pin Write: IIC releases SCL0 pin
End of enumeration elements list.
SOWP : SCLO/SDAO Write Protect
bits : 4 - 3 (0 bit)
access : write-only
Enumeration:
#0 : 0
Write enable SCLO and SDAO bits
#1 : 1
Write protect SCLO and SDAO bits
End of enumeration elements list.
CLO : Extra SCL Clock Cycle Output
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not output extra SCL clock cycle (default)
#1 : 1
Output extra SCL clock cycle
End of enumeration elements list.
IICRST : I2C Bus Interface Internal Reset
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
Release IIC reset or internal reset
#1 : 1
Initiate IIC reset or internal reset
End of enumeration elements list.
ICE : I2C Bus Interface Enable
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable (SCL0 and SDA0 pins in inactive state)
#1 : 1
Enable (SCL0 and SDA0 pins in active state)
End of enumeration elements list.
I2C Bus Control Register 2
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ST : Start Condition Issuance Request
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not issue a start condition request
#1 : 1
Issue a start condition request
End of enumeration elements list.
RS : Restart Condition Issuance Request
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not issue a restart condition request
#1 : 1
Issue a restart condition request
End of enumeration elements list.
SP : Stop Condition Issuance Request
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not issue a stop condition request
#1 : 1
Issue a stop condition request
End of enumeration elements list.
TRS : Transmit/Receive Mode
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
#0 : 0
Receive mode
#1 : 1
Transmit mode
End of enumeration elements list.
MST : Master/Slave Mode
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
Slave mode
#1 : 1
Master mode
End of enumeration elements list.
BBSY : Bus Busy Detection Flag
bits : 7 - 6 (0 bit)
access : read-only
Enumeration:
#0 : 0
I2C bus released (bus free state)
#1 : 1
I2C bus occupied (bus busy state)
End of enumeration elements list.
I2C Bus Bit Rate Low-Level Register
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BRL : Bit Rate Low-Level Period
bits : 0 - 3 (4 bit)
access : read-write
I2C Bus Bit Rate High-Level Register
address_offset : 0x11 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BRH : Bit Rate High-Level Period
bits : 0 - 3 (4 bit)
access : read-write
I2C Bus Transmit Data Register
address_offset : 0x12 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
I2C Bus Receive Data Register
address_offset : 0x13 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
I2C Bus Mode Register 1
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BC : Bit Counter
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
#000 : 000
9 bits
#001 : 001
2 bits
#010 : 010
3 bits
#011 : 011
4 bits
#100 : 100
5 bits
#101 : 101
6 bits
#110 : 110
7 bits
#111 : 111
8 bits
End of enumeration elements list.
BCWP : BC Write Protect
bits : 3 - 2 (0 bit)
access : write-only
Enumeration:
#0 : 0
Write enable BC[2:0] bits
#1 : 1
Write protect BC[2:0] bits
End of enumeration elements list.
CKS : Internal Reference Clock Select
bits : 4 - 5 (2 bit)
access : read-write
MTWP : MST/TRS Write Protect
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
#0 : 0
Write protect MST and TRS bits in ICCR2
#1 : 1
Write enable MST and TRS bits in ICCR2
End of enumeration elements list.
I2C Bus Mode Register 2
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TMOS : Timeout Detection Time Select
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Select long mode
#1 : 1
Select short mode
End of enumeration elements list.
TMOL : Timeout L Count Control
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable count while SCL0 line is low
#1 : 1
Enable count while SCL0 line is low
End of enumeration elements list.
TMOH : Timeout H Count Control
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable count while SCL0 line is high
#1 : 1
Enable count while SCL0 line is high
End of enumeration elements list.
SDDL : SDA Output Delay Counter
bits : 4 - 5 (2 bit)
access : read-write
Enumeration:
#000 : 000
No output delay
#001 : 001
1 IIC-phi cycle (When ICMR2.DLCS = 0 (IIC-phi)) 1 or 2 IIC-phi cycles (When ICMR2.DLCS = 1 (IIC-phi/2))
#010 : 010
2 IIC-phi cycles (When ICMR2.DLCS = 0 (IIC-phi)) 3 or 4 IIC-phi cycles (When ICMR2.DLCS = 1 (IIC-phi/2))
#011 : 011
3 IIC-phi cycles (When ICMR2.DLCS = 0 (IIC-phi)) 5 or 6 IIC-phi cycles (When ICMR2.DLCS = 1 (IIC-phi/2))
#100 : 100
4 IIC-phi cycles (When ICMR2.DLCS = 0 (IIC-phi)) 7 or 8 IIC-phi cycles (When ICMR2.DLCS = 1 (IIC-phi/2))
#101 : 101
5 IIC-phi cycles (When ICMR2.DLCS = 0 (IIC-phi)) 9 or 10 IIC-phi cycles (When ICMR2.DLCS = 1 (IIC-phi/2))
#110 : 110
6 IIC-phi cycles (When ICMR2.DLCS = 0 (IIC-phi)) 11 or 12 IIC-phi cycles (When ICMR2.DLCS = 1 (IIC-phi/2))
#111 : 111
7 IIC-phi cycles (When ICMR2.DLCS = 0 (IIC-phi)) 13 or 14 IIC-phi cycles (When ICMR2.DLCS = 1 (IIC-phi/2))
End of enumeration elements list.
DLCS : SDA Output Delay Clock Source Select
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
#0 : 0
Select internal reference clock (IIC-phi) as the clock source for SDA output delay counter
#1 : 1
Select internal reference clock divided by 2 (IIC-phi/2) as the clock source for SDA output delay counter
End of enumeration elements list.
I2C Bus Mode Register 3
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NF : Noise Filter Stage Select
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#00 : 00
Filter out noise of up to 1 IIC-phi cycle (single-stage filter)
#01 : 01
Filter out noise of up to 2 IIC-phi cycles (2-stage filter)
#10 : 10
Filter out noise of up to 3 IIC-phi cycles (3-stage filter)
#11 : 11
Filter out noise of up to 4 IIC-phi cycles (4-stage filter)
End of enumeration elements list.
ACKBR : Receive Acknowledge
bits : 2 - 1 (0 bit)
access : read-only
Enumeration:
#0 : 0
0 received as the acknowledge bit (ACK reception)
#1 : 1
1 received as the acknowledge bit (NACK reception)
End of enumeration elements list.
ACKBT : Transmit Acknowledge
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : 0
Send 0 as the acknowledge bit (ACK transmission)
#1 : 1
Send 1 as the acknowledge bit (NACK transmission)
End of enumeration elements list.
ACKWP : ACKBT Write Protect
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Write protect ACKBT bit
#1 : 1
Write enable ACKBT bit
End of enumeration elements list.
RDRFS : RDRF Flag Set Timing Select
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
#0 : 0
Set the RDRF flag on the rising edge of the 9th SCL clock cycle. The SCLn line is not held low on the falling edge of the 8th clock cycle.
#1 : 1
Set the RDRF flag on the rising edge of the 8th SCL clock cycle. The SCLn line is held low on the falling edge of the 8th clock cycle.
End of enumeration elements list.
WAIT : Low-hold is released by reading ICDRR.
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
No wait (The SCLn line is not held low during the period between the 9th clock cycle and the 1st clock cycle.)
#1 : 1
Wait (The SCLn line is held low during the period between the 9th clock cycle and the 1st clock cycle.)
End of enumeration elements list.
SMBS : SMBus/I2C Bus Select
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
#0 : 0
Select I2C Bus
#1 : 1
Select SMBus
End of enumeration elements list.
I2C Bus Function Enable Register
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TMOE : Timeout Function Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable
#1 : 1
Enable
End of enumeration elements list.
MALE : Master Arbitration-Lost Detection Enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable the arbitration-lost detection function and disable automatic clearing of the MST and TRS bits in ICCR2 when arbitration is lost
#1 : 1
Enable the arbitration-lost detection function and enable automatic clearing of the MST and TRS bits in ICCR2 when arbitration is lost
End of enumeration elements list.
NALE : NACK Transmission Arbitration-Lost Detection Enable
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable
#1 : 1
Enable
End of enumeration elements list.
SALE : Slave Arbitration-Lost Detection Enable
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable
#1 : 1
Enable
End of enumeration elements list.
NACKE : NACK Reception Transfer Suspension Enable
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not suspend transfer operation during NACK reception (disable transfer suspension)
#1 : 1
Suspend transfer operation during NACK reception (enable transfer suspension)
End of enumeration elements list.
NFE : Digital Noise Filter Circuit Enable
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not use the digital noise filter circuit
#1 : 1
Use the digital noise filter circuit
End of enumeration elements list.
SCLE : SCL Synchronous Circuit Enable
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not use the SCL synchronous circuit
#1 : 1
Use the SCL synchronous circuit
End of enumeration elements list.
I2C Bus Status Enable Register
address_offset : 0x6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SAR0E : Slave Address Register 0 Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable slave address in SARL0 and SARU0
#1 : 1
Enable slave address in SARL0 and SARU0
End of enumeration elements list.
SAR1E : Slave Address Register 1 Enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable slave address in SARL1 and SARU1
#1 : 1
Enable slave address in SARL1 and SARU1
End of enumeration elements list.
SAR2E : Slave Address Register 2 Enable
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable slave address in SARL2 and SARU2
#1 : 1
Enable slave address in SARL2 and SARU2
End of enumeration elements list.
GCAE : General Call Address Enable
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable general call address detection
#1 : 1
Enable general call address detection
End of enumeration elements list.
DIDE : Device-ID Address Detection Enable
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable device-ID address detection
#1 : 1
Enable device-ID address detection
End of enumeration elements list.
HOAE : Host Address Enable
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable host address detection
#1 : 1
Enable host address detection
End of enumeration elements list.
I2C Bus Interrupt Enable Register
address_offset : 0x7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TMOIE : Timeout Interrupt Request Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable timeout interrupt (TMOI) request
#1 : 1
Enable timeout interrupt (TMOI) request
End of enumeration elements list.
ALIE : Arbitration-Lost Interrupt Request Enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable arbitration-lost interrupt (ALI) request
#1 : 1
Enable arbitration-lost interrupt (ALI) request
End of enumeration elements list.
STIE : Start Condition Detection Interrupt Request Enable
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable start condition detection interrupt (STI) request
#1 : 1
Enable start condition detection interrupt (STI) request
End of enumeration elements list.
SPIE : Stop Condition Detection Interrupt Request Enable
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable stop condition detection interrupt (SPI) request
#1 : 1
Enable stop condition detection interrupt (SPI) request
End of enumeration elements list.
NAKIE : NACK Reception Interrupt Request Enable
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable NACK reception interrupt (NAKI) request
#1 : 1
Enable NACK reception interrupt (NAKI) request
End of enumeration elements list.
RIE : Receive Data Full Interrupt Request Enable
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable receive data full interrupt (IIC0_RXI) request
#1 : 1
Enable receive data full interrupt (IIC0_RXI) request
End of enumeration elements list.
TEIE : Transmit End Interrupt Request Enable
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable transmit end interrupt (IIC0_TEI) request
#1 : 1
Enable transmit end interrupt (IIC0_TEI) request
End of enumeration elements list.
TIE : Transmit Data Empty Interrupt Request Enable
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable transmit data empty interrupt (IIC0_TXI) request
#1 : 1
Enable transmit data empty interrupt (IIC0_TXI) request
End of enumeration elements list.
I2C Bus Status Register 1
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AAS0 : Slave Address 0 Detection Flag
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Slave address 0 not detected
#1 : 1
Slave address 0 detected
End of enumeration elements list.
AAS1 : Slave Address 1 Detection Flag
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Slave address 1 not detected
#1 : 1
Slave address 1 detected
End of enumeration elements list.
AAS2 : Slave Address 2 Detection Flag
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Slave address 2 not detected
#1 : 1
Slave address 2 detected
End of enumeration elements list.
GCA : General Call Address Detection Flag
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : 0
General call address not detected
#1 : 1
General call address detected
End of enumeration elements list.
DID : Device-ID Address Detection Flag
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
#0 : 0
Device-ID command not detected
#1 : 1
Device-ID command detected
End of enumeration elements list.
HOA : Host Address Detection Flag
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
#0 : 0
Host address not detected
#1 : 1
Host address detected
End of enumeration elements list.
I2C Bus Status Register 2
address_offset : 0x9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TMOF : Timeout Detection Flag
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Timeout not detected
#1 : 1
Timeout detected
End of enumeration elements list.
AL : Arbitration-Lost Flag
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Arbitration not lost
#1 : 1
Arbitration lost
End of enumeration elements list.
START : Start Condition Detection Flag
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Start condition not detected
#1 : 1
Start condition detected
End of enumeration elements list.
STOP : Stop Condition Detection Flag
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : 0
Stop condition not detected
#1 : 1
Stop condition detected
End of enumeration elements list.
NACKF : NACK Detection Flag
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
NACK not detected
#1 : 1
NACK detected
End of enumeration elements list.
RDRF : Receive Data Full Flag
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
#0 : 0
ICDRR contains no receive data
#1 : 1
ICDRR contains receive data
End of enumeration elements list.
TEND : Transmit End Flag
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
Data being transmitted
#1 : 1
Data transmit complete
End of enumeration elements list.
TDRE : Transmit Data Empty Flag
bits : 7 - 6 (0 bit)
access : read-only
Enumeration:
#0 : 0
ICDRT contains transmit data
#1 : 1
ICDRT contains no transmit data
End of enumeration elements list.
Slave Address Register Ly
address_offset : 0xA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SVA0 : 10-bit Address LSB
bits : 0 - -1 (0 bit)
access : read-write
SVA : 7-bit Address/10-bit Address Lower Bits
bits : 1 - 6 (6 bit)
access : read-write
Slave Address Register Uy
address_offset : 0xB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FS : 7-bit/10-bit Address Format Select
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Select 7-bit address format
#1 : 1
Select 10-bit address format
End of enumeration elements list.
SVA : 10-bit Address Upper Bits
bits : 1 - 1 (1 bit)
access : read-write
Slave Address Register Ly
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SVA0 : 10-bit Address LSB
bits : 0 - -1 (0 bit)
access : read-write
SVA : 7-bit Address/10-bit Address Lower Bits
bits : 1 - 6 (6 bit)
access : read-write
Slave Address Register Uy
address_offset : 0xD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FS : 7-bit/10-bit Address Format Select
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Select 7-bit address format
#1 : 1
Select 10-bit address format
End of enumeration elements list.
SVA : 10-bit Address Upper Bits
bits : 1 - 1 (1 bit)
access : read-write
Slave Address Register Ly
address_offset : 0xE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SVA0 : 10-bit Address LSB
bits : 0 - -1 (0 bit)
access : read-write
SVA : 7-bit Address/10-bit Address Lower Bits
bits : 1 - 6 (6 bit)
access : read-write
Slave Address Register Uy
address_offset : 0xF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FS : 7-bit/10-bit Address Format Select
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Select 7-bit address format
#1 : 1
Select 10-bit address format
End of enumeration elements list.
SVA : 10-bit Address Upper Bits
bits : 1 - 1 (1 bit)
access : read-write
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