\n

ADC120

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x4 Bytes (0x0)
size : 0x9 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0xE Bytes (0x0)
size : 0x28 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x40 Bytes (0x0)
size : 0xE byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x7A Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x7E Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x80 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x84 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x8A Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x8C Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x90 Bytes (0x0)
size : 0x15 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0xA6 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0xA8 Bytes (0x0)
size : 0x5 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0xDD Bytes (0x0)
size : 0xE byte (0x0)
mem_usage : registers
protection : not protected

Registers

ADCSR

ADSTRGR

ADEXICR

ADANSB0

ADANSB1

ADDBLDR

ADTSDR

ADOCDR

ADRD

ADDR0

ADDR1

ADDR2

ADDR3

ADDR4

ADDR5

ADDR6

ADDR7

ADDR8

ADDR9

ADDR10

ADANSA0

ADCTDR

ADDR17

ADDR18

ADDR19

ADDR20

ADDR21

ADDR22

ADANSA1

ADDISCR

ADACSR

ADADS0

ADGSPCR

ADDBLDRA

ADDBLDRB

ADHVREFCNT

ADWINMON

ADCMPCR

ADCMPANSER

ADCMPLER

ADCMPANSR0

ADCMPANSR1

ADCMPLR0

ADCMPLR1

ADCMPDR0

ADCMPDR1

ADADS1

ADCMPSR0

ADCMPSR1

ADCMPSER

ADCMPBNSR

ADWINLLB

ADWINULB

ADCMPBSR

ADADC

ADSSTRL

ADSSTRT

ADSSTRO

ADCER

ADSSTR0

ADSSTR1

ADSSTR2

ADSSTR3

ADSSTR4

ADSSTR5

ADSSTR6

ADSSTR7

ADSSTR8

ADSSTR9

ADSSTR10


ADCSR

A/D Control Register
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCSR ADCSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DBLANS GBADIE DBLE EXTRG TRGE ADHSC ADCS ADST

DBLANS : Double Trigger Channel Select
bits : 0 - 3 (4 bit)
access : read-write

GBADIE : Group B Scan End Interrupt and ELC Event Enable
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable ADC120_GBADI interrupt generation on group B scan completion.

#1 : 1

Enable ADC120_GBADI interrupt generation on group B scan completion.

End of enumeration elements list.

DBLE : Double Trigger Mode Select
bits : 7 - 6 (0 bit)
access : read-write

Enumeration:

#0 : 0

Deselect double-trigger mode.

#1 : 1

Select double-trigger mode.

End of enumeration elements list.

EXTRG : Trigger Select
bits : 8 - 7 (0 bit)
access : read-write

Enumeration:

#0 : 0

Start A/D conversion by the synchronous trigger (ELC).

#1 : 1

Start A/D conversion by the asynchronous trigger (ADTRG0).

End of enumeration elements list.

TRGE : Trigger Start Enable
bits : 9 - 8 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable A/D conversion to be started by the synchronous or asynchronous trigger

#1 : 1

Enable A/D conversion to be started by the synchronous or asynchronous trigger

End of enumeration elements list.

ADHSC : A/D Conversion Mode Select
bits : 10 - 9 (0 bit)
access : read-write

Enumeration:

#0 : 0

High-speed A/D conversion mode

#1 : 1

Low-power A/D conversion mode

End of enumeration elements list.

ADCS : Scan Mode Select
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

#00 : 00

Single scan mode

#01 : 01

Group scan mode

#10 : 10

Continuous scan mode

#11 : 11

Setting prohibited

End of enumeration elements list.

ADST : A/D Conversion Start
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : 0

Stop A/D conversion process.

#1 : 1

Start A/D conversion process.

End of enumeration elements list.


ADSTRGR

A/D Conversion Start Trigger Select Register
address_offset : 0x10 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADSTRGR ADSTRGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRSB TRSA

TRSB : A/D Conversion Start Trigger Select for Group B
bits : 0 - 4 (5 bit)
access : read-write

TRSA : A/D Conversion Start Trigger Select
bits : 8 - 12 (5 bit)
access : read-write


ADEXICR

A/D Conversion Extended Input Control Registers
address_offset : 0x12 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADEXICR ADEXICR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TSSAD OCSAD TSSA OCSA

TSSAD : Temperature Sensor Output A/D-Converted Value Addition/Average Mode Select
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Do not select addition/average mode for temperature sensor output.

#1 : 1

Select addition/average mode for temperature sensor output.

End of enumeration elements list.

OCSAD : Internal Reference Voltage A/D-Converted Value Addition/Average Mode Select
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

Do not select addition/average mode for internal reference voltage.

#1 : 1

Select addition/average mode for internal reference voltage.

End of enumeration elements list.

TSSA : Temperature Sensor Output A/D Conversion Select
bits : 8 - 7 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable A/D conversion of temperature sensor output

#1 : 1

Enable A/D conversion of temperature sensor output

End of enumeration elements list.

OCSA : Internal Reference Voltage A/D Conversion Select
bits : 9 - 8 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable A/D conversion of internal reference voltage

#1 : 1

Enable A/D conversion of internal reference voltage

End of enumeration elements list.


ADANSB0

A/D Channel Select Register B0
address_offset : 0x14 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADANSB0 ADANSB0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ANSBn

ANSBn : A/D Conversion Channels Select
bits : 0 - 14 (15 bit)
access : read-write

Enumeration:

#0 : 0

Do not select associated input channel.

#1 : 1

Select associated input channel.

End of enumeration elements list.


ADANSB1

A/D Channel Select Register B1
address_offset : 0x16 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADANSB1 ADANSB1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ANSBn

ANSBn : A/D Conversion Channels Select
bits : 0 - 14 (15 bit)
access : read-write

Enumeration:

#0 : 0

Do not select associated input channel.

#1 : 1

Select associated input channel.

End of enumeration elements list.


ADDBLDR

A/D Data Duplexing Register
address_offset : 0x18 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDBLDR ADDBLDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDBLDR

ADDBLDR : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADTSDR

A/D Temperature Sensor Data Register
address_offset : 0x1A Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADTSDR ADTSDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADTSDR

ADTSDR : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADOCDR

A/D Internal Reference Voltage Data Register
address_offset : 0x1C Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADOCDR ADOCDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADOCDR

ADOCDR : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADRD

A/D Self-Diagnosis Data Register
address_offset : 0x1E Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADRD ADRD read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AD DIAGST

AD : Converted Value 11 to 0
bits : 0 - 10 (11 bit)
access : read-only

DIAGST : Self-Diagnosis Status
bits : 14 - 14 (1 bit)
access : read-only

Enumeration:

#00 : 00

Self-diagnosis not executed after power-on.

#01 : 01

Self-diagnosis was executed using the 0 V voltage.

#10 : 10

Self-diagnosis was executed using the reference power supply voltage x 1/2.

#11 : 11

Self-diagnosis was executed using the reference power supply voltage.

End of enumeration elements list.


ADDR0

A/D Data Registers %s
address_offset : 0x20 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDR0 ADDR0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRn

ADDRn : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADDR1

A/D Data Registers %s
address_offset : 0x22 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDR1 ADDR1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRn

ADDRn : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADDR2

A/D Data Registers %s
address_offset : 0x24 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDR2 ADDR2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRn

ADDRn : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADDR3

A/D Data Registers %s
address_offset : 0x26 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDR3 ADDR3 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRn

ADDRn : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADDR4

A/D Data Registers %s
address_offset : 0x28 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDR4 ADDR4 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRn

ADDRn : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADDR5

A/D Data Registers %s
address_offset : 0x2A Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDR5 ADDR5 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRn

ADDRn : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADDR6

A/D Data Registers %s
address_offset : 0x2C Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDR6 ADDR6 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRn

ADDRn : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADDR7

A/D Data Registers %s
address_offset : 0x2E Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDR7 ADDR7 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRn

ADDRn : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADDR8

A/D Data Registers %s
address_offset : 0x30 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDR8 ADDR8 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRn

ADDRn : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADDR9

A/D Data Registers %s
address_offset : 0x32 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDR9 ADDR9 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRn

ADDRn : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADDR10

A/D Data Registers %s
address_offset : 0x34 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDR10 ADDR10 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRn

ADDRn : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADANSA0

A/D Channel Select Register A0
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADANSA0 ADANSA0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ANSAn

ANSAn : A/D Conversion Channels Select
bits : 0 - 14 (15 bit)
access : read-write

Enumeration:

#0 : 0

Do not select associated input channel.

#1 : 1

Select associated input channel.

End of enumeration elements list.


ADCTDR

A/D CTSU TSCAP Voltage Data Register
address_offset : 0x40 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADCTDR ADCTDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCTDR

ADCTDR : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADDR17

A/D Data Registers %s
address_offset : 0x42 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDR17 ADDR17 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRn

ADDRn : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADDR18

A/D Data Registers %s
address_offset : 0x44 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDR18 ADDR18 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRn

ADDRn : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADDR19

A/D Data Registers %s
address_offset : 0x46 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDR19 ADDR19 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRn

ADDRn : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADDR20

A/D Data Registers %s
address_offset : 0x48 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDR20 ADDR20 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRn

ADDRn : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADDR21

A/D Data Registers %s
address_offset : 0x4A Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDR21 ADDR21 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRn

ADDRn : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADDR22

A/D Data Registers %s
address_offset : 0x4C Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDR22 ADDR22 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRn

ADDRn : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADANSA1

A/D Channel Select Register A1
address_offset : 0x6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADANSA1 ADANSA1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ANSAn

ANSAn : A/D Conversion Channels Select
bits : 0 - 14 (15 bit)
access : read-write

Enumeration:

#0 : 0

Do not select associated input channel.

#1 : 1

Select associated input channel.

End of enumeration elements list.


ADDISCR

A/D Disconnection Detection Control Register
address_offset : 0x7A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADDISCR ADDISCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ADNDIS PCHG

ADNDIS : Disconnection Detection Assist Setting
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0x00 : 0x00

The disconnection detection assist function is disabled

0x01 : 0x01

Setting prohibited

: Others

The number of states for the discharge or precharge period.

End of enumeration elements list.

PCHG : Precharge/discharge select
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Discharge

#1 : 1

Precharge

End of enumeration elements list.


ADACSR

A/D Conversion Operation Mode Select Register
address_offset : 0x7E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADACSR ADACSR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ADSAC

ADSAC : Successive Approximation Control Setting
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

Normal conversion mode (default)

#1 : 1

Fast conversion mode

End of enumeration elements list.


ADADS0

A/D-Converted Value Addition/Average Channel Select Register 0
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADADS0 ADADS0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADSn

ADSn : A/D-Converted Value Addition/Average Channel Select
bits : 0 - 14 (15 bit)
access : read-write

Enumeration:

#0 : 0

Do not select associated input channel.

#1 : 1

Select associated input channel.

End of enumeration elements list.


ADGSPCR

A/D Group Scan Priority Control Register
address_offset : 0x80 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADGSPCR ADGSPCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PGS GBRSCN GBRP

PGS : Group Priority Operation Setting
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Operate without group priority control.

#1 : 1

Operate with group priority control.

End of enumeration elements list.

GBRSCN : Lower-Priority Group Restart Setting
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable rescanning of the group that was stopped in group priority operation

#1 : 1

Enable rescanning of the group that was stopped in group priority operation.

End of enumeration elements list.

GBRP : Single Scan Continuous Start
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : 0

Single scan is not continuously activated.

#1 : 1

Single scan for the group with the lower-priority is continuously activated.

End of enumeration elements list.


ADDBLDRA

A/D Data Duplexing Register A
address_offset : 0x84 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDBLDRA ADDBLDRA read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDBLDRn

ADDBLDRn : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADDBLDRB

A/D Data Duplexing Register B
address_offset : 0x86 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADDBLDRB ADDBLDRB read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDBLDRn

ADDBLDRn : Converted Value 15 to 0
bits : 0 - 14 (15 bit)
access : read-only


ADHVREFCNT

A/D High-Potential/Low-Potential Reference Voltage Control Register
address_offset : 0x8A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADHVREFCNT ADHVREFCNT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 HVSEL LVSEL ADSLP

HVSEL : High-Potential Reference Voltage Select
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#00 : 00

AVCC0 is selected as the high-potential reference voltage

#01 : 01

VREFH0 is selected as the high-potential reference voltage

#10 : 10

Internal reference voltage is selected as the high-potential reference voltage

#11 : 11

No reference voltage pin is selected (internal node discharge)

End of enumeration elements list.

LVSEL : Low-Potential Reference Voltage Select
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

AVSS0 is selected as the low-potential reference voltage.

#1 : 1

VREFL0 is selected as the low-potential reference voltage.

End of enumeration elements list.

ADSLP : Sleep
bits : 7 - 6 (0 bit)
access : read-write

Enumeration:

#0 : 0

Normal operation

#1 : 1

Standby state

End of enumeration elements list.


ADWINMON

A/D Compare Function Window A/B Status Monitor Register
address_offset : 0x8C Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADWINMON ADWINMON read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MONCOMB MONCMPA MONCMPB

MONCOMB : Combination Result Monitor
bits : 0 - -1 (0 bit)
access : read-only

Enumeration:

#0 : 0

Window A/B composite conditions are not met.

#1 : 1

Window A/B composite conditions are met.

End of enumeration elements list.

MONCMPA : Comparison Result Monitor A
bits : 4 - 3 (0 bit)
access : read-only

Enumeration:

#0 : 0

Window A comparison conditions are not met.

#1 : 1

Window A comparison conditions are met.

End of enumeration elements list.

MONCMPB : Comparison Result Monitor B
bits : 5 - 4 (0 bit)
access : read-only

Enumeration:

#0 : 0

Window B comparison conditions are not met.

#1 : 1

Window B comparison conditions are met.

End of enumeration elements list.


ADCMPCR

A/D Compare Function Control Register
address_offset : 0x90 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCMPCR ADCMPCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPAB CMPBE CMPAE CMPBIE WCMPE CMPAIE

CMPAB : Window A/B Composite Conditions Setting
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#00 : 00

Output ADC120_WCMPM when window A OR window B comparison conditions are met. Otherwise, output ADC120_WCMPUM.

#01 : 01

Output ADC120_WCMPM when window A EXOR window B comparison conditions are met. Otherwise, output ADC120_WCMPUM.

#10 : 10

Output ADC120_WCMPM when window A AND window B comparison conditions are met. Otherwise, output ADC120_WCMPUM.

#11 : 11

Setting prohibited.

End of enumeration elements list.

CMPBE : Compare Window B Operation Enable
bits : 9 - 8 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable compare window B operation. Disable ADC120_WCMPM and ADC120_WCMPUM outputs.

#1 : 1

Enable compare window B operation.

End of enumeration elements list.

CMPAE : Compare Window A Operation Enable
bits : 11 - 10 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable compare window A operation. Disable ADC120_WCMPM and ADC120_WCMPUM outputs.

#1 : 1

Enable compare window A operation.

End of enumeration elements list.

CMPBIE : Compare B Interrupt Enable
bits : 13 - 12 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable ADC120_CMPBI interrupt when comparison conditions (window B) are met.

#1 : 1

Enable ADC120_CMPBI interrupt when comparison conditions (window B) are met.

End of enumeration elements list.

WCMPE : Window Function Setting
bits : 14 - 13 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable window function Window A and window B operate as a comparator to compare the single value on the lower side with the A/D conversion result.

#1 : 1

Enable window function Window A and window B operate as a comparator to compare the two values on the upper and lower sides with the A/D conversion result.

End of enumeration elements list.

CMPAIE : Compare A Interrupt Enable
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable ADC120_CMPAI interrupt when comparison conditions (window A) are met.

#1 : 1

Enable ADC120_CMPAI interrupt when comparison conditions (window A) are met.

End of enumeration elements list.


ADCMPANSER

A/D Compare Function Window A Extended Input Select Register
address_offset : 0x92 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCMPANSER ADCMPANSER read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CMPTSA CMPOCA

CMPTSA : Temperature Sensor Output Compare Select
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Exclude the temperature sensor output from the compare Window A target range.

#1 : 1

Include the temperature sensor output in the compare Window A target range.

End of enumeration elements list.

CMPOCA : Internal Reference Voltage Compare Select
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

Exclude the internal reference voltage from the compare Window A target range.

#1 : 1

Include the internal reference voltage in the compare Window A target range.

End of enumeration elements list.


ADCMPLER

A/D Compare Function Window A Extended Input Comparison Condition Setting Register
address_offset : 0x93 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCMPLER ADCMPLER read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CMPLTSA CMPLOCA

CMPLTSA : Compare Window A Temperature Sensor Output Comparison Condition Select
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

When window function is disabled (ADCMPCR.WCMPE = 0) : ADCMPDR0 value > A/D-converted valueCompare Window A Temperature Sensor Output Comparison Condition Select When window function is enabled (ADCMPCR.WCMPE = 1) : Compare Window A Temperature Sensor Output Comparison ConditionA/D-converted value < ADCMPDR0 value, or A/D-converted value > ADCMPDR1 value

#1 : 1

When window function is disabled (ADCMPCR.WCMPE = 0) : ADCMPDR0 value < A/D-converted value When window function is enabled (ADCMPCR.WCMPE = 1) : ADCMPDR0 value < A/D-converted value < ADCMPDR1 value

End of enumeration elements list.

CMPLOCA : Compare Window A Internal Reference Voltage Comparison Condition Select
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

When window function is disabled (ADCMPCR.WCMPE = 0) : ADCMPDR0 value > A/D-converted value When window function is enabled (ADCMPCR.WCMPE = 1): A/D-converted value < ADCMPDR0 value, or A/D-converted value > ADCMPDR1 value

#1 : 1

When window function is disabled (ADCMPCR.WCMPE = 0): ADCMPDR0 value < A/D-converted value When window function is enabled (ADCMPCR.WCMPE = 1): ADCMPDR0 value < A/D-converted value < ADCMPDR1 value

End of enumeration elements list.


ADCMPANSR0

A/D Compare Function Window A Channel Select Register 0
address_offset : 0x94 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCMPANSR0 ADCMPANSR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPCHAn

CMPCHAn : Compare Window A Channel Select
bits : 0 - 14 (15 bit)
access : read-write

Enumeration:

#0 : 0

Disable compare function for associated input channel

#1 : 1

Enable compare function for associated input channel

End of enumeration elements list.


ADCMPANSR1

A/D Compare Function Window A Channel Select Register 1
address_offset : 0x96 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCMPANSR1 ADCMPANSR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPCHAn

CMPCHAn : Compare Window A Channel Select
bits : 0 - 14 (15 bit)
access : read-write

Enumeration:

#0 : 0

Disable compare function for associated input channel

#1 : 1

Enable compare function for associated input channel

End of enumeration elements list.


ADCMPLR0

A/D Compare Function Window A Comparison Condition Setting Register 0
address_offset : 0x98 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCMPLR0 ADCMPLR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPLCHAn

CMPLCHAn : Compare Window A Comparison Condition Select
bits : 0 - 14 (15 bit)
access : read-write

Enumeration:

#0 : 0

When window function is disabled (ADCMPCR.WCMPE = 0): ADCMPDR0 value > A/D-converted value When window function is enabled (ADCMPCR.WCMPE = 1): A/D-converted value < ADCMPDR0 value, or ADCMPDR1 value < A/D-converted value

#1 : 1

When window function is disabled (ADCMPCR.WCMPE = 0): ADCMPDR0 value < A/D-converted value When window function is enabled (ADCMPCR.WCMPE = 1): ADCMPDR0 value < A/D-converted value < ADCMPDR1 value

End of enumeration elements list.


ADCMPLR1

A/D Compare Function Window A Comparison Condition Setting Register 1
address_offset : 0x9A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCMPLR1 ADCMPLR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPLCHAn

CMPLCHAn : Compare Window A Comparison Condition Select
bits : 0 - 14 (15 bit)
access : read-write

Enumeration:

#0 : 0

When window function is disabled (ADCMPCR.WCMPE = 0): ADCMPDR0 value > A/D-converted value When window function is enabled (ADCMPCR.WCMPE = 1): A/D-converted value < ADCMPDR0 value, or ADCMPDR1 value < A/D-converted value

#1 : 1

When window function is disabled (ADCMPCR.WCMPE = 0): ADCMPDR0 value < A/D-converted value When window function is enabled (ADCMPCR.WCMPE = 1): ADCMPDR0 value < A/D-converted value < ADCMPDR1 value

End of enumeration elements list.


ADCMPDR0

A/D Compare Function Window A Lower-Side/Upper-Side Level Setting Register
address_offset : 0x9C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCMPDR0 ADCMPDR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCMPDR1

A/D Compare Function Window A Lower-Side/Upper-Side Level Setting Register
address_offset : 0x9E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCMPDR1 ADCMPDR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADADS1

A/D-Converted Value Addition/Average Channel Select Register 1
address_offset : 0xA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADADS1 ADADS1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADSn

ADSn : A/D-Converted Value Addition/Average Channel Select
bits : 0 - 14 (15 bit)
access : read-write

Enumeration:

#0 : 0

Do not select associated input channel.

#1 : 1

Select associated input channel.

End of enumeration elements list.


ADCMPSR0

A/D Compare Function Window A Channel Status Register 0
address_offset : 0xA0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCMPSR0 ADCMPSR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPSTCHAn

CMPSTCHAn : Compare Window A Flag
bits : 0 - 14 (15 bit)
access : read-write

Enumeration:

#0 : 0

Comparison conditions are not met.

#1 : 1

Comparison conditions are met.

End of enumeration elements list.


ADCMPSR1

A/D Compare Function Window A Channel Status Register1
address_offset : 0xA2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCMPSR1 ADCMPSR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPSTCHAn

CMPSTCHAn : Compare Window A Flag
bits : 0 - 14 (15 bit)
access : read-write

Enumeration:

#0 : 0

Comparison conditions are not met.

#1 : 1

Comparison conditions are met.

End of enumeration elements list.


ADCMPSER

A/D Compare Function Window A Extended Input Channel Status Register
address_offset : 0xA4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCMPSER ADCMPSER read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CMPSTTSA CMPSTOCA

CMPSTTSA : Compare Window A Temperature Sensor Output Compare Flag
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Comparison conditions are not met.

#1 : 1

Comparison conditions are met.

End of enumeration elements list.

CMPSTOCA : Compare Window A Internal Reference Voltage Compare Flag
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

Comparison conditions are not met.

#1 : 1

Comparison conditions are met.

End of enumeration elements list.


ADCMPBNSR

A/D Compare Function Window B Channel Select Register
address_offset : 0xA6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCMPBNSR ADCMPBNSR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CMPCHB CMPLB

CMPCHB : Compare Window B Channel Select
bits : 0 - 4 (5 bit)
access : read-write

CMPLB : Compare Window B Comparison Condition Setting
bits : 7 - 6 (0 bit)
access : read-write

Enumeration:

#0 : 0

When window function is disabled (ADCMPCR.WCMPE = 0): ADWINLLB value > A/D-converted value When window function is enabled (ADCMPCR.WCMPE = 1): A/D-converted value < ADWINLLB value, or ADWINULB value < A/D-converted value

#1 : 1

When window function is disabled (ADCMPCR.WCMPE = 0): ADWINLLB value < A/D-converted value When window function is enabled (ADCMPCR.WCMPE = 1): ADWINLLB value < A/D-converted value < ADWINULB value

End of enumeration elements list.


ADWINLLB

A/D Compare Function Window B Lower-Side/Upper-Side Level Setting Register
address_offset : 0xA8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADWINLLB ADWINLLB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADWINULB

A/D Compare Function Window B Lower-Side/Upper-Side Level Setting Register
address_offset : 0xAA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADWINULB ADWINULB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCMPBSR

A/D Compare Function Window B Status Register
address_offset : 0xAC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCMPBSR ADCMPBSR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CMPSTB

CMPSTB : Compare Window B Flag
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Comparison conditions are not met.

#1 : 1

Comparison conditions are met.

End of enumeration elements list.


ADADC

A/D-Converted Value Addition/Average Count Select Register
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADADC ADADC read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ADC AVEE

ADC : Addition/Average Count Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#000 : 000

1-time conversion (no addition, same as normal conversion)

#001 : 001

2-time conversion (one addition)

#010 : 010

3-time conversion (two additions)

#011 : 011

4-time conversion (three additions)

#101 : 101

16-time conversion (15 additions)

: Others

Setting prohibited

End of enumeration elements list.

AVEE : Average Mode Select
bits : 7 - 6 (0 bit)
access : read-write

Enumeration:

#0 : 0

Enable addition mode

#1 : 1

Enable average mode

End of enumeration elements list.


ADSSTRL

A/D Sampling State Register
address_offset : 0xDD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADSSTRL ADSSTRL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SST

SST : Sampling Time Setting
bits : 0 - 6 (7 bit)
access : read-write


ADSSTRT

A/D Sampling State Register
address_offset : 0xDE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADSSTRT ADSSTRT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SST

SST : Sampling Time Setting
bits : 0 - 6 (7 bit)
access : read-write


ADSSTRO

A/D Sampling State Register
address_offset : 0xDF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADSSTRO ADSSTRO read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SST

SST : Sampling Time Setting
bits : 0 - 6 (7 bit)
access : read-write


ADCER

A/D Control Extended Register
address_offset : 0xE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCER ADCER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACE DIAGVAL DIAGLD DIAGM ADRFMT

ACE : A/D Data Register Automatic Clearing Enable
bits : 5 - 4 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable automatic clearing

#1 : 1

Enable automatic clearing

End of enumeration elements list.

DIAGVAL : Self-Diagnosis Conversion Voltage Select
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

#00 : 00

Setting prohibited when self-diagnosis is enabled

#01 : 01

0 volts

#10 : 10

Reference power supply voltage × 1/2

#11 : 11

Reference power supply voltage

End of enumeration elements list.

DIAGLD : Self-Diagnosis Mode Select
bits : 10 - 9 (0 bit)
access : read-write

Enumeration:

#0 : 0

Select rotation mode for self-diagnosis voltage

#1 : 1

Select mixed mode for self-diagnosis voltage

End of enumeration elements list.

DIAGM : Self-Diagnosis Enable
bits : 11 - 10 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable ADC12 self-diagnosis

#1 : 1

Enable ADC12 self-diagnosis

End of enumeration elements list.

ADRFMT : A/D Data Register Format Select
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : 0

Select right-justified for the A/D data register format

#1 : 1

Select left-justified for the A/D data register format

End of enumeration elements list.


ADSSTR0

A/D Sampling State Register
address_offset : 0xE0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADSSTR0 ADSSTR0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SST

SST : Sampling Time Setting
bits : 0 - 6 (7 bit)
access : read-write


ADSSTR1

A/D Sampling State Register
address_offset : 0xE1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADSSTR1 ADSSTR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SST

SST : Sampling Time Setting
bits : 0 - 6 (7 bit)
access : read-write


ADSSTR2

A/D Sampling State Register
address_offset : 0xE2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADSSTR2 ADSSTR2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SST

SST : Sampling Time Setting
bits : 0 - 6 (7 bit)
access : read-write


ADSSTR3

A/D Sampling State Register
address_offset : 0xE3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADSSTR3 ADSSTR3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SST

SST : Sampling Time Setting
bits : 0 - 6 (7 bit)
access : read-write


ADSSTR4

A/D Sampling State Register
address_offset : 0xE4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADSSTR4 ADSSTR4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SST

SST : Sampling Time Setting
bits : 0 - 6 (7 bit)
access : read-write


ADSSTR5

A/D Sampling State Register
address_offset : 0xE5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADSSTR5 ADSSTR5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SST

SST : Sampling Time Setting
bits : 0 - 6 (7 bit)
access : read-write


ADSSTR6

A/D Sampling State Register
address_offset : 0xE6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADSSTR6 ADSSTR6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SST

SST : Sampling Time Setting
bits : 0 - 6 (7 bit)
access : read-write


ADSSTR7

A/D Sampling State Register
address_offset : 0xE7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADSSTR7 ADSSTR7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SST

SST : Sampling Time Setting
bits : 0 - 6 (7 bit)
access : read-write


ADSSTR8

A/D Sampling State Register
address_offset : 0xE8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADSSTR8 ADSSTR8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SST

SST : Sampling Time Setting
bits : 0 - 6 (7 bit)
access : read-write


ADSSTR9

A/D Sampling State Register
address_offset : 0xE9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADSSTR9 ADSSTR9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SST

SST : Sampling Time Setting
bits : 0 - 6 (7 bit)
access : read-write


ADSSTR10

A/D Sampling State Register
address_offset : 0xEA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADSSTR10 ADSSTR10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SST

SST : Sampling Time Setting
bits : 0 - 6 (7 bit)
access : read-write



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.