\n
address_offset : 0x0 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x4 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x8 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xC Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
CRC Control Register 0
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPS : CRC Generating Polynomial Switching
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
#001 : 001
8-bit CRC-8 (X8 + X2 + X + 1)
#010 : 010
16-bit CRC-16 (X16 + X15 + X2 + 1)
#011 : 011
16-bit CRC-CCITT (X16 + X12 + X5 + 1)
#100 : 100
32-bit CRC-32 (X32 + X26 + X23 + X22 + X16 + X12 + X11 +X10 + X8 + X7 + X5 + X4 + X2 + X + 1)
#101 : 101
32-bit CRC-32C (X32 + X28 + X27 + X26 + X25 + X23 + X22 + X20 + X19 + X18 + X14 + X13 + X11 + X10 + X9 + X8 + X6 + 1)
: Others
No calculation is executed
End of enumeration elements list.
LMS : CRC Calculation Switching
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
Generate CRC code for LSB-first communication
#1 : 1
Generate CRC code for MSB-first communication
End of enumeration elements list.
DORCLR : CRCDOR/CRCDOR_HA/CRCDOR_BY Register Clear
bits : 7 - 6 (0 bit)
access : write-only
Enumeration:
#0 : 0
No effect
#1 : 1
Clear the CRCDOR/CRCDOR_HA/CRCDOR_BY register
End of enumeration elements list.
CRC Control Register 1
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CRCSWR : Snoop-On-Write/Read Switch
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
Snoop-on-read
#1 : 1
Snoop-on-write
End of enumeration elements list.
CRCSEN : Snoop Enable
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disabled
#1 : 1
Enabled
End of enumeration elements list.
CRC Data Input Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CRC Data Input Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CRCDIR
reset_Mask : 0x0
CRC Data Output Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CRC Data Output Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : CRCDOR
reset_Mask : 0x0
CRC Data Output Register
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CRCDOR
reset_Mask : 0x0
Snoop Address Register
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CRCSA : Register Snoop Address
bits : 0 - 12 (13 bit)
access : read-write
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