\n
address_offset : 0x0 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x40 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x200 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
C-Cache Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENC : C-Cache Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable C-cache
#1 : 1
Enable C-cache
End of enumeration elements list.
Cache Parity Error Operation After Detection Register
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OAD : Operation after Detection
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Non-maskable interrupt
#1 : 1
Reset
End of enumeration elements list.
Cache Protection Register
address_offset : 0x204 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRCR : Register Write Control
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable writes to protected registers
#1 : 1
Enable writes to protected registers
End of enumeration elements list.
KW : Write key code
bits : 1 - 6 (6 bit)
access : read-write
C-Cache Flush Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FC : C-Cache Flush
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
No action
#1 : 1
C-cache line flush (all lines invalidated)
End of enumeration elements list.
S-Cache Control Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENS : S-Cache Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable S-cache
#1 : 1
Enable S-cache
End of enumeration elements list.
S-Cache Flush Control Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FS : S-Cache Flush
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
No action
#1 : 1
S-cache line flush (all lines invalidated)
End of enumeration elements list.
S-Cache Line Configuration Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CS : S-Cache Line Size
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#00 : 00
Prohibited
#01 : 01
Cache line size 32 bytes
#10 : 10
Cache line size 64 bytes
#11 : 11
Prohibited
End of enumeration elements list.
C-Cache Line Configuration Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CC : C-Cache Line Size
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#00 : 00
Prohibited
#01 : 01
Cache line size 32 bytes
#10 : 10
Cache line size 64 bytes
#11 : 11
Prohibited
End of enumeration elements list.
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