Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x7 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x8 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x1C Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x10C0 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
D/A Data Register %s
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
D/A A/D Synchronous Unit Select Register
address_offset : 0x10C0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AMADSEL0 : A/D Unit 0 Select
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not select unit 0
#1 : 1
Select unit 0
End of enumeration elements list.
D/A Amplifier Stabilization Wait Control Register
address_offset : 0x1C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAASW0 : D/A Amplifier Stabilization Wait 0
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
Amplifier stabilization wait off (output) for channel 0
#1 : 1
Amplifier stabilization wait on (high-Z) for channel 0
End of enumeration elements list.
DAASW1 : D/A Amplifier Stabilization Wait 1
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
#0 : 0
Amplifier stabilization wait off (output) for channel 1
#1 : 1
Amplifier stabilization wait on (high-Z) for channel 1
End of enumeration elements list.
D/A Data Register %s
address_offset : 0x2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
D/A Control Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAE : D/A Enable
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
#0 : 0
Control D/A conversion of channels 0 and 1 individually
#1 : 1
Control D/A conversion of channels 0 and 1 collectively
End of enumeration elements list.
DAOE0 : D/A Output Enable 0
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable analog output of channel 0 (DA0)
#1 : 1
Enable D/A conversion of channel 0 (DA0)
End of enumeration elements list.
DAOE1 : D/A Output Enable 1
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable analog output of channel 1 (DA1)
#1 : 1
Enable D/A conversion of channel 1 (DA1)
End of enumeration elements list.
DADRn Format Select Register
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DPSEL : DADRn Format Select
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
#0 : 0
Right-justified format
#1 : 1
Left-justified format
End of enumeration elements list.
D/A A/D Synchronous Start Control Register
address_offset : 0x6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAADST : D/A A/D Synchronous Conversion
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not synchronize DAC12 with ADC12 operation (disable interference reduction between D/A and A/D conversion).
#1 : 1
Synchronize DAC12 with ADC12 operation (enable interference reduction between D/A and A/D conversion).
End of enumeration elements list.
D/A Output Amplifier Control Register
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAAMP0 : Amplifier Control 0
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not use channel 0 output amplifier
#1 : 1
Use channel 0 output amplifier
End of enumeration elements list.
DAAMP1 : Amplifier Control 1
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not use channel 1 output amplifier
#1 : 1
Use channel 1 output amplifier
End of enumeration elements list.
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