\n
address_offset : 0x0 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x40 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :
DMA Module Activation Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMST : DMAC Operation Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
DMAC activation is disabled
#1 : 1
DMAC activation is enabled
End of enumeration elements list.
DMAC Error Channel Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMECH : DMAC Error channel
bits : 0 - 1 (2 bit)
access : read-only
DMECHSAM : DMAC Error channel Security Attribution Monitor
bits : 8 - 7 (0 bit)
access : read-only
Enumeration:
#0 : 0
secure channel
#1 : 1
non-secure channel
End of enumeration elements list.
DMESTA : DMAC Error Status
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
#0 : 0
No DMA transfer error occurred
#1 : 1
DMA transfer error occurred
End of enumeration elements list.
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