Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x243 byte (0x0)
mem_usage : registers
protection :
P000 Pin Function Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
DSCR : Drive Strength Control Register
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#00 : 00
Normal drive output
#01 : 01
Middle drive output
#10 : 10
Extra high drive
#11 : 11
High-drive output
End of enumeration elements list.
Reserved : These bits are read as 00. The write value should be 00.
bits : 12 - 12 (1 bit)
access : read-write
ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Not used as IRQn input pin
#1 : 1
Used as IRQn input pin
End of enumeration elements list.
ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Used other than as analog pin
#1 : 1
Used as analog pin
End of enumeration elements list.
PMR : Port Mode Control
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
#0 : 0
Uses the pin as a general I/O pin.
#1 : 1
Uses the pin as an I/O port for peripheral functions.
End of enumeration elements list.
Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 17 - 22 (6 bit)
access : read-write
PSEL : Port Function SelectThese bits select the peripheral function. For individual pin functions, see the MPC table
bits : 24 - 27 (4 bit)
access : read-write
Reserved : These bits are read as 000. The write value should be 000.
bits : 29 - 30 (2 bit)
access : read-write
Reserved : These bits are read as 000. The write value should be 000.
bits : 29 - 30 (2 bit)
access : read-write
P00%s Pin Function Control Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x102 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x103 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x106 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x107 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x10A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x10B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x10E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x10F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x112 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x113 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x116 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x117 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x11A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x11B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x11E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x11F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x12 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x122 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x123 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x126 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x127 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x12A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x12B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x12C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x12E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x12F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x13 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x132 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x133 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x136 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x137 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x13A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x13B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x13C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x13E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x13F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P4%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x142 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x143 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x144 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x146 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x147 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x14A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x14B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x14E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x14F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x152 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x153 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x154 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x156 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x157 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x15A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x15B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x15C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x15E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x15F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x16 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x162 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x163 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x164 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x166 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x167 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x168 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x16A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P5%sPFS
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x16B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P5%sPFS
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x16C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x16E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P5%sPFS
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x16F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P5%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x17 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x170 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x172 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P5%sPFS
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x173 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P5%sPFS
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x174 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x176 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P5%sPFS
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x177 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P5%sPFS
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x178 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x17A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P5%sPFS
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x17B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P5%sPFS
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x17C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x17E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P5%sPFS
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x17F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P5%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x182 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x183 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x184 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x186 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x187 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x188 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x18A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x18B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x18C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x18E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x18F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x190 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x192 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x193 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x194 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x196 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x197 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x198 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x19A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x19B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x19C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x19E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x19F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x1A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x1A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x1A2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x1A3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x1A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x1A6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x1A7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x1A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x1AA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x1AB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x1AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x1AE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x1AF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x1B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x1B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x1B2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x1B3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x1B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x1B6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x1B7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x1B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x1BA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x1BB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x1BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x1BE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x1BF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1C2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1C3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1C6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1C7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1CA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1CB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1CE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1CF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1D2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1D3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1D6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1D7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1DA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1DB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1DC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1DE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1DF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x1E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1E2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1E3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1E6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x1E7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x1E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x1EA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P7%sPFS
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x1EB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P7%sPFS
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x1EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x1EE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P7%sPFS
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x1EF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P7%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x1F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x1F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x1F2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P7%sPFS
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x1F3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P7%sPFS
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x1F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x1F6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P7%sPFS
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x1F7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P7%sPFS
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x1F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x1FA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P7%sPFS
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x1FB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P7%sPFS
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x1FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x1FE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P7%sPFS
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x1FF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P7%sPFS
reset_Mask : 0x0
P000 Pin Function Control Register
address_offset : 0x2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P000PFS
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
DSCR : Drive Strength Control Register
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#00 : 00
Normal drive output
#01 : 01
Middle drive output
#10 : 10
Extra high drive
#11 : 11
High-drive output
End of enumeration elements list.
Reserved : These bits are read as 00. The write value should be 00.
bits : 12 - 12 (1 bit)
access : read-write
Reserved : These bits are read as 00. The write value should be 00.
bits : 12 - 12 (1 bit)
access : read-write
ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Not used as IRQn input pin
#1 : 1
Used as IRQn input pin
End of enumeration elements list.
ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Used other than as analog pin
#1 : 1
Used as analog pin
End of enumeration elements list.
P00%s Pin Function Control Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x202 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x203 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x204 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x206 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x207 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x20A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x20B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x20E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x20F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x210 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x212 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x213 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x214 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x216 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x217 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x218 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x21A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x21B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x21C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x21E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x21F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x22 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x220 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x222 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x223 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x224 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x226 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x227 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P8%s Pin Function Control Register
address_offset : 0x228 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P8%s Pin Function Control Register
address_offset : 0x22A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P8%sPFS
reset_Mask : 0x0
P8%s Pin Function Control Register
address_offset : 0x22B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P8%sPFS
reset_Mask : 0x0
P8%s Pin Function Control Register
address_offset : 0x22C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P8%s Pin Function Control Register
address_offset : 0x22E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P8%sPFS
reset_Mask : 0x0
P8%s Pin Function Control Register
address_offset : 0x22F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P8%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x23 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P8%s Pin Function Control Register
address_offset : 0x230 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P8%s Pin Function Control Register
address_offset : 0x232 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P8%sPFS
reset_Mask : 0x0
P8%s Pin Function Control Register
address_offset : 0x233 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P8%sPFS
reset_Mask : 0x0
P8%s Pin Function Control Register
address_offset : 0x234 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P8%s Pin Function Control Register
address_offset : 0x236 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P8%sPFS
reset_Mask : 0x0
P8%s Pin Function Control Register
address_offset : 0x237 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P8%sPFS
reset_Mask : 0x0
P8%s Pin Function Control Register
address_offset : 0x238 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P8%s Pin Function Control Register
address_offset : 0x23A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P8%sPFS
reset_Mask : 0x0
P8%s Pin Function Control Register
address_offset : 0x23B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P8%sPFS
reset_Mask : 0x0
P8%s Pin Function Control Register
address_offset : 0x23C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P8%s Pin Function Control Register
address_offset : 0x23E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P8%sPFS
reset_Mask : 0x0
P8%s Pin Function Control Register
address_offset : 0x23F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P8%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x26 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x27 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x2A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x2B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x2E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x2F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P000 Pin Function Control Register
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P000PFS
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 7 - 6 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 7 - 6 (0 bit)
access : read-write
P0%s Pin Function Control Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x32 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x33 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x36 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x37 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x3A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x3B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x3E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x3F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P100 Pin Function Control Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
DSCR : Drive Strength Control Register
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#00 : 00
Normal drive output
#01 : 01
Middle drive output
#10 : 10
Extra high drive
#11 : 11
High-drive output
End of enumeration elements list.
EOFR : Event on Falling/Event on Rising
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#00 : 00
No need to care
#01 : 01
Detect rising edge
#10 : 10
Detect falling edge
#11 : 11
Detect both edges
End of enumeration elements list.
ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Not used as IRQn input pin
#1 : 1
Used as IRQn input pin
End of enumeration elements list.
ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Used other than as analog pin
#1 : 1
Used as analog pin
End of enumeration elements list.
PMR : Port Mode Control
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
#0 : 0
Uses the pin as a general I/O pin.
#1 : 1
Uses the pin as an I/O port for peripheral functions.
End of enumeration elements list.
Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 17 - 22 (6 bit)
access : read-write
PSEL : Port Function SelectThese bits select the peripheral function. For individual pin functions, see the MPC table
bits : 24 - 27 (4 bit)
access : read-write
Reserved : These bits are read as 000. The write value should be 000.
bits : 29 - 30 (2 bit)
access : read-write
Reserved : These bits are read as 000. The write value should be 000.
bits : 29 - 30 (2 bit)
access : read-write
P100 Pin Function Control Register
address_offset : 0x42 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
DSCR : Drive Strength Control Register
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#00 : 00
Normal drive output
#01 : 01
Middle drive output
#10 : 10
Extra high drive
#11 : 11
High-drive output
End of enumeration elements list.
EOFR : Event on Falling/Event on Rising
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#00 : 00
No need to care
#01 : 01
Detect rising edge
#10 : 10
Detect falling edge
#11 : 11
Detect both edges
End of enumeration elements list.
ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Not used as IRQn input pin
#1 : 1
Used as IRQn input pin
End of enumeration elements list.
ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Used other than as analog pin
#1 : 1
Used as analog pin
End of enumeration elements list.
P100 Pin Function Control Register
address_offset : 0x43 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 7 - 6 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 7 - 6 (0 bit)
access : read-write
P10%s Pin Function Control Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x46 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x47 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x4A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x4B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x4E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x4F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x52 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x53 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x56 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x57 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x5A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x5B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x5E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x5F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P108 Pin Function Control Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
DSCR : Drive Strength Control Register
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#00 : 00
Normal drive output
#01 : 01
Middle drive output
#10 : 10
Extra high drive
#11 : 11
High-drive output
End of enumeration elements list.
EOFR : Event on Falling/Event on Rising
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#00 : 00
No need to care
#01 : 01
Detect rising edge
#10 : 10
Detect falling edge
#11 : 11
Detect both edges
End of enumeration elements list.
ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Not used as IRQn input pin
#1 : 1
Used as IRQn input pin
End of enumeration elements list.
ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Used other than as analog pin
#1 : 1
Used as analog pin
End of enumeration elements list.
PMR : Port Mode Control
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
#0 : 0
Uses the pin as a general I/O pin.
#1 : 1
Uses the pin as an I/O port for peripheral functions.
End of enumeration elements list.
Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 17 - 22 (6 bit)
access : read-write
PSEL : Port Function SelectThese bits select the peripheral function. For individual pin functions, see the MPC table
bits : 24 - 27 (4 bit)
access : read-write
Reserved : These bits are read as 000. The write value should be 000.
bits : 29 - 30 (2 bit)
access : read-write
Reserved : These bits are read as 000. The write value should be 000.
bits : 29 - 30 (2 bit)
access : read-write
P108 Pin Function Control Register
address_offset : 0x62 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P108PFS
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
DSCR : Drive Strength Control Register
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#00 : 00
Normal drive output
#01 : 01
Middle drive output
#10 : 10
Extra high drive
#11 : 11
High-drive output
End of enumeration elements list.
EOFR : Event on Falling/Event on Rising
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#00 : 00
No need to care
#01 : 01
Detect rising edge
#10 : 10
Detect falling edge
#11 : 11
Detect both edges
End of enumeration elements list.
ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Not used as IRQn input pin
#1 : 1
Used as IRQn input pin
End of enumeration elements list.
ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Used other than as analog pin
#1 : 1
Used as analog pin
End of enumeration elements list.
P108 Pin Function Control Register
address_offset : 0x63 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P108PFS
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 7 - 6 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 7 - 6 (0 bit)
access : read-write
P109 Pin Function Control Register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P109 Pin Function Control Register
address_offset : 0x66 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P109PFS
reset_Mask : 0x0
P109 Pin Function Control Register
address_offset : 0x67 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P109PFS
reset_Mask : 0x0
P110 Pin Function Control Register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
DSCR : Drive Strength Control Register
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#00 : 00
Normal drive output
#01 : 01
Middle drive output
#10 : 10
Extra high drive
#11 : 11
High-drive output
End of enumeration elements list.
EOFR : Event on Falling/Event on Rising
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#00 : 00
No need to care
#01 : 01
Detect rising edge
#10 : 10
Detect falling edge
#11 : 11
Detect both edges
End of enumeration elements list.
ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Not used as IRQn input pin
#1 : 1
Used as IRQn input pin
End of enumeration elements list.
ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Used other than as analog pin
#1 : 1
Used as analog pin
End of enumeration elements list.
PMR : Port Mode Control
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
#0 : 0
Uses the pin as a general I/O pin.
#1 : 1
Uses the pin as an I/O port for peripheral functions.
End of enumeration elements list.
Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 17 - 22 (6 bit)
access : read-write
PSEL : Port Function SelectThese bits select the peripheral function. For individual pin functions, see the MPC table
bits : 24 - 27 (4 bit)
access : read-write
Reserved : These bits are read as 000. The write value should be 000.
bits : 29 - 30 (2 bit)
access : read-write
Reserved : These bits are read as 000. The write value should be 000.
bits : 29 - 30 (2 bit)
access : read-write
P110 Pin Function Control Register
address_offset : 0x6A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P110PFS
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
DSCR : Drive Strength Control Register
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#00 : 00
Normal drive output
#01 : 01
Middle drive output
#10 : 10
Extra high drive
#11 : 11
High-drive output
End of enumeration elements list.
EOFR : Event on Falling/Event on Rising
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#00 : 00
No need to care
#01 : 01
Detect rising edge
#10 : 10
Detect falling edge
#11 : 11
Detect both edges
End of enumeration elements list.
ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Not used as IRQn input pin
#1 : 1
Used as IRQn input pin
End of enumeration elements list.
ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Used other than as analog pin
#1 : 1
Used as analog pin
End of enumeration elements list.
P110 Pin Function Control Register
address_offset : 0x6B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P110PFS
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 7 - 6 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 7 - 6 (0 bit)
access : read-write
P1%s Pin Function Control Register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x6E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x6F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x72 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x73 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x76 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x77 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x7A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x7B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x7E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x7F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P200 Pin Function Control Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P200 Pin Function Control Register
address_offset : 0x82 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P200PFS
reset_Mask : 0x0
P200 Pin Function Control Register
address_offset : 0x83 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P200PFS
reset_Mask : 0x0
P201 Pin Function Control Register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
DSCR : Drive Strength Control Register
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#00 : 00
Normal drive output
#01 : 01
Middle drive output
#10 : 10
Extra high drive
#11 : 11
High-drive output
End of enumeration elements list.
EOFR : Event on Falling/Event on Rising
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#00 : 00
No need to care
#01 : 01
Detect rising edge
#10 : 10
Detect falling edge
#11 : 11
Detect both edges
End of enumeration elements list.
ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Not used as IRQn input pin
#1 : 1
Used as IRQn input pin
End of enumeration elements list.
ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Used other than as analog pin
#1 : 1
Used as analog pin
End of enumeration elements list.
PMR : Port Mode Control
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
#0 : 0
Uses the pin as a general I/O pin.
#1 : 1
Uses the pin as an I/O port for peripheral functions.
End of enumeration elements list.
Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 17 - 22 (6 bit)
access : read-write
PSEL : Port Function SelectThese bits select the peripheral function. For individual pin functions, see the MPC table
bits : 24 - 27 (4 bit)
access : read-write
Reserved : These bits are read as 000. The write value should be 000.
bits : 29 - 30 (2 bit)
access : read-write
Reserved : These bits are read as 000. The write value should be 000.
bits : 29 - 30 (2 bit)
access : read-write
P201 Pin Function Control Register
address_offset : 0x86 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P201PFS
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
DSCR : Drive Strength Control Register
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#00 : 00
Normal drive output
#01 : 01
Middle drive output
#10 : 10
Extra high drive
#11 : 11
High-drive output
End of enumeration elements list.
EOFR : Event on Falling/Event on Rising
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#00 : 00
No need to care
#01 : 01
Detect rising edge
#10 : 10
Detect falling edge
#11 : 11
Detect both edges
End of enumeration elements list.
ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Not used as IRQn input pin
#1 : 1
Used as IRQn input pin
End of enumeration elements list.
ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Used other than as analog pin
#1 : 1
Used as analog pin
End of enumeration elements list.
P201 Pin Function Control Register
address_offset : 0x87 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P201PFS
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 7 - 6 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 7 - 6 (0 bit)
access : read-write
P20%s Pin Function Control Register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x8A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x8B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x8E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x8F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x92 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x93 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x96 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x97 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x9A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x9B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x9E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x9F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0xA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0xA2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0xA3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0xA6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0xA7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0xAA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0xAB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0xAE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0xAF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0xB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0xB2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0xB3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0xB6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0xB7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0xBA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0xBB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0xBE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0xBF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P300 Pin Function Control Register
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P300 Pin Function Control Register
address_offset : 0xC2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P300PFS
reset_Mask : 0x0
P300 Pin Function Control Register
address_offset : 0xC3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P300PFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xC6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xC7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xCA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xCB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xCE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xCF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xD2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xD3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xD6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xD7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xDA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xDB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xDE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xDF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0xE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xE2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xE3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xE6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xE7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xEA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xEB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xEE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xEF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0xF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0xF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xF2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xF3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xF6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xF7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xFA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xFB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xFE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0xFF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
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