Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x54 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x58 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection :
address_offset : 0x68 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection :
address_offset : 0x1B0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x1C0 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x1E0 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection :
Command Type Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMDIDX : Command IndexThese bits specify Command Format[45:40] (command index).[Examples]CMD6: SD_CMD[7:0] = 8'b00_000110CMD18: SD_CMD[7:0] = 8'b00_010010ACMD13: SD_CMD[7:0] = 8'b01_001101
bits : 0 - 4 (5 bit)
access : read-write
ACMD : Command Type Select
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#00 : 00
CMD
#01 : 01
ACMD
: others
Setting prohibited
End of enumeration elements list.
RSPTP : Mode/Response TypeNOTE: As some commands cannot be used in normal mode, see section 1.4.10, Example of SD_CMD Register Setting to select mode/response type.
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
#000 : 000
Normal mode The response type and the transfer mode are selected by SD_CMD[7:0], and the SD_CMD[15:11] setting is disabled.
#011 : 011
Expansion mode and no response
#100 : 100
Expansion mode and R1, R5, R6, or R7 response
#101 : 101
Expansion mode and R1b response
#110 : 110
Expansion mode and R2 response
#111 : 111
Expansion mode and R3 or R4 response
: others
Settings prohibited.
End of enumeration elements list.
CMDTP : Data Mode (Command Type)
bits : 11 - 10 (0 bit)
access : read-write
Enumeration:
#0 : 0
Command does not include data transfer (bc, bcr, or ac)
#1 : 1
Command includes data transfer (adtc)
End of enumeration elements list.
CMDRW : Write/Read Mode (enabled when the command with data is handled)
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
#0 : 0
Write (SD/MMC host interface -> SD card/MMC)
#1 : 1
Read (SD/MMC host interface <- SD card/MMC)
End of enumeration elements list.
TRSTP : Single/Multiple Block Transfer (enabled when the command with data is handled)
bits : 13 - 12 (0 bit)
access : read-write
Enumeration:
#0 : 0
Single block transfer
#1 : 1
Multiple block transfer
End of enumeration elements list.
CMD12AT : Multiple Block Transfer Mode (enabled at multiple block transfer)
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
#00 : 00
CMD12 is automatically issued at multiple block transfer.
#01 : 01
CMD12 is not automatically issued at multiple block transfer.
#10 : 10
Setting prohibited
#11 : 11
Setting prohibited
End of enumeration elements list.
Reserved : These bits are read as 0000000000000000. The write value should be 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-write
Data Stop Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STP : Stop- When STP is set to 1 during multiple block transfer, CMD12 is issued to halt the transfer through the SD host interface.However, if a command sequence is halted because of a communications error or timeout, CMD12 is not issued. Although continued buffer access is possible even after STP has been set to 1, the buffer access error bit (ERR5 or ERR4) in SD_INFO2 will be set accordingly.- When STP has been set to 1 during transfer for single block write, the access end flag is set when SD_BUF becomes empty, and CMD12 is not issued. If SD_BUF does contain data, the access end flag is set on completion of reception of the busy state without CMD12 having been issued.- When STP has been set to 1 during transfer for single block read, the access end flag is set immediately after setting of the STP bit and CMD12 is not issued.- When STP is set to 1 during reception of the busy state after an R1b response, the access end flag is set on completion of reception of the busy state without CMD12 having been issued.- When STP is set to 1 after a command sequence has been completed, CMD12 is not issued and the access end flag is not set.- Set STP to 1 after the response end flag has been set.- Set STP to 0 after the response end flag has been set.
bits : 0 - -1 (0 bit)
access : read-write
SEC : Block Count EnableSet SEC to 1 at multiple block transfer.When SD_CMD is set as follows to start the command sequence while SEC is set to 1, CMD12 is automatically issued to stop multi-block transfer with the number of blocks which is set to SD_SECCNT.1. CMD18 or CMD25 in normal mode (SD_CMD[10:8] = 000)2. SD_CMD[15:13] = 001 in extended mode (CMD12 is automatically issued, multiple block transfer)When the command sequence is halted because of a communications error or timeout, CMD12 is not automatically issued.NOTE: Do not change the value of this bit when the CBSY bit in SD_INFO2 is set to 1.
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables SD_SECCNT setting value.
#1 : 1
Enables SD_SECCNT setting value.
End of enumeration elements list.
Reserved : These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000.
bits : 9 - 30 (22 bit)
access : read-write
Reserved : These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000.
bits : 9 - 30 (22 bit)
access : read-write
Block Count Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SD_SECCNT : Number of Transfer BlocksNOTE: Do not change the value of this bit when the CBSY bit in SD_INFO2 is set to 1.
bits : 0 - 30 (31 bit)
access : read-write
SD Card Response Register 10
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SD_RSP10 : Store the response from the SD card/MMC
bits : 0 - 30 (31 bit)
access : read-only
DMA Mode Enable Register
address_offset : 0x1B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAEN : SD_BUF Read/Write DMA Transfer
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
The SD_BUF read/write DMA transfer is disabled.
#1 : 1
The SD_BUF read/write DMA transfer is enabled.
End of enumeration elements list.
Reserved : These bits are read as 00. The write value should be 00.
bits : 2 - 2 (1 bit)
access : read-write
Reserved : This bit is read as 1. The write value should be 1.
bits : 4 - 3 (0 bit)
access : read-write
Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 5 - 10 (6 bit)
access : read-write
Reserved : This bit is read as 1. The write value should be 1.
bits : 12 - 11 (0 bit)
access : read-write
Reserved : These bits are read as 0000000000000000000. The write value should be 0000000000000000000.
bits : 13 - 30 (18 bit)
access : read-write
Reserved : These bits are read as 0000000000000000000. The write value should be 0000000000000000000.
bits : 13 - 30 (18 bit)
access : read-write
SD Card Response Register 1
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SD_RSP1 : Store the response from the SD card/MMC
bits : 0 - 14 (15 bit)
access : read-only
Reserved : These bits are read as 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-only
Software Reset Register
address_offset : 0x1C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDRST : Software Reset of SD I/F Unit
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Reset
#1 : 1
Reset released
End of enumeration elements list.
Reserved : These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000.
bits : 3 - 30 (28 bit)
access : read-write
Reserved : These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000.
bits : 3 - 30 (28 bit)
access : read-write
SD Interface Mode Setting Register
address_offset : 0x1CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 1 - 6 (6 bit)
access : read-write
NOCHKCR : CRC Check Mask (for MMC test commands)
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
#0 : 0
CRC check is valid
#1 : 1
CRC check is invalid(CRC16 value is ignored when read and CRC Status value is ignored when write)
End of enumeration elements list.
Reserved : These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000.
bits : 9 - 30 (22 bit)
access : read-write
Reserved : These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000.
bits : 9 - 30 (22 bit)
access : read-write
Swap Control Register
address_offset : 0x1E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BWSWP : SD_BUF0 Swap Write
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
The current data are written without swapping.
#1 : 1
Swapping of the positions of the higher- and lower-order bytes of data for writing proceeds.
End of enumeration elements list.
BRSWP : SD_BUF0 Swap Read
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
#0 : 0
The current data are read without swapping.
#1 : 1
Swapping of the positions of the higher- and lower-order bytes of data for reading proceeds.
End of enumeration elements list.
Reserved : These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000.
bits : 8 - 30 (23 bit)
access : read-write
Reserved : These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000.
bits : 8 - 30 (23 bit)
access : read-write
SD Card Response Register 32
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SD_RSP32 : Store the response from the SD card/MMC
bits : 0 - 30 (31 bit)
access : read-only
SD Card Response Register 3
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SD_RSP3 : Store the response from the SD card/MMC
bits : 0 - 14 (15 bit)
access : read-only
Reserved : These bits are read as 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-only
SD Card Response Register 54
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SD_RSP54 : Store the response from the SD card/MMC
bits : 0 - 30 (31 bit)
access : read-only
SD Card Response Register 5
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SD_RSP5 : Store the response from the SD card/MMC
bits : 0 - 14 (15 bit)
access : read-only
Reserved : These bits are read as 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-only
SD Card Response Register 76
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SD_RSP76 : Store the response from the SD card/MMC
bits : 0 - 22 (23 bit)
access : read-only
Reserved : These bits are read as 00000000.
bits : 24 - 30 (7 bit)
access : read-only
SD Card Response Register 7
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SD_RSP7 : Store the response from the SD card/MMC
bits : 0 - 6 (7 bit)
access : read-only
Reserved : These bits are read as 000000000000000000000000.
bits : 8 - 30 (23 bit)
access : read-only
SD Card Interrupt Flag Register 1
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RSPEND : Response End Detection
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Response end is not detected
#1 : 1
Response end is detected
End of enumeration elements list.
ACEND : Access End
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Access end is not detected
#1 : 1
Access end is detected
End of enumeration elements list.
SDCDRM : SDnCD Card Removal
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : 0
Card removal not detected
#1 : 1
Card removal detected
End of enumeration elements list.
SDCDIN : SDnCD Card Insertion
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Card insertion not detected
#1 : 1
Card insertion detected
End of enumeration elements list.
SDCDMON : Indicates the SDnCD state
bits : 5 - 4 (0 bit)
access : read-only
Enumeration:
#0 : 0
Indicates that Mcycle has elapsed with SDnCD held 1.(Mcycle is set by bits 3 to 0 in SD_OPTION.)
#1 : 1
Indicates that Mcycle has elapsed with SDnCD held 0. (Mcycle is set by bits 3 to 0 in SD_OPTION.)
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 6 - 5 (0 bit)
access : read-write
SDWPMON : Indicates the SDnWP state
bits : 7 - 6 (0 bit)
access : read-only
Enumeration:
#0 : 0
SDnWP is set to 1.
#1 : 1
SDnWP is set to 0.
End of enumeration elements list.
SDD3RM : SDnDAT3 Card Removal
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
#0 : 0
SD card removal not detected
#1 : 1
SD card removal detected
End of enumeration elements list.
SDD3IN : SDnDAT3 Card Insertion
bits : 9 - 8 (0 bit)
access : read-write
Enumeration:
#0 : 0
SD card insertion not detected
#1 : 1
SD card insertion detected
End of enumeration elements list.
SDD3MON : Inticates the SDnDAT3 State
bits : 10 - 9 (0 bit)
access : read-only
Enumeration:
#0 : 0
SDnDAT3 is set to 0.
#1 : 1
SDnDAT3 is set to 1.
End of enumeration elements list.
Reserved : These bits are read as 00000. The write value should be 00000.
bits : 11 - 14 (4 bit)
access : read-write
Reserved : These bits are read as 0000000000000000. The write value should be 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-write
Reserved : These bits are read as 0000000000000000. The write value should be 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-write
SD Card Interrupt Flag Register 2
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMDE : Command Error
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Command error not detected
#1 : 1
Command error detected
End of enumeration elements list.
CRCE : CRC Error
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
CRC error not detected
#1 : 1
CRC error detected
End of enumeration elements list.
ENDE : END Error
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
End bit error not detected
#1 : 1
End bit error detected
End of enumeration elements list.
DTO : Data Timeout
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : 0
Data timeout not detected
#1 : 1
Data timeout detected
End of enumeration elements list.
ILW : SD_BUF Illegal Write Access
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Illegal write access to the SD_BUF register not detected
#1 : 1
Illegal write access to the SD_BUF register detected
End of enumeration elements list.
ILR : SD_BUF Illegal Read Access
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
#0 : 0
Illegal read access to the SD_BUF register not detected
#1 : 1
Illegal read access to the SD_BUF register detected
End of enumeration elements list.
RSPTO : Response Timeout
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
Response timeout not detected
#1 : 1
Response timeout detected
End of enumeration elements list.
SDD0MON : SDDAT0Indicates the SDDAT0 state of the port specified by SD_PORTSEL.
bits : 7 - 6 (0 bit)
access : read-only
Enumeration:
#1 : 1
SDDAT0 is set to 1.
#0 : 0
SDDAT0 is set to 0.
End of enumeration elements list.
BRE : SD_BUF Read Enable
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
#1 : 1
Data can be read from SD_BUF0.
#0 : 0
Data cannot be read from SD_BUF0.
End of enumeration elements list.
BWE : SD_BUF Write Enable
bits : 9 - 8 (0 bit)
access : read-write
Enumeration:
#1 : 1
Data can be written in SD_BUF0.
#0 : 0
Data cannot be written in SD_BUF0.
End of enumeration elements list.
SD_CLK_CTRLEN : When a command sequence is started by writing to SD_CMD, the CBSY bit is set to 1 and, at the same time, the SCLKDIVEN bit is set to 0. The SCLKDIVEN bit is set to 1 after 8 cycles of SDCLK have elapsed after setting of the CBSY bit to 0 due to completion of the command sequence.
bits : 13 - 12 (0 bit)
access : read-only
Enumeration:
#0 : 0
The SD/MMC bus (CMD, DAT) is busy. Writing to the SCLKEN and DIV bits in SD_CLK_CTRL is not possible.
#1 : 1
The SD/MMC bus (CMD, DAT) is not busy.
End of enumeration elements list.
CBSY : Command Type Register Busy
bits : 14 - 13 (0 bit)
access : read-only
Enumeration:
#0 : 0
A command sequence is being executed.
#1 : 1
A command sequence has been completed.
End of enumeration elements list.
ILA : Illegal Access Error
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Illegal access error not detected
#1 : 1
Illegal access error detected
End of enumeration elements list.
Reserved : These bits are read as 0000000000000000. The write value should be 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-write
Reserved : These bits are read as 0000000000000000. The write value should be 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-write
SD_INFO1 Interrupt Mask Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RSPENDM : Response End Interrupt Request Mask
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Response end interrupt request is not masked
#1 : 1
Response end interrupt request is masked
End of enumeration elements list.
ACENDM : Access End Interrupt Request Mask
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Access end interrupt request is not masked
#1 : 1
Access end interrupt request is masked
End of enumeration elements list.
SDCDRMM : SDnCD card Removal Interrupt Request Mask
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : 0
Card removal interrupt request by the by the SDnCD is not masked
#1 : 1
Card removal interrupt request by the by the SDnCD is masked
End of enumeration elements list.
SDCDINM : SDnCD card Insertion Interrupt Request Mask
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Card insertion interrupt request by the SDnCD is not masked
#1 : 1
Card insertion interrupt request by the SDnCD is masked
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 5 - 6 (2 bit)
access : read-write
SDD3RMM : SDnDAT3 Card Removal Interrupt Request Mask
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
#0 : 0
SD card removal interrupt request by the SDnDAT3 is not masked
#1 : 1
SD card removal interrupt request by the SDnDAT3 is masked
End of enumeration elements list.
SDD3INM : SDnDAT3 Card Insertion Interrupt Request Mask
bits : 9 - 8 (0 bit)
access : read-write
Enumeration:
#0 : 0
SD card insertion interrupt request by the SDnDAT3 is not masked
#1 : 1
SD card insertion interrupt request by the SDnDAT3 is masked
End of enumeration elements list.
Reserved : These bits are read as 000000. The write value should be 000000.
bits : 10 - 14 (5 bit)
access : read-write
Reserved : These bits are read as 0000000000000000. The write value should be 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-write
Reserved : These bits are read as 0000000000000000. The write value should be 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-write
SD_INFO2 Interrupt Mask Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMDEM : Command Error Interrupt Request Mask
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Command error interrupt request not masked
#1 : 1
Command error interrupt request masked
End of enumeration elements list.
CRCEM : CRC Error Interrupt Request Mask
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
CRC error interrupt request not masked
#1 : 1
CRC error interrupt request masked
End of enumeration elements list.
ENDEM : End Bit Error Interrupt Request Mask
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
End bit detection error interrupt request not masked
#1 : 1
End bit detection error interrupt request masked
End of enumeration elements list.
DTOM : Data Timeout Interrupt Request Mask
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : 0
Data timeout interrupt request not masked
#1 : 1
Data timeout interrupt request masked
End of enumeration elements list.
ILWM : SD_BUF Register Illegal Write Interrupt Request Mask
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Illegal write detection interrupt request for the SD_BUF register not masked
#1 : 1
Illegal write detection interrupt request for the SD_BUF register masked
End of enumeration elements list.
ILRM : SD_BUF Register Illegal Read Interrupt Request Mask
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
#0 : 0
Illegal read detection interrupt request for the SD_BUF register not masked
#1 : 1
Illegal read detection interrupt request for the SD_BUF register masked
End of enumeration elements list.
RSPTOM : Response Timeout Interrupt Request Mask
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
Response timeout interrupt request not masked
#1 : 1
Response timeout interrupt request masked
End of enumeration elements list.
BREM : BRE Interrupt Request Mask
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
#0 : 0
Read enable interrupt request for the SD buffer not masked
#1 : 1
Read enable interrupt request for the SD buffer masked
End of enumeration elements list.
BWEM : BWE Interrupt Request Mask
bits : 9 - 8 (0 bit)
access : read-write
Enumeration:
#0 : 0
Write enable interrupt request for the SD_BUF register not masked
#1 : 1
Write enable interrupt request for the SD_BUF register masked
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 10 - 9 (0 bit)
access : read-write
Reserved : This bit is read as 1. The write value should be 1.
bits : 11 - 10 (0 bit)
access : read-write
Reserved : These bits are read as 000. The write value should be 000.
bits : 12 - 13 (2 bit)
access : read-write
ILAM : Illegal Access Error Interrupt Request Mask
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Illegal access error interrupt request not masked
#1 : 1
Illegal access error interrupt request masked
End of enumeration elements list.
Reserved : These bits are read as 0000000000000000. The write value should be 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-write
Reserved : These bits are read as 0000000000000000. The write value should be 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-write
SD Clock Control Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLKSEL : SDHI Clock Frequency Select
bits : 0 - 6 (7 bit)
access : read-write
Enumeration:
0x00 : 0x00
PCLKA divided by 2
0x01 : 0x01
PCLKA divided by 4
0x02 : 0x02
PCLKA divided by 8
0x04 : 0x04
PCLKA divided by 16
0x08 : 0x08
PCLKA divided by 32
0x10 : 0x10
PCLKA divided by 64
0x20 : 0x20
PCLKA divided by 128
0x40 : 0x40
PCLKA divided by 256
0x80 : 0x80
PCLKA divided by 512
: others
Settings prohibited.
End of enumeration elements list.
CLKEN : SD/MMC Clock Output Control Enable
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
#0 : 0
SD/MMC Clock output is disabled. The SDCLK signal is fixed 0.
#1 : 1
SD/MMC Clock output is enabled.
End of enumeration elements list.
CLKCTRLEN : SD/MMC Clock Output Automatic Control Enable
bits : 9 - 8 (0 bit)
access : read-write
Enumeration:
#0 : 0
Automatic control for SD/MMC Clock output is disabled.
#1 : 1
Automatic control for SD/MMC Clock output is enabled.
End of enumeration elements list.
Reserved : These bits are read as 00000. The write value should be 00000.
bits : 11 - 14 (4 bit)
access : read-write
Reserved : These bits are read as 0000000000000000. The write value should be 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-write
Reserved : These bits are read as 0000000000000000. The write value should be 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-write
Transfer Data Length Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LEN : Transfer Data SizeThese bits specify a size between 1 and 512 bytes for the transfer of single blocks.In cases of multiple block transfer with automatic issuing of CMD12 (CMD18 and CMD25), the only specifiable transfer data size is 512 bytes. Furthermore, in cases of multiple block transfer without automatic issuing of CMD12, as well as 512 bytes, 32, 64, 128, and 256 bytes are specifiable. However, in the reading of 32, 64, 128, and 256 bytes for the transfer of multiple blocks, this is restricted to multiple block transfer by CMD53.Additionally, if a command accompanies data transfer, do not set these bits to 0.
bits : 0 - 8 (9 bit)
access : read-write
Reserved : These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000.
bits : 10 - 30 (21 bit)
access : read-write
SD Card Access Control Option Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CTOP : Card Detect Time Counter
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
#1111 : 1111
Setting prohibited
: others
IMCLK x 2^(CTOP+10)
End of enumeration elements list.
TOP : Timeout Counter
bits : 4 - 6 (3 bit)
access : read-write
Enumeration:
#1111 : 1111
Setting prohibited
: others
SDHI clock x 2^(TOP+13)
End of enumeration elements list.
TOUTMASK : Timeout MASKWhen timeout occurs in case of inactivating timeout, software reset should be executed to terminate command sequence.
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
#0 : 0
Activate Timeout
#1 : 1
Inactivate Timeout(RSPTO bit and DTO bit of SD_INFO2 and SD_ERR_STS2 won't be set)
End of enumeration elements list.
WIDTH8 : Bus Widthsee b15, WIDTH bit
bits : 13 - 12 (0 bit)
access : read-write
Reserved : This bit is read as 1. The write value should be 1.
bits : 14 - 13 (0 bit)
access : read-write
WIDTH : Bus WidthNOTE: The initial value is applied at a reset and when the SOFT_RST.SDRST flag is 0.
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
4-bit width (WIDTH8=0) / 8-bit width (WIDTH8=1)
#1 : 1
1-bit width (WIDTH8=0 or 1 )
End of enumeration elements list.
Reserved : These bits are read as 0000000000000000. The write value should be 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-write
Reserved : These bits are read as 0000000000000000. The write value should be 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-write
SD Error Status Register 1
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CMDE0 : Command Error 0NOTE: other than a response to a command issued within a command sequence
bits : 0 - -1 (0 bit)
access : read-only
Enumeration:
#0 : 0
An error has not occured in the command index of a response.
#1 : 1
An error has occured in the command index of a response.
End of enumeration elements list.
CMDE1 : Command Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD, this is Indicated in CMDE0.
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
An error has not occurs in the command index of the response to a command issued within a command sequence.
#1 : 1
An error has occured in the command index of the response to a command issued within a command sequence.
End of enumeration elements list.
RSPLENE0 : Response Length Error 0NOTE: other than a response to a command issued within a command sequence
bits : 2 - 1 (0 bit)
access : read-only
Enumeration:
#0 : 0
An error has not occured in the response length
#1 : 1
An error has occured in the response length
End of enumeration elements list.
RSPLENE1 : Response Length Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD, this is indicated in RSPLENE0.
bits : 3 - 2 (0 bit)
access : read-only
Enumeration:
#0 : 0
An error has not occurred in the response length to a command issued within a command sequence.
#1 : 1
An error has occured in the response length to a command issued within a command sequence.
End of enumeration elements list.
RDLENE : Read Data Length Error
bits : 4 - 3 (0 bit)
access : read-only
Enumeration:
#0 : 0
An error has occurred not in the read data length.
#1 : 1
An error has occured in the read data length (and the end bit has not been detected among the valid bits).
End of enumeration elements list.
CRCLENE : CRC Status Token Length Error
bits : 5 - 4 (0 bit)
access : read-only
Enumeration:
#0 : 0
An error has not occured in the CRC status length.
#1 : 1
An error has occured in the CRC status length (and the end bit has not been detected)
End of enumeration elements list.
RSPCRCE0 : Response CRC Error 0NOTE: other than a response to a command issued within a command sequence
bits : 8 - 7 (0 bit)
access : read-only
Enumeration:
#0 : 0
A CRC error has not occur in a response
#1 : 1
A CRC error has occured in a response
End of enumeration elements list.
RSPCRCE1 : Response CRC Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD, this is indicated in RSPCRCE0.
bits : 9 - 8 (0 bit)
access : read-only
Enumeration:
#0 : 0
CRC error has not occured.
#1 : 1
CRC error has occured in the response to a command issued within a command sequence.
End of enumeration elements list.
RDCRCE : Read Data CRC Error
bits : 10 - 9 (0 bit)
access : read-only
Enumeration:
#0 : 0
CRC error has detected in read data
#1 : 1
CRC error has not detected in read data
End of enumeration elements list.
CRCTKE : CRC Status Token Error
bits : 11 - 10 (0 bit)
access : read-only
Enumeration:
#0 : 0
An error has not occured in the CRC status.
#1 : 1
An error has occured in the CRC status.
End of enumeration elements list.
CRCTK : CRC Status TokenStore the CRC status token value (normal value is 010b)
bits : 12 - 13 (2 bit)
access : read-only
Reserved : These bits are read as 00000000000000000.
bits : 15 - 30 (16 bit)
access : read-only
Reserved : These bits are read as 00000000000000000.
bits : 15 - 30 (16 bit)
access : read-only
SD Error Status Register 2
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RSPTO0 : Response Timeout 0
bits : 0 - -1 (0 bit)
access : read-only
Enumeration:
#0 : 0
Not timeout.
#1 : 1
The response (other than a response to a command issued within a command sequence) is not received though a longer time than 640 cycles of SD/MMC clock has elapsed.
End of enumeration elements list.
RSPTO1 : Response Timeout 1
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Not timeout.
#1 : 1
The response to a command issued within a command sequence*2 is not received though a longer time than 640 cycles of SD/MMC clock has elapsed. In cases where CMD12 is issued by setting a command index in SD_CMD, this is indicated in RSPTO0.
End of enumeration elements list.
BSYTO0 : Busy Timeout 0
bits : 2 - 1 (0 bit)
access : read-only
Enumeration:
#0 : 0
Not timeout.
#1 : 1
The busy state for longer than N-cycle continues after R1b response.
End of enumeration elements list.
BSYTO1 : Busy Timeout 1
bits : 3 - 2 (0 bit)
access : read-only
Enumeration:
#0 : 0
Not timeout.
#1 : 1
The busy state for longer than N-cycle continues after CMD12 has been issued within a command sequence. In cases where CMD12 is issued by setting a command index in SD_CMD, this is indicated in BSYTO0.
End of enumeration elements list.
RDTO : Read Data Timeout
bits : 4 - 3 (0 bit)
access : read-only
Enumeration:
#0 : 0
Not timeout
#1 : 1
The read data is not received though a longer time than N-cycle has elapsed after read command. / The read data for the next block are not received though a longer time than N-cycle has elapsed after the reception of read data. / The read data for the next block are not received though a longer time than N-cycle has elapsed after release of the read wait state.
End of enumeration elements list.
CRCTO : CRC Status Token Timeout
bits : 5 - 4 (0 bit)
access : read-only
Enumeration:
#0 : 0
Not timeout
#1 : 1
The CRC status is not received though a longer time than N-cycle has elapsed after data writing.
End of enumeration elements list.
CRCBSYTO : CRC Status Token Busy Timeout
bits : 6 - 5 (0 bit)
access : read-only
Enumeration:
#0 : 0
Not timeout
#1 : 1
The busy state continues for longer than N-cycle after the CRC status
End of enumeration elements list.
Reserved : These bits are read as 0000000000000000000000000.
bits : 7 - 30 (24 bit)
access : read-only
SD Buffer Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SD_BUF : SD Buffer RegisterWhen writing to the SD card, the write data is written to this register. When reading from the SD card, the read data is read from this register. This register is internally connected to two 512-byte buffers.If both buffers are not empty when executing multiple block read, SD/MMC clock is stopped to suspend receiving data. When one of buffers is empty, SD/MMC clock is supplied to resume receiving data.
bits : 0 - 30 (31 bit)
access : read-write
SDIO Mode Control Register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : SDIO Mode
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#1 : 1
Enables the SD host interface to receive SDIO interrupt from the SDIO card
#0 : 0
Disables the SD host interface to receive SDIO interrupt from the SDIO card
End of enumeration elements list.
RWREQ : Read Wait Request
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Allow SD/MMC to exit read wait state
#1 : 1
Request for SD/MMC to enter read wait state.
End of enumeration elements list.
Reserved : These bits are read as 00000. The write value should be 00000.
bits : 3 - 6 (4 bit)
access : read-write
IOABT : SDIO AbortNOTE: See manual
bits : 8 - 7 (0 bit)
access : read-write
C52PUB : SDIO None AbortNOTE: See manual
bits : 9 - 8 (0 bit)
access : read-write
Reserved : These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000.
bits : 10 - 30 (21 bit)
access : read-write
Reserved : These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000.
bits : 10 - 30 (21 bit)
access : read-write
SDIO Interrupt Flag Register 1
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IOIRQ : SDIO Interrupt Status
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
SDIO interrupt not accepted
#1 : 1
SDIO interrupt accepted
End of enumeration elements list.
Reserved : These bits are read as 00000000000. The write value should be 00000000000.
bits : 3 - 12 (10 bit)
access : read-write
EXPUB52 : EXPUB52 Status FlagNOTE: See manual
bits : 14 - 13 (0 bit)
access : read-write
EXWT : EXWT Status FlagNOTE: See manual
bits : 15 - 14 (0 bit)
access : read-write
Reserved : These bits are read as 0000000000000000. The write value should be 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-write
Reserved : These bits are read as 0000000000000000. The write value should be 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-write
SDIO_INFO1 Interrupt Mask Register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IOIRQM : IOIRQ Interrupt Mask Control
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
IOIRQ interrupt not masked
#1 : 1
IOIRQ interrupt masked
End of enumeration elements list.
Reserved : These bits are read as 00000000000. The write value should be 00000000000.
bits : 3 - 12 (10 bit)
access : read-write
EXPUB52M : EXPUB52 Interrupt Request Mask Control
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
EXPUB52 interrupt request not masked
#1 : 1
EXPUB52 interrupt request masked
End of enumeration elements list.
EXWTM : EXWT Interrupt Request Mask Control
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
EXWT interrupt request not masked
#1 : 1
EXWT interrupt request masked
End of enumeration elements list.
Reserved : These bits are read as 0000000000000000. The write value should be 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-write
Reserved : These bits are read as 0000000000000000. The write value should be 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-write
SD Command Argument Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SD_ARG : Argument RegisterSet command format[39:8] (argument)
bits : 0 - 30 (31 bit)
access : read-write
SD Command Argument Register 1
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SD_ARG1 : Argument Register 1Set command format[39:24] (argument)
bits : 0 - 14 (15 bit)
access : read-write
Reserved : These bits are read as 0000000000000000. The write value should be 0000000000000000.
bits : 16 - 30 (15 bit)
access : read-write
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