\n
address_offset : 0x0 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x4 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x100 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x104 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x108 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x10C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x200 Bytes (0x0)
size : 0x88 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x500 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x504 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x508 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x600 Bytes (0x0)
size : 0x44 byte (0x0)
mem_usage : registers
protection :
address_offset : 0xC00 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :
address_offset : 0xC10 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :
address_offset : 0xC14 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :
address_offset : 0xC18 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :
address_offset : 0xC20 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :
address_offset : 0xC24 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :
address_offset : 0xD00 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection :
address_offset : 0xD04 Bytes (0x0)
size : 0xE byte (0x0)
mem_usage : registers
protection :
address_offset : 0xD14 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection :
MMPU Operation After Detection Register
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OAD : Operation after detection
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Non-maskable interrupt
#1 : 1
Reset
End of enumeration elements list.
KEY : This bit enables or disables writes to the OAD bit.
bits : 8 - 14 (7 bit)
access : write-only
MMPU Enable Register for DMAC
address_offset : 0x100 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Bus Master MPU of DMAC enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Bus Master MPU of DMAC is disabled.
#1 : 1
Bus Master MPU of DMAC is enabled.
End of enumeration elements list.
KEY : These bits enable or disable writes to the ENABLE bit.
bits : 8 - 14 (7 bit)
access : write-only
MMPU Enable Protect Register for DMAC
address_offset : 0x104 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROTECT : Protection of register
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
MMPUENDMAC register writes are possible.
#1 : 1
MMPUENDMAC register writes are protected. Read is possible.
End of enumeration elements list.
KEY : These bits enable or disable writes to the PROTECT bit.
bits : 8 - 14 (7 bit)
access : write-only
MMPU Regions Protect Register for DMAC
address_offset : 0x108 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROTECT : Protection of register
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Bus Master MPU register for DMAC writing is possible.
#1 : 1
Bus Master MPU register for DMAC writing is protected. Read is possible.
End of enumeration elements list.
KEY : These bits enable or disable writes to the PROTECT bit.
bits : 8 - 14 (7 bit)
access : write-only
MMPU Regions Protect register for DMAC Secure
address_offset : 0x10C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROTECT : Protection of register
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Bus master MPU register for DMAC secure writes are possible.
#1 : 1
Bus master MPU register for DMAC secure writes are protected. Read is possible.
End of enumeration elements list.
KEY : These bits enable or disable writes to the PROTECT bit.
bits : 8 - 14 (7 bit)
access : write-only
MMPU Access Control Register for DMAC
address_offset : 0x200 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Region enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
DMAC Region n unit is disabled
#1 : 1
DMAC Region n unit is enabled
End of enumeration elements list.
RP : Read protection
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Read permission
#1 : 1
Read protection
End of enumeration elements list.
WP : Write protection
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Write permission
#1 : 1
Write protection
End of enumeration elements list.
MMPU Start Address Register for DMAC
address_offset : 0x204 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMPUS : Region start address register
bits : 5 - 30 (26 bit)
access : read-write
MMPU End Address Register for DMAC
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMPUE : Region end address register
bits : 5 - 30 (26 bit)
access : read-write
MMPU Access Control Register for DMAC
address_offset : 0x210 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Region enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
DMAC Region n unit is disabled
#1 : 1
DMAC Region n unit is enabled
End of enumeration elements list.
RP : Read protection
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Read permission
#1 : 1
Read protection
End of enumeration elements list.
WP : Write protection
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Write permission
#1 : 1
Write protection
End of enumeration elements list.
MMPU Start Address Register for DMAC
address_offset : 0x214 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMPUS : Region start address register
bits : 5 - 30 (26 bit)
access : read-write
MMPU End Address Register for DMAC
address_offset : 0x218 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMPUE : Region end address register
bits : 5 - 30 (26 bit)
access : read-write
MMPU Access Control Register for DMAC
address_offset : 0x220 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Region enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
DMAC Region n unit is disabled
#1 : 1
DMAC Region n unit is enabled
End of enumeration elements list.
RP : Read protection
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Read permission
#1 : 1
Read protection
End of enumeration elements list.
WP : Write protection
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Write permission
#1 : 1
Write protection
End of enumeration elements list.
MMPU Start Address Register for DMAC
address_offset : 0x224 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMPUS : Region start address register
bits : 5 - 30 (26 bit)
access : read-write
MMPU End Address Register for DMAC
address_offset : 0x228 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMPUE : Region end address register
bits : 5 - 30 (26 bit)
access : read-write
MMPU Access Control Register for DMAC
address_offset : 0x230 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Region enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
DMAC Region n unit is disabled
#1 : 1
DMAC Region n unit is enabled
End of enumeration elements list.
RP : Read protection
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Read permission
#1 : 1
Read protection
End of enumeration elements list.
WP : Write protection
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Write permission
#1 : 1
Write protection
End of enumeration elements list.
MMPU Start Address Register for DMAC
address_offset : 0x234 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMPUS : Region start address register
bits : 5 - 30 (26 bit)
access : read-write
MMPU End Address Register for DMAC
address_offset : 0x238 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMPUE : Region end address register
bits : 5 - 30 (26 bit)
access : read-write
MMPU Access Control Register for DMAC
address_offset : 0x240 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Region enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
DMAC Region n unit is disabled
#1 : 1
DMAC Region n unit is enabled
End of enumeration elements list.
RP : Read protection
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Read permission
#1 : 1
Read protection
End of enumeration elements list.
WP : Write protection
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Write permission
#1 : 1
Write protection
End of enumeration elements list.
MMPU Start Address Register for DMAC
address_offset : 0x244 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMPUS : Region start address register
bits : 5 - 30 (26 bit)
access : read-write
MMPU End Address Register for DMAC
address_offset : 0x248 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMPUE : Region end address register
bits : 5 - 30 (26 bit)
access : read-write
MMPU Access Control Register for DMAC
address_offset : 0x250 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Region enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
DMAC Region n unit is disabled
#1 : 1
DMAC Region n unit is enabled
End of enumeration elements list.
RP : Read protection
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Read permission
#1 : 1
Read protection
End of enumeration elements list.
WP : Write protection
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Write permission
#1 : 1
Write protection
End of enumeration elements list.
MMPU Start Address Register for DMAC
address_offset : 0x254 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMPUS : Region start address register
bits : 5 - 30 (26 bit)
access : read-write
MMPU End Address Register for DMAC
address_offset : 0x258 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMPUE : Region end address register
bits : 5 - 30 (26 bit)
access : read-write
MMPU Access Control Register for DMAC
address_offset : 0x260 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Region enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
DMAC Region n unit is disabled
#1 : 1
DMAC Region n unit is enabled
End of enumeration elements list.
RP : Read protection
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Read permission
#1 : 1
Read protection
End of enumeration elements list.
WP : Write protection
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Write permission
#1 : 1
Write protection
End of enumeration elements list.
MMPU Start Address Register for DMAC
address_offset : 0x264 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMPUS : Region start address register
bits : 5 - 30 (26 bit)
access : read-write
MMPU End Address Register for DMAC
address_offset : 0x268 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMPUE : Region end address register
bits : 5 - 30 (26 bit)
access : read-write
MMPU Access Control Register for DMAC
address_offset : 0x270 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Region enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
DMAC Region n unit is disabled
#1 : 1
DMAC Region n unit is enabled
End of enumeration elements list.
RP : Read protection
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Read permission
#1 : 1
Read protection
End of enumeration elements list.
WP : Write protection
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Write permission
#1 : 1
Write protection
End of enumeration elements list.
MMPU Start Address Register for DMAC
address_offset : 0x274 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMPUS : Region start address register
bits : 5 - 30 (26 bit)
access : read-write
MMPU End Address Register for DMAC
address_offset : 0x278 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMPUE : Region end address register
bits : 5 - 30 (26 bit)
access : read-write
MMPU Operation After Detection Protect Register
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROTECT : Protection of register
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
MMPUOAD register writes are possible.
#1 : 1
MMPUOAD register writes are protected. Read is possible.
End of enumeration elements list.
KEY : Key code
bits : 8 - 14 (7 bit)
access : write-only
MMPU Enable Register for EDMAC
address_offset : 0x500 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Bus Master MPU of EDMAC enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Bus Master MPU of EDMAC is disabled.
#1 : 1
Bus Master MPU of EDMAC is enabled.
End of enumeration elements list.
KEY : These bits enable or disable writes to the ENABLE bit.
bits : 8 - 14 (7 bit)
access : write-only
MMPU Enable Protect Register for EDMAC
address_offset : 0x504 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROTECT : Protection of register
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
MMPUENEDMAC register writes are possible.
#1 : 1
MMPUENEDMAC register writes are protected. Read is possible.
End of enumeration elements list.
KEY : These bits enable or disable writes to the PROTECT bit.
bits : 8 - 14 (7 bit)
access : write-only
MMPU Regions Protect Register for EDMAC
address_offset : 0x508 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROTECT : Protection of register
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Bus Master MPU register for EDMAC writing is possible.
#1 : 1
Bus Master MPU register for EDMAC writing is protected. Read is possible.
End of enumeration elements list.
KEY : This bit is used to enable or disable writing of the PROTECT bit.
bits : 8 - 14 (7 bit)
access : write-only
MMPU Access Control Register for EDMAC
address_offset : 0x600 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Region enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
EDMAC Region n unit is disabled
#1 : 1
EDMAC Region n unit is enabled
End of enumeration elements list.
RP : Read protection
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Read permission
#1 : 1
Read protection
End of enumeration elements list.
WP : Write protection
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Write permission
#1 : 1
Write protection
End of enumeration elements list.
MMPU Start Address Register for EDMAC
address_offset : 0x604 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMPUS : Region start address register for EDMAC
bits : 5 - 30 (26 bit)
access : read-write
MMPU Access Control Register for EDMAC
address_offset : 0x610 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Region enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
EDMAC Region n unit is disabled
#1 : 1
EDMAC Region n unit is enabled
End of enumeration elements list.
RP : Read protection
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Read permission
#1 : 1
Read protection
End of enumeration elements list.
WP : Write protection
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Write permission
#1 : 1
Write protection
End of enumeration elements list.
MMPU Start Address Register for EDMAC
address_offset : 0x614 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMPUS : Region start address register for EDMAC
bits : 5 - 30 (26 bit)
access : read-write
MMPU Access Control Register for EDMAC
address_offset : 0x620 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Region enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
EDMAC Region n unit is disabled
#1 : 1
EDMAC Region n unit is enabled
End of enumeration elements list.
RP : Read protection
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Read permission
#1 : 1
Read protection
End of enumeration elements list.
WP : Write protection
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Write permission
#1 : 1
Write protection
End of enumeration elements list.
MMPU Start Address Register for EDMAC
address_offset : 0x624 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMPUS : Region start address register for EDMAC
bits : 5 - 30 (26 bit)
access : read-write
MMPU Access Control Register for EDMAC
address_offset : 0x630 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Region enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
EDMAC Region n unit is disabled
#1 : 1
EDMAC Region n unit is enabled
End of enumeration elements list.
RP : Read protection
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Read permission
#1 : 1
Read protection
End of enumeration elements list.
WP : Write protection
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Write permission
#1 : 1
Write protection
End of enumeration elements list.
MMPU Start Address Register for EDMAC
address_offset : 0x634 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MMPUS : Region start address register for EDMAC
bits : 5 - 30 (26 bit)
access : read-write
Slave MPU Control Register
address_offset : 0xC00 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OAD : Operation After Detection
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Non-maskable interrupt
#1 : 1
Reset
End of enumeration elements list.
PROTECT : Protection of Register
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
All bus slave register writes are permitted
#1 : 1
All bus slave register writes are protected. Reads are permitted
End of enumeration elements list.
KEY : Key Code
bits : 8 - 14 (7 bit)
access : read-write
Access Control Register for Memory Bus 1
address_offset : 0xC10 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RPGRPA : Master MPU Group A Read Protection
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Memory protection read for master MPU group A disabled
#1 : 1
Memory protection read for master MPU group A enabled
End of enumeration elements list.
WPGRPA : Master MPU Group A Write Protection
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : 0
Memory protection write for master MPU group A disabled
#1 : 1
Memory protection write for master MPU group A enabled
End of enumeration elements list.
Access Control Register for Internal Peripheral Bus 9
address_offset : 0xC14 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RPCPU : CPU Read Protection
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Memory protection for CPU read disabled
#1 : 1
Memory protection for CPU read enabled
End of enumeration elements list.
WPCPU : CPU Write Protection
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Memory protection for CPU write disabled
#1 : 1
Memory protection for CPU write enabled
End of enumeration elements list.
RPGRPA : Master MPU Group A Read Protection
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Memory protection for master MPU group A read disabled
#1 : 1
Memory protection for master MPU group A read enabled
End of enumeration elements list.
WPGRPA : Master MPU Group A Write Protection
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : 0
Memory protection for master MPU group A write disabled
#1 : 1
Memory protection for master MPU group A write enabled
End of enumeration elements list.
Access Control Register for Memory Bus 4
address_offset : 0xC18 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RPCPU : CPU Read Protection
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Memory protection for CPU read disabled
#1 : 1
Memory protection for CPU read enabled
End of enumeration elements list.
WPCPU : CPU Write Protection
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Memory protection for CPU write disabled
#1 : 1
Memory protection for CPU write enabled
End of enumeration elements list.
RPGRPA : Master MPU Group A Read Protection
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Memory protection for master MPU group A read disabled
#1 : 1
Memory protection for master MPU group A read enabled
End of enumeration elements list.
WPGRPA : Master MPU Group A Write Protection
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : 0
Memory protection for master MPU group A write disabled
#1 : 1
Memory protection for master MPU group A write enabled
End of enumeration elements list.
Access Control Register for Internal Peripheral Bus 1
address_offset : 0xC20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RPCPU : CPU Read Protection
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Memory protection for CPU read disabled
#1 : 1
Memory protection for CPU read enabled
End of enumeration elements list.
WPCPU : CPU Write Protection
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Memory protection for CPU write disabled
#1 : 1
Memory protection for CPU write enabled
End of enumeration elements list.
RPGRPA : Master MPU Group A Read Protection
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Memory protection for master MPU group A read disabled
#1 : 1
Memory protection for master MPU group A read enabled
End of enumeration elements list.
WPGRPA : Master MPU Group A Write Protection
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : 0
Memory protection for master MPU group A write disabled
#1 : 1
Memory protection for master MPU group A write enabled
End of enumeration elements list.
Access Control Register for Internal Peripheral Bus 3
address_offset : 0xC24 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RPCPU : CPU Read Protection
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Memory protection for CPU read disabled
#1 : 1
Memory protection for CPU read enabled
End of enumeration elements list.
WPCPU : CPU Write Protection
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Memory protection for CPU write disabled
#1 : 1
Memory protection for CPU write enabled
End of enumeration elements list.
RPGRPA : Master MPU Group A Read Protection
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Memory protection for master MPU group A read disabled
#1 : 1
Memory protection for master MPU group A read enabled
End of enumeration elements list.
WPGRPA : Master MPU Group A Write Protection
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : 0
Memory protection for master MPU group A write disabled
#1 : 1
Memory protection for master MPU group A write enabled
End of enumeration elements list.
Stack Pointer Monitor Operation After Detection Register
address_offset : 0xD00 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OAD : Operation after Detection
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Non-maskable interrupt
#1 : 1
Reset
End of enumeration elements list.
KEY : Key Code
bits : 8 - 14 (7 bit)
access : read-write
Stack Pointer Monitor Access Control Register
address_offset : 0xD04 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Stack Pointer Monitor Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Stack pointer monitor is disabled
#1 : 1
Stack pointer monitor is enabled
End of enumeration elements list.
ERROR : Stack Pointer Monitor Error Flag
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
#0 : 0
Stack pointer has not overflowed or underflowed
#1 : 1
Stack pointer has overflowed or underflowed
End of enumeration elements list.
Stack Pointer Monitor Protection Register
address_offset : 0xD06 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROTECT : Protection of Register
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Stack pointer monitor register writes are permitted.
#1 : 1
Stack pointer monitor register writes are protected. Reads are permitted
End of enumeration elements list.
KEY : Key Code
bits : 8 - 14 (7 bit)
access : read-write
Main Stack Pointer (MSP) Monitor Start Address Register
address_offset : 0xD08 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MSPMPUSA : Region Start Address
bits : 0 - 30 (31 bit)
access : read-write
Main Stack Pointer (MSP) Monitor End Address Register
address_offset : 0xD0C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MSPMPUEA : Region End Address
bits : 0 - 30 (31 bit)
access : read-write
Stack Pointer Monitor Operation After Detection Register
address_offset : 0xD10 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OAD : Operation after Detection
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Non-maskable interrupt
#1 : 1
Reset
End of enumeration elements list.
KEY : Key Code
bits : 8 - 14 (7 bit)
access : read-write
Stack Pointer Monitor Access Control Register
address_offset : 0xD14 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Stack Pointer Monitor Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Stack pointer monitor is disabled
#1 : 1
Stack pointer monitor is enabled
End of enumeration elements list.
ERROR : Stack Pointer Monitor Error Flag
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
#0 : 0
Stack pointer has not overflowed or underflowed
#1 : 1
Stack pointer has overflowed or underflowed
End of enumeration elements list.
Stack Pointer Monitor Protection Register
address_offset : 0xD16 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROTECT : Protection of Register
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Stack pointer monitor register writes are permitted.
#1 : 1
Stack pointer monitor register writes are protected. Reads are permitted
End of enumeration elements list.
KEY : Key Code
bits : 8 - 14 (7 bit)
access : read-write
Process Stack Pointer (PSP) Monitor Start Address Register
address_offset : 0xD18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PSPMPUSA : Region Start Address
bits : 0 - 30 (31 bit)
access : read-write
Process Stack Pointer (PSP) Monitor End Address Register
address_offset : 0xD1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PSPMPUEA : Region End Address
bits : 0 - 30 (31 bit)
access : read-write
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